static void sci_controller_afe_initialization(struct isci_host *ihost)
{
const struct sci_oem_params *oem = &ihost->oem_parameters;
+ struct pci_dev *pdev = ihost->pdev;
u32 afe_status;
u32 phy_id;
writel(0x0081000f, &ihost->scu_registers->afe.afe_dfx_master_control0);
udelay(AFE_REGISTER_WRITE_DELAY);
- if (is_b0()) {
+ if (is_b0(pdev)) {
/* PM Rx Equalization Save, PM SPhy Rx Acknowledgement
* Timer, PM Stagger Timer */
writel(0x0007BFFF, &ihost->scu_registers->afe.afe_pmsn_master_control2);
}
/* Configure bias currents to normal */
- if (is_a0())
- writel(0x00005500, &ihost->scu_registers->afe.afe_bias_control);
- else if (is_a2())
+ if (is_a2(pdev))
writel(0x00005A00, &ihost->scu_registers->afe.afe_bias_control);
- else if (is_b0() || is_c0())
+ else if (is_b0(pdev) || is_c0(pdev))
writel(0x00005F00, &ihost->scu_registers->afe.afe_bias_control);
udelay(AFE_REGISTER_WRITE_DELAY);
/* Enable PLL */
- if (is_b0() || is_c0())
+ if (is_b0(pdev) || is_c0(pdev))
writel(0x80040A08, &ihost->scu_registers->afe.afe_pll_control0);
else
writel(0x80040908, &ihost->scu_registers->afe.afe_pll_control0);
udelay(AFE_REGISTER_WRITE_DELAY);
} while ((afe_status & 0x00001000) == 0);
- if (is_a0() || is_a2()) {
+ if (is_a2(pdev)) {
/* Shorten SAS SNW lock time (RxLock timer value from 76 us to 50 us) */
writel(0x7bcc96ad, &ihost->scu_registers->afe.afe_pmsn_master_control0);
udelay(AFE_REGISTER_WRITE_DELAY);
for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++) {
const struct sci_phy_oem_params *oem_phy = &oem->phys[phy_id];
- if (is_b0()) {
+ if (is_b0(pdev)) {
/* Configure transmitter SSC parameters */
writel(0x00030000, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_ssc_control);
udelay(AFE_REGISTER_WRITE_DELAY);
- } else if (is_c0()) {
+ } else if (is_c0(pdev)) {
/* Configure transmitter SSC parameters */
writel(0x0003000, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_ssc_control);
udelay(AFE_REGISTER_WRITE_DELAY);
/*
* Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
* & increase TX int & ext bias 20%....(0xe85c) */
- if (is_a0())
- writel(0x000003D4, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
- else if (is_a2())
+ if (is_a2(pdev))
writel(0x000003F0, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
- else if (is_b0()) {
+ else if (is_b0(pdev)) {
/* Power down TX and RX (PWRDNTX and PWRDNRX) */
writel(0x000003D7, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
udelay(AFE_REGISTER_WRITE_DELAY);
}
udelay(AFE_REGISTER_WRITE_DELAY);
- if (is_a0() || is_a2()) {
+ if (is_a2(pdev)) {
/* Enable TX equalization (0xe824) */
writel(0x00040000, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_control);
udelay(AFE_REGISTER_WRITE_DELAY);
udelay(AFE_REGISTER_WRITE_DELAY);
/* Leave DFE/FFE on */
- if (is_a0())
- writel(0x3F09983F, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
- else if (is_a2())
+ if (is_a2(pdev))
writel(0x3F11103F, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
- else if (is_b0()) {
+ else if (is_b0(pdev)) {
writel(0x3F11103F, &ihost->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
udelay(AFE_REGISTER_WRITE_DELAY);
/* Enable TX equalization (0xe824) */
return &idev->isci_port->isci_host->pdev->dev;
}
-enum {
- ISCI_SI_REVA0,
- ISCI_SI_REVA2,
- ISCI_SI_REVB0,
- ISCI_SI_REVC0
-};
-
-extern int isci_si_rev;
-
-static inline bool is_a0(void)
-{
- return isci_si_rev == ISCI_SI_REVA0;
-}
-
-static inline bool is_a2(void)
+static inline bool is_a2(struct pci_dev *pdev)
{
- return isci_si_rev == ISCI_SI_REVA2;
+ if (pdev->revision < 4)
+ return true;
+ return false;
}
-static inline bool is_b0(void)
+static inline bool is_b0(struct pci_dev *pdev)
{
- return isci_si_rev == ISCI_SI_REVB0;
+ if (pdev->revision == 4)
+ return true;
+ return false;
}
-static inline bool is_c0(void)
+static inline bool is_c0(struct pci_dev *pdev)
{
- return isci_si_rev > ISCI_SI_REVB0;
+ if (pdev->revision >= 5)
+ return true;
+ return false;
}
void sci_controller_post_request(struct isci_host *ihost,
/* linux isci specific settings */
-int isci_si_rev = ISCI_SI_REVA2;
-module_param(isci_si_rev, int, 0);
-MODULE_PARM_DESC(isci_si_rev, "(deprecated) override default si rev (0: A0 1: A2 2: B0)");
-
unsigned char no_outbound_task_to = 20;
module_param(no_outbound_task_to, byte, 0);
MODULE_PARM_DESC(no_outbound_task_to, "No Outbound Task Timeout (1us incr)");
return NULL;
}
-static void check_si_rev(struct pci_dev *pdev)
-{
- switch (pdev->revision) {
- case 0:
- case 1:
- /* if the id is ambiguous don't update isci_si_rev */
- break;
- case 3:
- isci_si_rev = ISCI_SI_REVA2;
- break;
- case 4:
- isci_si_rev = ISCI_SI_REVB0;
- break;
- default:
- case 5:
- isci_si_rev = ISCI_SI_REVC0;
- break;
- }
-
- dev_info(&pdev->dev, "driver configured for %s silicon (rev: %d)\n",
- isci_si_rev == ISCI_SI_REVA0 ? "A0" :
- isci_si_rev == ISCI_SI_REVA2 ? "A2" :
- isci_si_rev == ISCI_SI_REVB0 ? "B0" : "C0", pdev->revision);
-
-}
-
static int __devinit isci_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
struct isci_pci_info *pci_info;
struct isci_orom *orom = NULL;
char *source = "(platform)";
- check_si_rev(pdev);
+ dev_info(&pdev->dev, "driver configured for rev: %d silicon\n",
+ pdev->revision);
pci_info = devm_kzalloc(&pdev->dev, sizeof(*pci_info), GFP_KERNEL);
if (!pci_info)