drm/amd/display: move signal type out of otg dlg params

It makes no logical sense being there

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 33d311cea28cd3c8856898ac9fe41d92627a78b6..c67942ae19201195e34ce2de529f8040a2b78f71 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -663,7 +663,7 @@ static enum dc_status dcn10_enable_stream_timing(
        pipe_ctx->stream_res.tg->dlg_otg_param.vupdate_offset = pipe_ctx->pipe_dlg_param.vupdate_offset;
        pipe_ctx->stream_res.tg->dlg_otg_param.vupdate_width = pipe_ctx->pipe_dlg_param.vupdate_width;
 
-       pipe_ctx->stream_res.tg->dlg_otg_param.signal =  pipe_ctx->stream->signal;
+       pipe_ctx->stream_res.tg->signal =  pipe_ctx->stream->signal;
 
        pipe_ctx->stream_res.tg->funcs->program_timing(
                        pipe_ctx->stream_res.tg,
@@ -2283,7 +2283,6 @@ static void program_all_pipe_in_tree(
                pipe_ctx->stream_res.tg->dlg_otg_param.vstartup_start = pipe_ctx->pipe_dlg_param.vstartup_start;
                pipe_ctx->stream_res.tg->dlg_otg_param.vupdate_offset = pipe_ctx->pipe_dlg_param.vupdate_offset;
                pipe_ctx->stream_res.tg->dlg_otg_param.vupdate_width = pipe_ctx->pipe_dlg_param.vupdate_width;
-               pipe_ctx->stream_res.tg->dlg_otg_param.signal =  pipe_ctx->stream->signal;
 
                pipe_ctx->stream_res.tg->funcs->program_global_sync(
                                pipe_ctx->stream_res.tg);

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
index 0345d51e9d6f39a570c6d1b753913dba1708b10b..3f0911236f8c688523083549065c0e0f625fbe87 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
@@ -243,9 +243,9 @@ void optc1_program_timing(
                OTG_V_SYNC_A_POL, v_sync_polarity);
 
        v_init = asic_blank_start;
-       if (optc->dlg_otg_param.signal == SIGNAL_TYPE_DISPLAY_PORT ||
-               optc->dlg_otg_param.signal == SIGNAL_TYPE_DISPLAY_PORT_MST ||
-               optc->dlg_otg_param.signal == SIGNAL_TYPE_EDP) {
+       if (optc->signal == SIGNAL_TYPE_DISPLAY_PORT ||
+               optc->signal == SIGNAL_TYPE_DISPLAY_PORT_MST ||
+               optc->signal == SIGNAL_TYPE_EDP) {
                start_point = 1;
                if (patched_crtc_timing.flags.INTERLACE == 1)
                        field_num = 1;

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h b/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
index 067d53caf28ac49e1b217183007b2859d186be6a..4eee1add8e64d6d777a0f4051cb3b37831a7aaff 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
@@ -75,7 +75,6 @@ struct _dlg_otg_param {
        int vupdate_offset;
        int vupdate_width;
        int vready_offset;
-       enum signal_type signal;
 };
 
 struct vupdate_keepout_params {
@@ -127,6 +126,7 @@ struct timing_generator {
        struct dc_bios *bp;
        struct dc_context *ctx;
        struct _dlg_otg_param dlg_otg_param;
+       enum signal_type signal;
        int inst;
 };