ipq806x: refresh 5.10 patches
authorAnsuel Smith <ansuelsmth@gmail.com>
Wed, 3 Mar 2021 22:01:37 +0000 (23:01 +0100)
committerPetr Štetiar <ynezz@true.cz>
Fri, 7 May 2021 05:05:16 +0000 (07:05 +0200)
make target/linux/kernel refresh

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
24 files changed:
target/linux/ipq806x/patches-5.10/0060-HACK-arch-arm-force-ZRELADDR-on-arch-qcom.patch
target/linux/ipq806x/patches-5.10/0065-arm-override-compiler-flags.patch
target/linux/ipq806x/patches-5.10/0069-arm-boot-add-dts-files.patch
target/linux/ipq806x/patches-5.10/0072-add-ipq806x-with-no-clocks.patch
target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch
target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch
target/linux/ipq806x/patches-5.10/086-ipq8064-fix-duplicate-node.patch
target/linux/ipq806x/patches-5.10/093-drivers-cpufreq-qcom-cpufreq-nvmem-support-specific-.patch
target/linux/ipq806x/patches-5.10/097-1-ipq806x-gcc-add-missing-clk-flag.patch
target/linux/ipq806x/patches-5.10/097-2-ipq806x-lcc-add-missing-reset.patch
target/linux/ipq806x/patches-5.10/097-3-clk-qcom-krait-add-missing-enable-disable.patch
target/linux/ipq806x/patches-5.10/097-4-ipq806x-gcc-add-missing-clk-and-reset-for-crypto-eng.patch
target/linux/ipq806x/patches-5.10/098-2-Documentation-cpufreq-add-qcom-krait-cpufreq-binding.patch
target/linux/ipq806x/patches-5.10/098-3-add-fab-scaling-support-with-cpufreq.patch
target/linux/ipq806x/patches-5.10/099-1-mtd-nand-raw-qcom_nandc-add-boot_layout_mode-support.patch
target/linux/ipq806x/patches-5.10/099-2-Documentation-devicetree-mtd-qcom_nandc-document-qco.patch
target/linux/ipq806x/patches-5.10/100-v5.11-dmaengine-qcom-add_ADM_driver.patch
target/linux/ipq806x/patches-5.10/101-5.12-mtd-parsers-Add-Qcom-SMEM-parser.patch
target/linux/ipq806x/patches-5.10/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch
target/linux/ipq806x/patches-5.10/103-arm-Enlarge-IO_SPACE_LIMIT-needed-for-some-SoC.patch
target/linux/ipq806x/patches-5.10/850-soc-add-qualcomm-syscon.patch
target/linux/ipq806x/patches-5.10/851-add-gsbi1-dts.patch
target/linux/ipq806x/patches-5.10/900-arm-add-cmdline-override.patch
target/linux/ipq806x/patches-5.10/997-device_tree_cmdline.patch

index d3b39ac3e3addf06774ab893cc76d9e97a03c7fe..b56480deaa1b0a31dc4111769a9e333e87ef2fc6 100644 (file)
@@ -33,8 +33,8 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
 
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
-@@ -318,7 +318,7 @@ config ARCH_MULTIPLATFORM
-       depends on MMU
+@@ -321,7 +321,7 @@ config ARCH_MULTIPLATFORM
+       select ARCH_SELECT_MEMORY_MODEL
        select ARM_HAS_SG_CHAIN
        select ARM_PATCH_PHYS_VIRT
 -      select AUTO_ZRELADDR
@@ -44,7 +44,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
        select GENERIC_CLOCKEVENTS
 --- a/arch/arm/Makefile
 +++ b/arch/arm/Makefile
-@@ -258,9 +258,11 @@ MACHINE  := arch/arm/mach-$(word 1,$(mac
+@@ -251,9 +251,11 @@ MACHINE  := arch/arm/mach-$(word 1,$(mac
  else
  MACHINE  :=
  endif
index 0d2a4274c785854a4bbda5a4d6c953a8fd614acc..5a970e87ac868c9cfeaca5918cb79fba7f03cacf 100644 (file)
@@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
 
 --- a/arch/arm/Makefile
 +++ b/arch/arm/Makefile
-@@ -67,7 +67,7 @@ KBUILD_CFLAGS        += $(call cc-option,-fno-i
+@@ -61,7 +61,7 @@ KBUILD_CFLAGS        += $(call cc-option,-fno-i
  # macro, but instead defines a whole series of macros which makes
  # testing for a specific architecture or later rather impossible.
  arch-$(CONFIG_CPU_32v7M)      =-D__LINUX_ARM_ARCH__=7 -march=armv7-m -Wa,-march=armv7-m
index b6521026164ee97b7ba23ff0833d850231e7b00b..d5b1d4473bf03049bb202988347ea2e79ba36527 100644 (file)
@@ -10,10 +10,10 @@ Signed-off-by: John Crispin <john@phrozen.org>
 
 --- a/arch/arm/boot/dts/Makefile
 +++ b/arch/arm/boot/dts/Makefile
-@@ -843,6 +843,20 @@ dtb-$(CONFIG_ARCH_QCOM) += \
+@@ -909,6 +909,20 @@ dtb-$(CONFIG_ARCH_QCOM) += \
        qcom-ipq4019-ap.dk07.1-c2.dtb \
        qcom-ipq8064-ap148.dtb \
-       qcom-ipq8064-rb3011.dtb \
+       qcom-ipq8064-rb3011.dtb \
 +      qcom-ipq8064-c2600.dtb \
 +      qcom-ipq8064-d7800.dtb \
 +      qcom-ipq8064-db149.dtb \
index b7cebd9d3998885bedfea888ec2d6031c3ee24dc..627c32724f2755866d1d85e16604379ecce09eae 100644 (file)
@@ -1,6 +1,6 @@
 --- a/drivers/firmware/qcom_scm.c
 +++ b/drivers/firmware/qcom_scm.c
-@@ -598,6 +598,7 @@ static const struct of_device_id qcom_sc
+@@ -1265,6 +1265,7 @@ static const struct of_device_id qcom_sc
                                                             SCM_HAS_BUS_CLK)
        },
        { .compatible = "qcom,scm-ipq4019" },
index 9c16ee43510e42430c18fbd799abdb57fed8bb4d..b6e8e915eb5d508e7b4dda3ee3de78fd8317fc81 100644 (file)
@@ -1,6 +1,6 @@
 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-@@ -20,9 +20,9 @@
+@@ -20,7 +20,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
  
@@ -9,9 +9,7 @@
                        compatible = "qcom,krait";
                        enable-method = "qcom,kpss-acc-v1";
                        device_type = "cpu";
-                       reg = <1>;
-                       next-level-cache = <&L2>;
-@@ -30,9 +30,9 @@
+@@ -30,7 +30,7 @@
                        qcom,saw = <&saw0>;
                };
  
@@ -20,8 +18,6 @@
                        compatible = "qcom,krait";
                        enable-method = "qcom,kpss-acc-v1";
                        device_type = "cpu";
-                       reg = <1>;
-                       next-level-cache = <&L2>;
 @@ -67,7 +67,7 @@
                        no-map;
                };
@@ -39,7 +35,7 @@
                        #interrupt-cells = <2>;
                        interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
  
-@@ -155,6 +155,7 @@
+@@ -155,6 +156,7 @@
                                        function = "pcie3_rst";
                                        drive-strength = <12>;
                                        bias-disable;
@@ -47,7 +43,7 @@
                                };
                        };
  
-@@ -190,6 +190,7 @@
+@@ -190,6 +192,7 @@
                intc: interrupt-controller@2000000 {
                        compatible = "qcom,msm-qgic2";
                        interrupt-controller;
@@ -55,7 +51,7 @@
                        #interrupt-cells = <3>;
                        reg = <0x02000000 0x1000>,
                              <0x02002000 0x1000>;
-@@ -219,21 +220,23 @@
+@@ -219,21 +222,23 @@
                acc0: clock-controller@2088000 {
                        compatible = "qcom,kpss-acc-v1";
                        reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
@@ -81,7 +77,7 @@
                        reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
                        regulator;
                };
-@@ -251,7 +254,7 @@
+@@ -251,7 +256,7 @@
  
                        syscon-tcsr = <&tcsr>;
  
@@ -90,7 +86,7 @@
                                compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
                                reg = <0x12490000 0x1000>,
                                      <0x12480000 0x1000>;
-@@ -326,7 +329,7 @@
+@@ -326,7 +331,7 @@
  
                        syscon-tcsr = <&tcsr>;
  
@@ -99,7 +95,7 @@
                                compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
                                reg = <0x1a240000 0x1000>,
                                      <0x1a200000 0x1000>;
-@@ -397,7 +400,7 @@
+@@ -397,7 +402,7 @@
                        status = "disabled";
                };
  
                        compatible = "qcom,ipq806x-ahci", "generic-ahci";
                        reg = <0x29000000 0x180>;
  
-@@ -430,6 +430,16 @@ qfprom: qfprom@700000 {
+@@ -430,13 +435,35 @@
                        reg = <0x00700000 0x1000>;
                        #address-cells = <1>;
                        #size-cells = <1>;
 +                      };
                };
  
-               gcc: clock-controller@900000 {
-@@ -437,9 +447,21 @@ gcc: clock-controller@900000 {
                gcc: clock-controller@900000 {
 -                      compatible = "qcom,gcc-ipq8064";
 +                      compatible = "qcom,gcc-ipq8064", "syscon";
                };
  
                tcsr: syscon@1a400000 {
-@@ -625,13 +629,13 @@
+@@ -740,13 +767,13 @@
                        qcom,ee = <0>;
                };
  
                                status          = "disabled";
                                compatible      = "arm,pl18x", "arm,primecell";
                                arm,primecell-periphid = <0x00051180>;
-@@ -645,13 +649,12 @@
+@@ -760,13 +787,12 @@
                                non-removable;
                                cap-sd-highspeed;
                                cap-mmc-highspeed;
index be4ccc8e1285e73a15bdce23721f4711ed716136..140eeb54c7d4b82d44305c5dc9b8e2d613864345 100644 (file)
                };
  
                cpu1: cpu@1 {
-@@ -47,17 +47,350 @@
-                       enable-method = "qcom,kpss-acc-v1";
-                       device_type = "cpu";
-                       reg = <1>;
--                      next-level-cache = <&L2>;
--                      qcom,acc = <&acc1>;
--                      qcom,saw = <&saw1>;
-+                      next-level-cache = <&L2>;
-+                      qcom,acc = <&acc1>;
-+                      qcom,saw = <&saw1>;
+@@ -38,14 +50,347 @@
+                       next-level-cache = <&L2>;
+                       qcom,acc = <&acc1>;
+                       qcom,saw = <&saw1>;
 +                      clocks = <&kraitcc 1>, <&kraitcc 4>;
 +                      clock-names = "cpu", "l2";
 +                      clock-latency = <100000>;
@@ -84,9 +78,9 @@
 +                      opp-microvolt = <1150000>;
 +                      clock-latency-ns = <100000>;
 +                      opp-level = <2>;
-+              };
-+      };
-+
+               };
+       };
 +      opp_table0: opp_table0 {
 +              compatible = "operating-points-v2-kryo-cpu";
 +              nvmem-cells = <&speedbin_efuse>;
 +                      opp-supported-hw = <0x1>;
 +                      clock-latency-ns = <100000>;
 +                      opp-level = <2>;
-               };
-       };
++              };
++      };
++
 +      thermal-zones {
 +              tsens_tz_sensor0 {
 +                      polling-delay-passive = <0>;
        memory {
                device_type = "memory";
                reg = <0x0 0x0>;
-@@ -93,6 +552,15 @@
+@@ -93,6 +438,15 @@
                };
        };
  
        firmware {
                scm {
                        compatible = "qcom,scm-ipq806x", "qcom,scm";
-@@ -120,6 +588,78 @@
+@@ -120,6 +474,78 @@
                        reg-names = "lpass-lpaif";
                };
  
                qcom_pinmux: pinmux@800000 {
                        compatible = "qcom,ipq8064-pinctrl";
                        reg = <0x800000 0x4000>;
-@@ -159,6 +705,15 @@
+@@ -160,6 +586,15 @@
                                };
                        };
  
                        spi_pins: spi_pins {
                                mux {
                                        pins = "gpio18", "gpio19", "gpio21";
-@@ -168,6 +723,53 @@
+@@ -169,6 +604,53 @@
                                };
                        };
  
                        leds_pins: leds_pins {
                                mux {
                                        pins = "gpio7", "gpio8", "gpio9",
-@@ -229,6 +831,17 @@
+@@ -231,6 +713,17 @@
                        clock-output-names = "acpu1_aux";
                };
  
                saw0: regulator@2089000 {
                        compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
                        reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
-@@ -241,6 +854,17 @@
+@@ -243,6 +736,17 @@
                        regulator;
                };
  
                gsbi2: gsbi@12480000 {
                        compatible = "qcom,gsbi-v1.0.0";
                        cell-index = <2>;
-@@ -448,6 +1081,95 @@
+@@ -478,6 +982,95 @@
                        #reset-cells = <1>;
                };
  
                pcie0: pci@1b500000 {
                        compatible = "qcom,pcie-ipq8064";
                        reg = <0x1b500000 0x1000
-@@ -601,6 +1323,59 @@
-                       perst-gpio = <&qcom_pinmux 63 GPIO_ACTIVE_LOW>;
+@@ -739,6 +1332,59 @@
+                       status = "disabled";
                };
  
 +              adm_dma: dma@18300000 {
                vsdcc_fixed: vsdcc-regulator {
                        compatible = "regulator-fixed";
                        regulator-name = "SDCC Power";
-@@ -676,4 +1559,17 @@
+@@ -814,4 +1460,17 @@
                        };
                };
        };
index 85ad64ced01446f0287aedde970cd158baa5c5ba..8423fd137f99cea56d32e3441c9b59c24c96a7cc 100644 (file)
@@ -1,8 +1,6 @@
-diff --git a/qcom-ipq8064-rb3011.dts.orig b/qcom-ipq8064-rb3011.dts
-index 282b89ce3d..4faaa95b33 100644
 --- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
 +++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
-@@ -24,73 +24,6 @@ memory@0 {
+@@ -24,73 +24,6 @@
                device_type = "memory";
        };
  
@@ -76,7 +74,7 @@ index 282b89ce3d..4faaa95b33 100644
        mdio1: mdio@1 {
                status = "okay";
                compatible = "virtual,mdio-gpio";
-@@ -216,6 +149,68 @@ led@7 {
+@@ -216,6 +149,68 @@
        };
  };
  
index afc92871189c9d8b561cc224cdd1496baf00a83f..19c3d096c416f9362ee41a1cabb81a895a65d54d 100644 (file)
@@ -11,8 +11,6 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  drivers/cpufreq/qcom-cpufreq-nvmem.c | 15 +++++++++++++++
  1 file changed, 15 insertions(+)
 
-diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c
-index d1744b5d9619..4866c74ead0f 100644
 --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
 +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
 @@ -52,6 +52,7 @@ struct qcom_cpufreq_match_data {
@@ -23,7 +21,7 @@ index d1744b5d9619..4866c74ead0f 100644
  };
  
  struct qcom_cpufreq_drv {
-@@ -250,6 +251,7 @@ static const struct qcom_cpufreq_match_data match_data_kryo = {
+@@ -250,6 +251,7 @@ static const struct qcom_cpufreq_match_d
  
  static const struct qcom_cpufreq_match_data match_data_krait = {
        .get_version = qcom_cpufreq_krait_name_version,
@@ -31,7 +29,7 @@ index d1744b5d9619..4866c74ead0f 100644
  };
  
  static const char *qcs404_genpd_names[] = { "cpr", NULL };
-@@ -385,6 +387,19 @@ static int qcom_cpufreq_probe(struct platform_device *pdev)
+@@ -385,6 +387,19 @@ static int qcom_cpufreq_probe(struct pla
                }
        }
  
@@ -51,6 +49,3 @@ index d1744b5d9619..4866c74ead0f 100644
        cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
                                                          NULL, 0);
        if (!IS_ERR(cpufreq_dt_pdev)) {
--- 
-2.29.2
-
index a09453e1429d0aa16b6301fabcdde898c322b3ef..3067ec777a43461f5a06938d62ed28cc527c6de5 100644 (file)
@@ -15,8 +15,6 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  drivers/clk/qcom/gcc-ipq806x.c | 19 +++++++++++++------
  1 file changed, 13 insertions(+), 6 deletions(-)
 
-diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
-index d6b7adb4be38..fbb8644c4a43 100644
 --- a/drivers/clk/qcom/gcc-ipq806x.c
 +++ b/drivers/clk/qcom/gcc-ipq806x.c
 @@ -65,6 +65,7 @@ static struct clk_pll pll3 = {
@@ -36,7 +34,7 @@ index d6b7adb4be38..fbb8644c4a43 100644
                },
        },
  };
-@@ -798,7 +799,7 @@ static struct clk_branch gsbi4_qup_clk = {
+@@ -798,7 +799,7 @@ static struct clk_branch gsbi4_qup_clk =
                        .parent_names = (const char *[]){ "gsbi4_qup_src" },
                        .num_parents = 1,
                        .ops = &clk_branch_ops,
@@ -54,7 +52,7 @@ index d6b7adb4be38..fbb8644c4a43 100644
                },
        },
  };
-@@ -945,7 +946,7 @@ static struct clk_branch gsbi7_qup_clk = {
+@@ -945,7 +946,7 @@ static struct clk_branch gsbi7_qup_clk =
                        .parent_names = (const char *[]){ "gsbi7_qup_src" },
                        .num_parents = 1,
                        .ops = &clk_branch_ops,
@@ -95,7 +93,7 @@ index d6b7adb4be38..fbb8644c4a43 100644
                },
        }
  };
-@@ -2694,7 +2699,8 @@ static struct clk_dyn_rcg ubi32_core1_src_clk = {
+@@ -2694,7 +2699,8 @@ static struct clk_dyn_rcg ubi32_core1_sr
                        .parent_names = gcc_pxo_pll8_pll14_pll18_pll0,
                        .num_parents = 5,
                        .ops = &clk_dyn_rcg_ops,
@@ -105,7 +103,7 @@ index d6b7adb4be38..fbb8644c4a43 100644
                },
        },
  };
-@@ -2747,7 +2753,8 @@ static struct clk_dyn_rcg ubi32_core2_src_clk = {
+@@ -2747,7 +2753,8 @@ static struct clk_dyn_rcg ubi32_core2_sr
                        .parent_names = gcc_pxo_pll8_pll14_pll18_pll0,
                        .num_parents = 5,
                        .ops = &clk_dyn_rcg_ops,
@@ -115,6 +113,3 @@ index d6b7adb4be38..fbb8644c4a43 100644
                },
        },
  };
--- 
-2.29.2
-
index 877f751537d5afe925353c6d49828833d6b7e13e..cd2cb333564420c1d31b71ee2271d134951e7ae0 100644 (file)
@@ -11,8 +11,6 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  include/dt-bindings/clock/qcom,lcc-ipq806x.h | 1 +
  2 files changed, 9 insertions(+)
 
-diff --git a/drivers/clk/qcom/lcc-ipq806x.c b/drivers/clk/qcom/lcc-ipq806x.c
-index 1a2be4aeb31d..ee48642bb872 100644
 --- a/drivers/clk/qcom/lcc-ipq806x.c
 +++ b/drivers/clk/qcom/lcc-ipq806x.c
 @@ -12,6 +12,7 @@
@@ -42,7 +40,7 @@ index 1a2be4aeb31d..ee48642bb872 100644
  static const struct pll_config pll4_config = {
        .l = 0xf,
        .m = 0x91,
-@@ -417,6 +423,8 @@ static const struct qcom_cc_desc lcc_ipq806x_desc = {
+@@ -417,6 +423,8 @@ static const struct qcom_cc_desc lcc_ipq
        .config = &lcc_ipq806x_regmap_config,
        .clks = lcc_ipq806x_clks,
        .num_clks = ARRAY_SIZE(lcc_ipq806x_clks),
@@ -51,8 +49,6 @@ index 1a2be4aeb31d..ee48642bb872 100644
  };
  
  static const struct of_device_id lcc_ipq806x_match_table[] = {
-diff --git a/include/dt-bindings/clock/qcom,lcc-ipq806x.h b/include/dt-bindings/clock/qcom,lcc-ipq806x.h
-index 25b92bbf0ab4..73318b1ce29e 100644
 --- a/include/dt-bindings/clock/qcom,lcc-ipq806x.h
 +++ b/include/dt-bindings/clock/qcom,lcc-ipq806x.h
 @@ -19,4 +19,5 @@
@@ -61,6 +57,3 @@ index 25b92bbf0ab4..73318b1ce29e 100644
  
 +#define LCC_PCM_RESET                 0
  #endif
--- 
-2.29.2
-
index 777c54c83ad735aeca89a19f18e00ce5723375f4..bf1c1a4a2fdf2c2202548c86d435947edcbe9bc5 100644 (file)
@@ -11,11 +11,9 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  drivers/clk/qcom/clk-krait.c | 27 +++++++++++++++++++++++++--
  1 file changed, 25 insertions(+), 2 deletions(-)
 
-diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c
-index 59f1af415b58..ba796b621669 100644
 --- a/drivers/clk/qcom/clk-krait.c
 +++ b/drivers/clk/qcom/clk-krait.c
-@@ -68,7 +68,25 @@ static u8 krait_mux_get_parent(struct clk_hw *hw)
+@@ -68,7 +68,25 @@ static u8 krait_mux_get_parent(struct cl
        return clk_mux_val_to_index(hw, mux->parent_map, 0, sel);
  }
  
@@ -57,6 +55,3 @@ index 59f1af415b58..ba796b621669 100644
  }
  
  static int krait_div2_set_rate(struct clk_hw *hw, unsigned long rate,
--- 
-2.29.2
-
index 1231f88e9bd10c40b1034836713c8b953054cbaa..f8f4924dd16ea71cdc8ea5638f68fc663e046971 100644 (file)
@@ -13,8 +13,6 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  include/dt-bindings/reset/qcom,gcc-ipq806x.h |   5 +
  3 files changed, 259 insertions(+), 1 deletion(-)
 
-diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
-index fbb8644c4a43..c36bcdf013d0 100644
 --- a/drivers/clk/qcom/gcc-ipq806x.c
 +++ b/drivers/clk/qcom/gcc-ipq806x.c
 @@ -223,7 +223,9 @@ static struct clk_regmap pll14_vote = {
@@ -58,7 +56,7 @@ index fbb8644c4a43..c36bcdf013d0 100644
  };
  
  static const struct parent_map gcc_pxo_pll8_map[] = {
-@@ -320,6 +339,42 @@ static const char * const gcc_pxo_pll8_pll14_pll18_pll0[] = {
+@@ -320,6 +339,42 @@ static const char * const gcc_pxo_pll8_p
        "pll18",
  };
  
@@ -101,7 +99,7 @@ index fbb8644c4a43..c36bcdf013d0 100644
  static struct freq_tbl clk_tbl_gsbi_uart[] = {
        {  1843200, P_PLL8, 2,  6, 625 },
        {  3686400, P_PLL8, 2, 12, 625 },
-@@ -1261,6 +1316,7 @@ static const struct freq_tbl clk_tbl_sdc[] = {
+@@ -1261,6 +1316,7 @@ static const struct freq_tbl clk_tbl_sdc
        {  20210000, P_PLL8,  1, 1,  19 },
        {  24000000, P_PLL8,  4, 1,   4 },
        {  48000000, P_PLL8,  4, 1,   2 },
@@ -109,7 +107,7 @@ index fbb8644c4a43..c36bcdf013d0 100644
        {  64000000, P_PLL8,  3, 1,   2 },
        {  96000000, P_PLL8,  4, 0,   0 },
        { 192000000, P_PLL8,  2, 0,   0 },
-@@ -2647,7 +2703,9 @@ static const struct freq_tbl clk_tbl_nss[] = {
+@@ -2647,7 +2703,9 @@ static const struct freq_tbl clk_tbl_nss
        { 110000000, P_PLL18, 1, 1, 5 },
        { 275000000, P_PLL18, 2, 0, 0 },
        { 550000000, P_PLL18, 1, 0, 0 },
@@ -119,7 +117,7 @@ index fbb8644c4a43..c36bcdf013d0 100644
        { }
  };
  
-@@ -2759,6 +2817,186 @@ static struct clk_dyn_rcg ubi32_core2_src_clk = {
+@@ -2759,6 +2817,186 @@ static struct clk_dyn_rcg ubi32_core2_sr
        },
  };
  
@@ -306,7 +304,7 @@ index fbb8644c4a43..c36bcdf013d0 100644
  static struct clk_regmap *gcc_ipq806x_clks[] = {
        [PLL0] = &pll0.clkr,
        [PLL0_VOTE] = &pll0_vote,
-@@ -2766,6 +3004,7 @@ static struct clk_regmap *gcc_ipq806x_clks[] = {
+@@ -2766,6 +3004,7 @@ static struct clk_regmap *gcc_ipq806x_cl
        [PLL4_VOTE] = &pll4_vote,
        [PLL8] = &pll8.clkr,
        [PLL8_VOTE] = &pll8_vote,
@@ -314,7 +312,7 @@ index fbb8644c4a43..c36bcdf013d0 100644
        [PLL14] = &pll14.clkr,
        [PLL14_VOTE] = &pll14_vote,
        [PLL18] = &pll18.clkr,
-@@ -2880,6 +3119,12 @@ static struct clk_regmap *gcc_ipq806x_clks[] = {
+@@ -2880,6 +3119,12 @@ static struct clk_regmap *gcc_ipq806x_cl
        [PLL9] = &hfpll0.clkr,
        [PLL10] = &hfpll1.clkr,
        [PLL12] = &hfpll_l2.clkr,
@@ -327,7 +325,7 @@ index fbb8644c4a43..c36bcdf013d0 100644
  };
  
  static const struct qcom_reset_map gcc_ipq806x_resets[] = {
-@@ -3011,6 +3256,11 @@ static const struct qcom_reset_map gcc_ipq806x_resets[] = {
+@@ -3011,6 +3256,11 @@ static const struct qcom_reset_map gcc_i
        [GMAC_CORE3_RESET] = { 0x3cfc, 0 },
        [GMAC_CORE4_RESET] = { 0x3d1c, 0 },
        [GMAC_AHB_RESET] = { 0x3e24, 0 },
@@ -339,8 +337,6 @@ index fbb8644c4a43..c36bcdf013d0 100644
        [NSS_CH0_RST_RX_CLK_N_RESET] = { 0x3b60, 0 },
        [NSS_CH0_RST_TX_CLK_N_RESET] = { 0x3b60, 1 },
        [NSS_CH0_RST_RX_125M_N_RESET] = { 0x3b60, 2 },
-diff --git a/include/dt-bindings/clock/qcom,gcc-ipq806x.h b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
-index 7deec14a6dee..02262d2ac899 100644
 --- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h
 +++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
 @@ -240,7 +240,7 @@
@@ -361,8 +357,6 @@ index 7deec14a6dee..02262d2ac899 100644
 +#define CE5_CORE_CLK_SRC                      287
  
  #endif
-diff --git a/include/dt-bindings/reset/qcom,gcc-ipq806x.h b/include/dt-bindings/reset/qcom,gcc-ipq806x.h
-index 26b6f9200620..020c9cf18751 100644
 --- a/include/dt-bindings/reset/qcom,gcc-ipq806x.h
 +++ b/include/dt-bindings/reset/qcom,gcc-ipq806x.h
 @@ -163,5 +163,10 @@
@@ -376,6 +370,3 @@ index 26b6f9200620..020c9cf18751 100644
 +#define CRYPTO_AHB_RESET                              161
  
  #endif
--- 
-2.29.2
-
index 81ec0883cda77e823c63272570dcd848174b8b23..316e18b79061edd2d06d52ed196209bcba106f65 100644 (file)
@@ -11,9 +11,6 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  1 file changed, 221 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-krait.yaml
 
-diff --git a/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-krait.yaml b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-krait.yaml
-new file mode 100644
-index 000000000000..f6bcca863d9a
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-krait.yaml
 @@ -0,0 +1,221 @@
@@ -238,6 +235,3 @@ index 000000000000..f6bcca863d9a
 +    };
 +
 +...
--- 
-2.29.2
-
index 29dff3297deefcba67a58c4468d124cb142b105a..fe9143218f3d7568760eda6e2a9866642abd1d6f 100644 (file)
  
  #include "cpufreq-dt.h"
  
-@@ -58,6 +59,13 @@ static int set_target(struct cpufreq_policy *policy, unsigned int index)
+@@ -54,6 +55,13 @@ static int set_target(struct cpufreq_pol
                level = dev_pm_opp_get_level(opp);
                dev_pm_opp_put(opp);
  
index 06b842382e8bd3795bc9997257c6abf669dd1455..26c64d68c4da93a90560cccdddcecc61e6e05160 100644 (file)
@@ -14,11 +14,9 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  drivers/mtd/nand/raw/qcom_nandc.c | 82 +++++++++++++++++++++++++++++--
  1 file changed, 77 insertions(+), 5 deletions(-)
 
-diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
-index 667e4bfe369f..69be86898d7a 100644
 --- a/drivers/mtd/nand/raw/qcom_nandc.c
 +++ b/drivers/mtd/nand/raw/qcom_nandc.c
-@@ -160,6 +160,11 @@
+@@ -159,6 +159,11 @@
  /* NAND_CTRL bits */
  #define       BAM_MODE_EN                     BIT(0)
  
@@ -30,7 +28,7 @@ index 667e4bfe369f..69be86898d7a 100644
  /*
   * the NAND controller performs reads/writes with ECC in 516 byte chunks.
   * the driver calls the chunks 'step' or 'codeword' interchangeably
-@@ -431,6 +436,13 @@ struct qcom_nand_controller {
+@@ -430,6 +435,13 @@ struct qcom_nand_controller {
   * @cfg0, cfg1, cfg0_raw..:   NANDc register configurations needed for
   *                            ecc/non-ecc mode for the current nand flash
   *                            device
@@ -44,7 +42,7 @@ index 667e4bfe369f..69be86898d7a 100644
   */
  struct qcom_nand_host {
        struct nand_chip chip;
-@@ -453,6 +465,9 @@ struct qcom_nand_host {
+@@ -452,6 +464,9 @@ struct qcom_nand_host {
        u32 ecc_bch_cfg;
        u32 clrflashstatus;
        u32 clrreadstatus;
@@ -54,7 +52,7 @@ index 667e4bfe369f..69be86898d7a 100644
  };
  
  /*
-@@ -462,6 +477,7 @@ struct qcom_nand_host {
+@@ -460,12 +475,14 @@ struct qcom_nand_host {
   * @ecc_modes - ecc mode for NAND
   * @is_bam - whether NAND controller is using BAM
   * @is_qpic - whether NAND CTRL is part of qpic IP
@@ -62,15 +60,14 @@ index 667e4bfe369f..69be86898d7a 100644
   * @dev_cmd_reg_start - NAND_DEV_CMD_* registers starting offset
   */
  struct qcom_nandc_props {
-@@ -469,6 +485,7 @@ struct qcom_nandc_props {
+       u32 ecc_modes;
        bool is_bam;
        bool is_qpic;
 +      bool has_boot_pages;
        u32 dev_cmd_reg_start;
  };
  
- /* Frees the BAM transaction memory */
-@@ -1622,7 +1639,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip,
+@@ -1604,7 +1621,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *
        data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1);
        oob_size1 = host->bbm_size;
  
@@ -79,7 +76,7 @@ index 667e4bfe369f..69be86898d7a 100644
                data_size2 = ecc->size - data_size1 -
                             ((ecc->steps - 1) * 4);
                oob_size2 = (ecc->steps * 4) + host->ecc_bytes_hw +
-@@ -1703,7 +1720,7 @@ check_for_erased_page(struct qcom_nand_host *host, u8 *data_buf,
+@@ -1685,7 +1702,7 @@ check_for_erased_page(struct qcom_nand_h
        }
  
        for_each_set_bit(cw, &uncorrectable_cws, ecc->steps) {
@@ -88,7 +85,7 @@ index 667e4bfe369f..69be86898d7a 100644
                        data_size = ecc->size - ((ecc->steps - 1) * 4);
                        oob_size = (ecc->steps * 4) + host->ecc_bytes_hw;
                } else {
-@@ -1862,7 +1879,7 @@ static int read_page_ecc(struct qcom_nand_host *host, u8 *data_buf,
+@@ -1844,7 +1861,7 @@ static int read_page_ecc(struct qcom_nan
        for (i = 0; i < ecc->steps; i++) {
                int data_size, oob_size;
  
@@ -97,7 +94,7 @@ index 667e4bfe369f..69be86898d7a 100644
                        data_size = ecc->size - ((ecc->steps - 1) << 2);
                        oob_size = (ecc->steps << 2) + host->ecc_bytes_hw +
                                   host->spare_bytes;
-@@ -1959,6 +1976,30 @@ static int copy_last_cw(struct qcom_nand_host *host, int page)
+@@ -1941,6 +1958,30 @@ static int copy_last_cw(struct qcom_nand
        return ret;
  }
  
@@ -128,7 +125,7 @@ index 667e4bfe369f..69be86898d7a 100644
  /* implements ecc->read_page() */
  static int qcom_nandc_read_page(struct nand_chip *chip, uint8_t *buf,
                                int oob_required, int page)
-@@ -1967,6 +2008,9 @@ static int qcom_nandc_read_page(struct nand_chip *chip, uint8_t *buf,
+@@ -1949,6 +1990,9 @@ static int qcom_nandc_read_page(struct n
        struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
        u8 *data_buf, *oob_buf = NULL;
  
@@ -138,7 +135,7 @@ index 667e4bfe369f..69be86898d7a 100644
        nand_read_page_op(chip, page, 0, NULL, 0);
        data_buf = buf;
        oob_buf = oob_required ? chip->oob_poi : NULL;
-@@ -1986,6 +2030,9 @@ static int qcom_nandc_read_page_raw(struct nand_chip *chip, uint8_t *buf,
+@@ -1968,6 +2012,9 @@ static int qcom_nandc_read_page_raw(stru
        int cw, ret;
        u8 *data_buf = buf, *oob_buf = chip->oob_poi;
  
@@ -148,7 +145,7 @@ index 667e4bfe369f..69be86898d7a 100644
        for (cw = 0; cw < ecc->steps; cw++) {
                ret = qcom_nandc_read_cw_raw(mtd, chip, data_buf, oob_buf,
                                             page, cw);
-@@ -2006,6 +2053,9 @@ static int qcom_nandc_read_oob(struct nand_chip *chip, int page)
+@@ -1988,6 +2035,9 @@ static int qcom_nandc_read_oob(struct na
        struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
        struct nand_ecc_ctrl *ecc = &chip->ecc;
  
@@ -158,7 +155,7 @@ index 667e4bfe369f..69be86898d7a 100644
        clear_read_regs(nandc);
        clear_bam_transaction(nandc);
  
-@@ -2026,6 +2076,9 @@ static int qcom_nandc_write_page(struct nand_chip *chip, const uint8_t *buf,
+@@ -2008,6 +2058,9 @@ static int qcom_nandc_write_page(struct
        u8 *data_buf, *oob_buf;
        int i, ret;
  
@@ -168,7 +165,7 @@ index 667e4bfe369f..69be86898d7a 100644
        nand_prog_page_begin_op(chip, page, 0, NULL, 0);
  
        clear_read_regs(nandc);
-@@ -2041,7 +2094,7 @@ static int qcom_nandc_write_page(struct nand_chip *chip, const uint8_t *buf,
+@@ -2023,7 +2076,7 @@ static int qcom_nandc_write_page(struct
        for (i = 0; i < ecc->steps; i++) {
                int data_size, oob_size;
  
@@ -177,7 +174,7 @@ index 667e4bfe369f..69be86898d7a 100644
                        data_size = ecc->size - ((ecc->steps - 1) << 2);
                        oob_size = (ecc->steps << 2) + host->ecc_bytes_hw +
                                   host->spare_bytes;
-@@ -2098,6 +2151,9 @@ static int qcom_nandc_write_page_raw(struct nand_chip *chip,
+@@ -2080,6 +2133,9 @@ static int qcom_nandc_write_page_raw(str
        u8 *data_buf, *oob_buf;
        int i, ret;
  
@@ -187,7 +184,7 @@ index 667e4bfe369f..69be86898d7a 100644
        nand_prog_page_begin_op(chip, page, 0, NULL, 0);
        clear_read_regs(nandc);
        clear_bam_transaction(nandc);
-@@ -2116,7 +2172,7 @@ static int qcom_nandc_write_page_raw(struct nand_chip *chip,
+@@ -2098,7 +2154,7 @@ static int qcom_nandc_write_page_raw(str
                data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1);
                oob_size1 = host->bbm_size;
  
@@ -196,7 +193,7 @@ index 667e4bfe369f..69be86898d7a 100644
                        data_size2 = ecc->size - data_size1 -
                                     ((ecc->steps - 1) << 2);
                        oob_size2 = (ecc->steps << 2) + host->ecc_bytes_hw +
-@@ -2176,6 +2232,9 @@ static int qcom_nandc_write_oob(struct nand_chip *chip, int page)
+@@ -2158,6 +2214,9 @@ static int qcom_nandc_write_oob(struct n
        int data_size, oob_size;
        int ret;
  
@@ -206,7 +203,7 @@ index 667e4bfe369f..69be86898d7a 100644
        host->use_ecc = true;
        clear_bam_transaction(nandc);
  
-@@ -2828,6 +2887,7 @@ static int qcom_nand_host_init_and_register(struct qcom_nand_controller *nandc,
+@@ -2806,6 +2865,7 @@ static int qcom_nand_host_init_and_regis
        struct nand_chip *chip = &host->chip;
        struct mtd_info *mtd = nand_to_mtd(chip);
        struct device *dev = nandc->dev;
@@ -214,7 +211,7 @@ index 667e4bfe369f..69be86898d7a 100644
        int ret;
  
        ret = of_property_read_u32(dn, "reg", &host->cs);
-@@ -2888,6 +2948,17 @@ static int qcom_nand_host_init_and_register(struct qcom_nand_controller *nandc,
+@@ -2866,6 +2926,17 @@ static int qcom_nand_host_init_and_regis
        if (ret)
                nand_cleanup(chip);
  
@@ -232,7 +229,7 @@ index 667e4bfe369f..69be86898d7a 100644
        return ret;
  }
  
-@@ -3057,6 +3128,7 @@ static int qcom_nandc_remove(struct platform_device *pdev)
+@@ -3035,6 +3106,7 @@ static int qcom_nandc_remove(struct plat
  static const struct qcom_nandc_props ipq806x_nandc_props = {
        .ecc_modes = (ECC_RS_4BIT | ECC_BCH_8BIT),
        .is_bam = false,
@@ -240,6 +237,3 @@ index 667e4bfe369f..69be86898d7a 100644
        .dev_cmd_reg_start = 0x0,
  };
  
--- 
-2.29.2
-
index 2bef1daefb598dca2c8a460ad6b8e81dafb917b8..79036cb057acce935385c4b2f1c294c195a363ea 100644 (file)
@@ -12,11 +12,9 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 11 +++++++++++
  1 file changed, 11 insertions(+)
 
-diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
-index 5647913d8837..3cf1dd5ebad2 100644
 --- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
 +++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
-@@ -56,6 +56,15 @@ Optional properties:
+@@ -52,6 +52,15 @@ Optional properties:
                        be used according to chip requirement and available
                        OOB size.
  
@@ -32,7 +30,7 @@ index 5647913d8837..3cf1dd5ebad2 100644
  Each nandcs device node may optionally contain a 'partitions' sub-node, which
  further contains sub-nodes describing the flash partition mapping. See
  partition.txt for more detail.
-@@ -84,6 +93,9 @@ nand-controller@1ac00000 {
+@@ -80,6 +89,9 @@ nand-controller@1ac00000 {
                nand-ecc-strength = <4>;
                nand-bus-width = <8>;
  
@@ -42,6 +40,3 @@ index 5647913d8837..3cf1dd5ebad2 100644
                partitions {
                        compatible = "fixed-partitions";
                        #address-cells = <1>;
--- 
-2.29.2
-
index 45062d52fc6f2ab3c3164a27adec7e91ed956e67..2d24da01e44d5e05402a5e35fef805d053cf9882 100644 (file)
@@ -31,8 +31,6 @@ Signed-off-by: Vinod Koul <vkoul@kernel.org>
  3 files changed, 915 insertions(+)
  create mode 100644 drivers/dma/qcom/qcom_adm.c
 
-diff --git a/drivers/dma/qcom/Kconfig b/drivers/dma/qcom/Kconfig
-index 3bcb689162c67..0389d60d2604a 100644
 --- a/drivers/dma/qcom/Kconfig
 +++ b/drivers/dma/qcom/Kconfig
 @@ -1,4 +1,15 @@
@@ -51,8 +49,6 @@ index 3bcb689162c67..0389d60d2604a 100644
  config QCOM_BAM_DMA
        tristate "QCOM BAM DMA support"
        depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM)
-diff --git a/drivers/dma/qcom/Makefile b/drivers/dma/qcom/Makefile
-index 1ae92da88b0c9..346e643fbb6db 100644
 --- a/drivers/dma/qcom/Makefile
 +++ b/drivers/dma/qcom/Makefile
 @@ -1,4 +1,5 @@
@@ -61,9 +57,6 @@ index 1ae92da88b0c9..346e643fbb6db 100644
  obj-$(CONFIG_QCOM_BAM_DMA) += bam_dma.o
  obj-$(CONFIG_QCOM_HIDMA_MGMT) += hdma_mgmt.o
  hdma_mgmt-objs         := hidma_mgmt.o hidma_mgmt_sys.o
-diff --git a/drivers/dma/qcom/qcom_adm.c b/drivers/dma/qcom/qcom_adm.c
-new file mode 100644
-index 0000000000000..9b6f8e050ecce
 --- /dev/null
 +++ b/drivers/dma/qcom/qcom_adm.c
 @@ -0,0 +1,903 @@
@@ -970,6 +963,3 @@ index 0000000000000..9b6f8e050ecce
 +MODULE_AUTHOR("Andy Gross <agross@codeaurora.org>");
 +MODULE_DESCRIPTION("QCOM ADM DMA engine driver");
 +MODULE_LICENSE("GPL v2");
--- 
-cgit 1.2.3-1.el7
-
index 7aec4fcc835920f22175556ee87c431a7dfcdd09..d93f338c747cce0e6cdaacd69b7a71cac9cf7439 100644 (file)
@@ -17,15 +17,12 @@ Link: https://lore.kernel.org/linux-mtd/20210104041137.113075-3-manivannan.sadha
  3 files changed, 179 insertions(+)
  create mode 100644 drivers/mtd/parsers/qcomsmempart.c
 
-diff --git a/drivers/mtd/parsers/Kconfig b/drivers/mtd/parsers/Kconfig
-index e72354322f628..d90c302290522 100644
 --- a/drivers/mtd/parsers/Kconfig
 +++ b/drivers/mtd/parsers/Kconfig
-@@ -160,6 +160,14 @@ config MTD_REDBOOT_PARTS_READONLY
-         'FIS directory' images, enable this option.
+@@ -186,6 +186,14 @@ config MTD_REDBOOT_PARTS_READONLY
  
  endif # MTD_REDBOOT_PARTS
-+
 +config MTD_QCOMSMEM_PARTS
 +      tristate "Qualcomm SMEM NAND flash partition parser"
 +      depends on MTD_NAND_QCOM || COMPILE_TEST
@@ -33,22 +30,18 @@ index e72354322f628..d90c302290522 100644
 +      help
 +        This provides support for parsing partitions from Shared Memory (SMEM)
 +        for NAND flash on Qualcomm platforms.
++
  config MTD_ROUTERBOOT_PARTS
        tristate "RouterBoot flash partition parser"
-diff --git a/drivers/mtd/parsers/Makefile b/drivers/mtd/parsers/Makefile
-index b0c5f62f9e858..50eb0b0a22105 100644
+       depends on MTD && OF
 --- a/drivers/mtd/parsers/Makefile
 +++ b/drivers/mtd/parsers/Makefile
-@@ -9,4 +9,5 @@ obj-$(CONFIG_MTD_AFS_PARTS)            += afs.o
+@@ -12,4 +12,5 @@ obj-$(CONFIG_MTD_AFS_PARTS)          += afs.o
  obj-$(CONFIG_MTD_PARSER_TRX)          += parser_trx.o
  obj-$(CONFIG_MTD_SHARPSL_PARTS)               += sharpslpart.o
  obj-$(CONFIG_MTD_REDBOOT_PARTS)               += redboot.o
 +obj-$(CONFIG_MTD_QCOMSMEM_PARTS)      += qcomsmempart.o
  obj-$(CONFIG_MTD_ROUTERBOOT_PARTS)            += routerbootpart.o
-diff --git a/drivers/mtd/parsers/qcomsmempart.c b/drivers/mtd/parsers/qcomsmempart.c
-new file mode 100644
-index 0000000000000..808cb33d71f8e
 --- /dev/null
 +++ b/drivers/mtd/parsers/qcomsmempart.c
 @@ -0,0 +1,170 @@
@@ -222,6 +215,3 @@ index 0000000000000..808cb33d71f8e
 +MODULE_LICENSE("GPL v2");
 +MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
 +MODULE_DESCRIPTION("Qualcomm SMEM NAND flash partition parser");
--- 
-cgit 1.2.3-1.el7
-
index 47f3bfba8dfe2e5e0f721c47c3aa2861f36b04b4..e83872935f5d31bfa522c7b1aeae4914c55bb579 100644 (file)
@@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
 
 --- a/drivers/mtd/parsers/qcomsmempart.c
 +++ b/drivers/mtd/parsers/qcomsmempart.c
-@@ -189,6 +189,11 @@ static int parse_qcomsmem_part(st
+@@ -132,6 +132,11 @@ static int parse_qcomsmem_part(struct mt
                parts[i].offset = le32_to_cpu(pentry->offset) * mtd->erasesize;
                parts[i].mask_flags = pentry->attr;
                parts[i].size = le32_to_cpu(pentry->length) * mtd->erasesize;
index e69a97f843ead679f2265cdff39602238f5529a6..64a0eaf8ed3d580a8ba170f5f70dd0053d61d090 100644 (file)
@@ -12,11 +12,9 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  arch/arm/include/asm/io.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
-diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
-index fc748122f1e0..6f3e89f08bd8 100644
 --- a/arch/arm/include/asm/io.h
 +++ b/arch/arm/include/asm/io.h
-@@ -197,7 +197,7 @@ void __iomem *pci_remap_cfgspace(resource_size_t res_cookie, size_t size);
+@@ -197,7 +197,7 @@ void __iomem *pci_remap_cfgspace(resourc
  #ifdef CONFIG_NEED_MACH_IO_H
  #include <mach/io.h>
  #elif defined(CONFIG_PCI)
@@ -25,6 +23,3 @@ index fc748122f1e0..6f3e89f08bd8 100644
  #define __io(a)               __typesafe_io(PCI_IO_VIRT_BASE + ((a) & IO_SPACE_LIMIT))
  #else
  #define __io(a)               __typesafe_io((a) & IO_SPACE_LIMIT)
--- 
-2.30.0
-
index 9e1ac7db049f2e1d72fe245313482ca35a72f343..8325e103893ce6786c014a845977386f4d5b306a 100644 (file)
@@ -2,17 +2,17 @@ From: Christian Lamparter <chunkeey@googlemail.com>
 Subject: SoC: add qualcomm syscon
 --- a/drivers/soc/qcom/Makefile
 +++ b/drivers/soc/qcom/Makefile
-@@ -20,6 +20,7 @@ obj-$(CONFIG_QCOM_SMP2P)     += smp2p.o
+@@ -21,6 +21,7 @@ obj-$(CONFIG_QCOM_SMP2P)     += smp2p.o
  obj-$(CONFIG_QCOM_SMSM)       += smsm.o
  obj-$(CONFIG_QCOM_SOCINFO)    += socinfo.o
  obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
 +obj-$(CONFIG_QCOM_TCSR)        += qcom_tcsr.o
  obj-$(CONFIG_QCOM_APR) += apr.o
- obj-$(CONFIG_QCOM_LLCC) += llcc-slice.o
- obj-$(CONFIG_QCOM_SDM845_LLCC) += llcc-sdm845.o
+ obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
+ obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
 --- a/drivers/soc/qcom/Kconfig
 +++ b/drivers/soc/qcom/Kconfig
-@@ -183,6 +183,13 @@ config QCOM_SOCINFO
+@@ -189,6 +189,13 @@ config QCOM_SOCINFO
         Say yes here to support the Qualcomm socinfo driver, providing
         information about the SoC to user space.
  
index f75f9949046ca9a5eb41ddf9720345ff93d94408..3a83b2de3041b27519ffffe2686ed3029aaf11a1 100644 (file)
@@ -1,6 +1,6 @@
 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-@@ -865,6 +865,41 @@
+@@ -747,6 +747,41 @@
                        reg = <0x12100000 0x10000>;
                };
  
index 49cd68b68d872fc95ae9aa185f19203f71c4735b..2459e6a2f00de151d935cbf99a47f6e77e3a1698 100644 (file)
@@ -1,6 +1,6 @@
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
-@@ -1840,6 +1840,14 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_MANGL
+@@ -1793,6 +1793,14 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_MANGL
  
  endchoice
  
@@ -17,7 +17,7 @@
        default ""
 --- a/drivers/of/fdt.c
 +++ b/drivers/of/fdt.c
-@@ -1060,6 +1060,17 @@ int __init early_init_dt_scan_chosen(uns
+@@ -1056,6 +1056,17 @@ int __init early_init_dt_scan_chosen(uns
        if (p != NULL && l > 0)
                strlcpy(data, p, min(l, COMMAND_LINE_SIZE));
  
index b6b1b047656a0b9e7ef7205f5213fbdcde1271f5..bdcba2a21c8510a2fa2cc02d93f202096e291510 100644 (file)
@@ -1,6 +1,6 @@
 --- a/drivers/of/fdt.c
 +++ b/drivers/of/fdt.c
-@@ -1059,6 +1059,9 @@ int __init early_init_dt_scan_chosen(uns
+@@ -1055,6 +1055,9 @@ int __init early_init_dt_scan_chosen(uns
        p = of_get_flat_dt_prop(node, "bootargs", &l);
        if (p != NULL && l > 0)
                strlcpy(data, p, min(l, COMMAND_LINE_SIZE));