drm/i915: Remove use on gma_bus_addr on gen6+
authorBen Widawsky <ben@bwidawsk.net>
Thu, 17 Jan 2013 20:45:16 +0000 (12:45 -0800)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 17 Jan 2013 21:47:03 +0000 (22:47 +0100)
We have enough info to not use the intel_gtt bridge stuff.

v2: Move setup of mappable_base above the legacy init stuff because we
still need that on older platforms. (Daniel)

v3: Remove the dev_priv hunk which was rebased in by accident

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> (v2)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_dma.c
drivers/gpu/drm/i915/i915_gem_gtt.c
drivers/gpu/drm/i915/intel_ringbuffer.c

index bb622135798a96e46753bdea8ec0e9a693a803d3..468d2a0fc37833df2f0966258e6c7c133f872c6b 100644 (file)
@@ -1426,7 +1426,7 @@ static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
        if (!ap)
                return;
 
-       ap->ranges[0].base = dev_priv->mm.gtt->gma_bus_addr;
+       ap->ranges[0].base = dev_priv->gtt.mappable_base;
        ap->ranges[0].size =
                dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
        primary =
@@ -1543,7 +1543,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
        }
 
        aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
-       dev_priv->gtt.mappable_base = dev_priv->mm.gtt->gma_bus_addr;
 
        dev_priv->gtt.mappable =
                io_mapping_create_wc(dev_priv->gtt.mappable_base,
index 61bfb12e1016bfcbb4d2727a13761d2394533875..0b89305779536e7bf1a7696439612badcff43848 100644 (file)
@@ -691,6 +691,8 @@ int i915_gem_gtt_init(struct drm_device *dev)
        u16 snb_gmch_ctl;
        int ret;
 
+       dev_priv->gtt.mappable_base = pci_resource_start(dev->pdev, 2);
+
        /* On modern platforms we need not worry ourself with the legacy
         * hostbridge query stuff. Skip it entirely
         */
@@ -723,7 +725,6 @@ int i915_gem_gtt_init(struct drm_device *dev)
 
        /* For GEN6+ the PTEs for the ggtt live at 2MB + BAR0 */
        gtt_bus_addr = pci_resource_start(dev->pdev, 0) + (2<<20);
-       dev_priv->mm.gtt->gma_bus_addr = pci_resource_start(dev->pdev, 2);
 
        /* i9xx_setup */
        pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
index 59e02691baf39aa3a25afb5694855ae4e4f4b782..ce1d074874024c597c9c0b39da6ec1dcd58eada5 100644 (file)
@@ -1203,7 +1203,7 @@ static int intel_init_ring_buffer(struct drm_device *dev,
                goto err_unpin;
 
        ring->virtual_start =
-               ioremap_wc(dev_priv->mm.gtt->gma_bus_addr + obj->gtt_offset,
+               ioremap_wc(dev_priv->gtt.mappable_base + obj->gtt_offset,
                           ring->size);
        if (ring->virtual_start == NULL) {
                DRM_ERROR("Failed to map ringbuffer.\n");