Merge tag 'drm-intel-next-2013-11-29' of git://people.freedesktop.org/~danvet/drm...
authorDave Airlie <airlied@redhat.com>
Wed, 18 Dec 2013 00:39:56 +0000 (10:39 +1000)
committerDave Airlie <airlied@redhat.com>
Wed, 18 Dec 2013 00:39:56 +0000 (10:39 +1000)
- some more ppgtt prep patches from Ben
- a few fbc fixes from Ville
- power well rework from Imre
- vlv forcewake improvements from Deepak S, Ville and Jesse
- a few smaller things all over

[airlied: fixup forwcewake conflict]
* tag 'drm-intel-next-2013-11-29' of git://people.freedesktop.org/~danvet/drm-intel: (97 commits)
  drm/i915: Fix port name in vlv_wait_port_ready() timeout warning
  drm/i915: Return a drm_mode_status enum in the mode_valid vfuncs
  drm/i915: add intel_display_power_enabled_sw() for use in atomic ctx
  drm/i915: drop DRM_ERROR in intel_fbdev init
  drm/i915/vlv: use parallel context restore when coming out of RC6
  drm/i915/vlv: use a lower RC6 timeout on VLV
  drm/i915/sdvo: Fix up debug output to not split lines
  drm/i915: make sparse happy for the new vlv mmio read function
  drm/i915: drop the right force-wake engine in the vlv mmio funcs
  drm/i915: Fix GT wake FIFO free entries for VLV
  drm/i915: Report all GTFIFODBG errors
  drm/i915: Enabling DebugFS for valleyview forcewake counts
  drm/i915/vlv: Valleyview support for forcewake Individual power wells.
  drm/i915: Add power well arguments to force wake routines.
  drm/i915: Do not attempt to re-enable an unconnected primary plane
  drm/i915: add a debugfs entry for power domain info
  drm/i915: add a default always-on power well
  drm/i915: don't do BDW/HSW specific powerdomains init on other platforms
  drm/i915: protect HSW power well check with IS_HASWELL in redisable_vga
  drm/i915: use IS_HASWELL/BROADWELL instead of HAS_POWER_WELL
  ...

Conflicts:
drivers/gpu/drm/i915/intel_display.c

12 files changed:
1  2 
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/i915_gem_execbuffer.c
drivers/gpu/drm/i915/i915_gem_gtt.c
drivers/gpu/drm/i915/intel_ddi.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_opregion.c
drivers/gpu/drm/i915/intel_pm.c
drivers/gpu/drm/i915/intel_uncore.c

Simple merge
index ccdbecca070d2340919d5499f80824ddb84db4ac,64ed8f4d991f92b5bca571b78f2fd43923dba615..780f815b6c9f228b17d8cbd11bb93f2ac91fefaf
@@@ -1813,10 -1840,8 +1840,9 @@@ struct drm_i915_file_private 
  #define HAS_IPS(dev)          (IS_ULT(dev) || IS_BROADWELL(dev))
  
  #define HAS_DDI(dev)          (INTEL_INFO(dev)->has_ddi)
- #define HAS_POWER_WELL(dev)   (IS_HASWELL(dev) || IS_BROADWELL(dev))
  #define HAS_FPGA_DBG_UNCLAIMED(dev)   (INTEL_INFO(dev)->has_fpga_dbg)
  #define HAS_PSR(dev)          (IS_HASWELL(dev) || IS_BROADWELL(dev))
 +#define HAS_PC8(dev)          (IS_HASWELL(dev)) /* XXX HSW:ULX */
  
  #define INTEL_PCH_DEVICE_ID_MASK              0xff00
  #define INTEL_PCH_IBX_DEVICE_ID_TYPE          0x3b00
Simple merge
Simple merge
Simple merge
index 080f6fd4e839b2e3a82926b5ba7ae99b871c9d9e,0332d7ca892d59c0ae66b7e8df9f391058a6cc45..0bb3d6d596d98495659667c77bdc6f5cd0811615
@@@ -6402,7 -6583,7 +6583,7 @@@ static void hsw_restore_lcpll(struct dr
  
        /* Make sure we're not on PC8 state before disabling PC8, otherwise
         * we'll hang the machine! */
-       gen6_gt_force_wake_get(dev_priv);
 -      dev_priv->uncore.funcs.force_wake_get(dev_priv, FORCEWAKE_ALL);
++      gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
  
        if (val & LCPLL_POWER_DOWN_ALLOW) {
                val &= ~LCPLL_POWER_DOWN_ALLOW;
                        DRM_ERROR("Switching back to LCPLL failed\n");
        }
  
-       gen6_gt_force_wake_put(dev_priv);
 -      dev_priv->uncore.funcs.force_wake_put(dev_priv, FORCEWAKE_ALL);
++      gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
  }
  
  void hsw_enable_pc8_work(struct work_struct *__work)
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge