#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/mt7623-power.h>
+#include <dt-bindings/reset/mtk-reset.h>
#include "skeleton.dtsi"
/ {
};
ethsys: syscon@1b000000 {
- compatible = "mediatek,mt7623-ethsys";
+ compatible = "mediatek,mt7623-ethsys", "syscon";
reg = <0x1b000000 0x1000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ eth: ethernet@1b100000 {
+ compatible = "mediatek,mt7623-eth", "syscon";
+ reg = <0x1b100000 0x20000>;
+ clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
+ <ðsys CLK_ETHSYS_ESW>,
+ <ðsys CLK_ETHSYS_GP1>,
+ <ðsys CLK_ETHSYS_GP2>,
+ <&apmixedsys CLK_APMIXED_TRGPLL>;
+ clock-names = "ethif", "esw", "gp1", "gp2", "trgpll";
+ power-domains = <&scpsys MT7623_POWER_DOMAIN_ETH>;
+ resets = <ðsys ETHSYS_FE_RST>,
+ <ðsys ETHSYS_MCM_RST>;
+ reset-names = "fe", "mcm";
+ mediatek,ethsys = <ðsys>;
+ status = "disabled";
};
};
};
};
+ð {
+ status = "okay";
+ mediatek,gmac-id = <0>;
+ phy-mode = "rgmii";
+ mediatek,switch = "mt7530";
+ reset-gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_default>;