SUBTARGETS:=generic
KERNEL_PATCHVER:=5.4
-KERNEL_TESTING_PATCHVER:=5.4
+KERNEL_TESTING_PATCHVER:=5.10
define Target/Description
Build firmware images for Broadcom based BCM47xx/53xx routers with ARM CPU, *not* MIPS.
--- /dev/null
+CONFIG_ALIGNMENT_TRAP=y
+CONFIG_ARCH_32BIT_OFF_T=y
+CONFIG_ARCH_BCM=y
+CONFIG_ARCH_BCM_5301X=y
+CONFIG_ARCH_BCM_53573=y
+# CONFIG_ARCH_BCM_HR2 is not set
+CONFIG_ARCH_BCM_IPROC=y
+CONFIG_ARCH_CLOCKSOURCE_DATA=y
+CONFIG_ARCH_HAS_BINFMT_FLAT=y
+CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
+CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
+CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
+CONFIG_ARCH_HAS_KCOV=y
+CONFIG_ARCH_HAS_KEEPINITRD=y
+CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
+CONFIG_ARCH_HAS_PHYS_TO_DMA=y
+CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
+CONFIG_ARCH_HAS_SET_MEMORY=y
+CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
+CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
+CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y
+CONFIG_ARCH_HAS_TICK_BROADCAST=y
+CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_KEEP_MEMBLOCK=y
+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+CONFIG_ARCH_MULTIPLATFORM=y
+CONFIG_ARCH_MULTI_V6_V7=y
+CONFIG_ARCH_MULTI_V7=y
+CONFIG_ARCH_NR_GPIO=0
+CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
+CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
+CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
+CONFIG_ARCH_SUPPORTS_UPROBES=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
+CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
+CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_ARM=y
+CONFIG_ARM_AMBA=y
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ARCH_TIMER=y
+CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
+# CONFIG_ARM_ATAG_DTB_COMPAT is not set
+CONFIG_ARM_ERRATA_754322=y
+CONFIG_ARM_ERRATA_764369=y
+CONFIG_ARM_ERRATA_775420=y
+CONFIG_ARM_GIC=y
+CONFIG_ARM_GLOBAL_TIMER=y
+CONFIG_ARM_HAS_SG_CHAIN=y
+CONFIG_ARM_HEAVY_MB=y
+CONFIG_ARM_L1_CACHE_SHIFT=6
+CONFIG_ARM_L1_CACHE_SHIFT_6=y
+CONFIG_ARM_PATCH_IDIV=y
+CONFIG_ARM_PATCH_PHYS_VIRT=y
+CONFIG_ARM_THUMB=y
+CONFIG_ARM_UNWIND=y
+CONFIG_ARM_VIRT_EXT=y
+CONFIG_ATAGS=y
+CONFIG_AUTO_ZRELADDR=y
+CONFIG_BCM47XX_NVRAM=y
+CONFIG_BCM47XX_SPROM=y
+CONFIG_BCM47XX_WDT=y
+CONFIG_BCMA=y
+CONFIG_BCMA_BLOCKIO=y
+CONFIG_BCMA_DEBUG=y
+CONFIG_BCMA_DRIVER_GMAC_CMN=y
+CONFIG_BCMA_DRIVER_GPIO=y
+CONFIG_BCMA_DRIVER_PCI=y
+CONFIG_BCMA_HOST_PCI=y
+CONFIG_BCMA_HOST_PCI_POSSIBLE=y
+CONFIG_BCMA_HOST_SOC=y
+CONFIG_BCMA_SFLASH=y
+# CONFIG_BCM_CYGNUS_PHY is not set
+CONFIG_BCM_NET_PHYLIB=y
+CONFIG_BCM_NS_THERMAL=y
+CONFIG_BCM_SR_THERMAL=y
+CONFIG_BGMAC=y
+CONFIG_BGMAC_BCMA=y
+# CONFIG_BGMAC_PLATFORM is not set
+CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
+CONFIG_BLK_MQ_PCI=y
+CONFIG_BOUNCE=y
+CONFIG_BROADCOM_PHY=y
+CONFIG_CACHE_L2X0=y
+CONFIG_CC_HAS_KASAN_GENERIC=y
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
+CONFIG_CLKSRC_MMIO=y
+# CONFIG_CLK_BCM_NS2 is not set
+CONFIG_CLK_BCM_NSP=y
+# CONFIG_CLK_BCM_SR is not set
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_COMMON_CLK=y
+CONFIG_COMMON_CLK_IPROC=y
+CONFIG_COMPAT_32BIT_TIME=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_RMAP=y
+CONFIG_CPU_SPECTRE=y
+CONFIG_CPU_THUMB_CAPABLE=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_V7=y
+CONFIG_CRC16=y
+CONFIG_CRYPTO_ACOMP2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_HASH_INFO=y
+CONFIG_CRYPTO_LZO=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_NULL2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_ZSTD=y
+CONFIG_DCACHE_WORD_ACCESS=y
+CONFIG_DEBUG_BCM_5301X=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_LL=y
+CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
+CONFIG_DEBUG_MISC=y
+CONFIG_DEBUG_UART_8250=y
+# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set
+CONFIG_DEBUG_UART_8250_SHIFT=0
+CONFIG_DEBUG_UART_PHYS=0x18000300
+CONFIG_DEBUG_UART_VIRT=0xf1000300
+CONFIG_DEBUG_UNCOMPRESS=y
+CONFIG_DEBUG_USER=y
+CONFIG_DMA_REMAP=y
+CONFIG_DTC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_EDAC_ATOMIC_SCRUB=y
+CONFIG_EDAC_SUPPORT=y
+CONFIG_EXTCON=y
+CONFIG_FIXED_PHY=y
+CONFIG_FIX_EARLYCON_MEM=y
+CONFIG_FW_LOADER_PAGED_BUF=y
+# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_GENERIC_ARCH_TOPOLOGY=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+CONFIG_GENERIC_CPU_AUTOPROBE=y
+CONFIG_GENERIC_EARLY_IOREMAP=y
+CONFIG_GENERIC_IDLE_POLL_SETUP=y
+CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
+CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_PHY=y
+CONFIG_GENERIC_PINCONF=y
+CONFIG_GENERIC_PINCTRL_GROUPS=y
+CONFIG_GENERIC_PINMUX_FUNCTIONS=y
+CONFIG_GENERIC_SCHED_CLOCK=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIOLIB_IRQCHIP=y
+CONFIG_GPIO_74X164=y
+CONFIG_HANDLE_DOMAIN_IRQ=y
+CONFIG_HARDEN_BRANCH_PREDICTOR=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+CONFIG_HAVE_ARCH_AUDITSYSCALL=y
+CONFIG_HAVE_ARCH_BITREVERSE=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_PFN_VALID=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_ARM_ARCH_TIMER=y
+CONFIG_HAVE_ARM_SCU=y
+CONFIG_HAVE_ARM_SMCCC=y
+CONFIG_HAVE_ARM_TWD=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_CLK_PREPARE=y
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_COPY_THREAD_TLS=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
+CONFIG_HAVE_EBPF_JIT=y
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_OPTPROBES=y
+CONFIG_HAVE_PCI=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HAVE_PERF_REGS=y
+CONFIG_HAVE_PERF_USER_STACK_DUMP=y
+CONFIG_HAVE_PROC_CPU=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_RSEQ=y
+CONFIG_HAVE_SMP=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_UID16=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_HIGHMEM=y
+# CONFIG_HIGHPTE is not set
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_BCM2835=y
+CONFIG_HZ_FIXED=0
+CONFIG_HZ_PERIODIC=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IO_URING=y
+CONFIG_IRQCHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_DOMAIN_HIERARCHY=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_WORK=y
+CONFIG_LIBFDT=y
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
+CONFIG_LOCK_SPIN_ON_OWNER=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_MDIO_BCM_IPROC=y
+CONFIG_MDIO_BUS=y
+CONFIG_MDIO_BUS_MUX=y
+# CONFIG_MDIO_BUS_MUX_BCM_IPROC is not set
+CONFIG_MDIO_BUS_MUX_MMIOREG=y
+CONFIG_MDIO_DEVICE=y
+CONFIG_MEMFD_CREATE=y
+CONFIG_MFD_SYSCON=y
+CONFIG_MIGHT_HAVE_CACHE_L2X0=y
+CONFIG_MIGRATION=y
+CONFIG_MODULES_USE_ELF_REL=y
+CONFIG_MTD_BCM47XXSFLASH=y
+CONFIG_MTD_BCM47XX_PARTS=y
+CONFIG_MTD_NAND_BRCMNAND=y
+CONFIG_MTD_NAND_CORE=y
+CONFIG_MTD_NAND_ECC_SW_HAMMING=y
+CONFIG_MTD_OF_PARTS_LINKSYS_NS=y
+CONFIG_MTD_PARSER_TRX=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_SPLIT_SEAMA_FW=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_BEB_LIMIT=20
+CONFIG_MTD_UBI_BLOCK=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NET_FLOW_LIMIT=y
+CONFIG_NR_CPUS=2
+CONFIG_NVMEM=y
+CONFIG_NVMEM_BRCM_NVRAM=y
+CONFIG_NVMEM_SYSFS=y
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_NET=y
+CONFIG_OLD_SIGACTION=y
+CONFIG_OLD_SIGSUSPEND3=y
+CONFIG_OUTER_CACHE=y
+CONFIG_OUTER_CACHE_SYNC=y
+CONFIG_PADATA=y
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PCI=y
+CONFIG_PCIE_IPROC=y
+CONFIG_PCIE_IPROC_BCMA=y
+# CONFIG_PCIE_IPROC_PLATFORM is not set
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_DOMAINS_GENERIC=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PGTABLE_LEVELS=2
+CONFIG_PHYLIB=y
+# CONFIG_PHY_BCM_NS_USB2 is not set
+# CONFIG_PHY_BCM_NS_USB3 is not set
+# CONFIG_PHY_BCM_SR_PCIE is not set
+CONFIG_PHY_BCM_SR_USB=y
+# CONFIG_PHY_BRCM_SATA is not set
+# CONFIG_PHY_NS2_USB_DRD is not set
+CONFIG_PINCTRL=y
+# CONFIG_PINCTRL_IPROC_GPIO is not set
+CONFIG_PINCTRL_NS=y
+# CONFIG_PINCTRL_NS2_MUX is not set
+CONFIG_PWM=y
+CONFIG_PWM_BCM_IPROC=y
+CONFIG_PWM_SYSFS=y
+CONFIG_RATIONAL=y
+CONFIG_RCU_NEED_SEGCBLIST=y
+CONFIG_RCU_STALL_COMMON=y
+CONFIG_REFCOUNT_FULL=y
+CONFIG_REGMAP=y
+CONFIG_REGMAP_MMIO=y
+CONFIG_RFS_ACCEL=y
+CONFIG_RPS=y
+CONFIG_RWSEM_SPIN_ON_OWNER=y
+CONFIG_SERIAL_8250_FSL=y
+CONFIG_SERIAL_MCTRL_GPIO=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SGL_ALLOC=y
+CONFIG_SMP=y
+CONFIG_SMP_ON_UP=y
+CONFIG_SPARSE_IRQ=y
+CONFIG_SPI=y
+CONFIG_SPI_BCM_QSPI=y
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_GPIO=y
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_MEM=y
+CONFIG_SRCU=y
+CONFIG_SWCONFIG=y
+CONFIG_SWCONFIG_B53=y
+CONFIG_SWCONFIG_B53_PHY_DRIVER=y
+CONFIG_SWCONFIG_B53_PHY_FIXUP=y
+CONFIG_SWCONFIG_B53_SRAB_DRIVER=y
+CONFIG_SWPHY=y
+CONFIG_SWP_EMULATE=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
+CONFIG_THERMAL_GOV_STEP_WISE=y
+CONFIG_THERMAL_OF=y
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_TIMER_OF=y
+CONFIG_TIMER_PROBE=y
+CONFIG_TREE_RCU=y
+CONFIG_TREE_SRCU=y
+CONFIG_UBIFS_FS=y
+CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
+CONFIG_UNWINDER_ARM=y
+CONFIG_USB_SUPPORT=y
+CONFIG_USE_OF=y
+# CONFIG_VFP is not set
+CONFIG_WATCHDOG_CORE=y
+CONFIG_XPS=y
+CONFIG_XXHASH=y
+CONFIG_XZ_DEC_ARM=y
+CONFIG_XZ_DEC_BCJ=y
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZSTD_COMPRESS=y
+CONFIG_ZSTD_DECOMPRESS=y
--- /dev/null
+From 1ca5f2430c4f9d85b98b8d6e5d93f8d4802faf8e Mon Sep 17 00:00:00 2001
+From: Vivek Unune <npcomplete13@gmail.com>
+Date: Wed, 14 Oct 2020 15:27:27 -0400
+Subject: [PATCH] ARM: dts: BCM5301X: Linksys EA9500 add port 5 and port 7
+
+Add ports 5 and 7 which are connected to gmac cores 1 & 2.
+These will be disabled for now.
+
+Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ .../boot/dts/bcm47094-linksys-panamera.dts | 24 +++++++++++++++++++
+ 1 file changed, 24 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
++++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+@@ -242,6 +242,30 @@
+ label = "wan";
+ };
+
++ port@5 {
++ reg = <5>;
++ ethernet = <&gmac0>;
++ label = "cpu";
++ status = "disabled";
++
++ fixed-link {
++ speed = <1000>;
++ full-duplex;
++ };
++ };
++
++ port@7 {
++ reg = <7>;
++ ethernet = <&gmac1>;
++ label = "cpu";
++ status = "disabled";
++
++ fixed-link {
++ speed = <1000>;
++ full-duplex;
++ };
++ };
++
+ port@8 {
+ reg = <8>;
+ ethernet = <&gmac2>;
--- /dev/null
+From 74abbfe99f43eb7466d26d9e48fbeb46b8f3d804 Mon Sep 17 00:00:00 2001
+From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
+Date: Tue, 20 Oct 2020 14:59:37 +0300
+Subject: [PATCH] ARM: dts: BCM5301X: Harmonize EHCI/OHCI DT nodes name
+
+In accordance with the Generic EHCI/OHCI bindings the corresponding node
+name is suppose to comply with the Generic USB HCD DT schema, which
+requires the USB nodes to have the name acceptable by the regexp:
+"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
+nodes are correctly named.
+
+Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm5301x.dtsi | 4 ++--
+ arch/arm/boot/dts/bcm53573.dtsi | 4 ++--
+ 2 files changed, 4 insertions(+), 4 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -265,7 +265,7 @@
+
+ interrupt-parent = <&gic>;
+
+- ehci: ehci@21000 {
++ ehci: usb@21000 {
+ #usb-cells = <0>;
+
+ compatible = "generic-ehci";
+@@ -287,7 +287,7 @@
+ };
+ };
+
+- ohci: ohci@22000 {
++ ohci: usb@22000 {
+ #usb-cells = <0>;
+
+ compatible = "generic-ohci";
+--- a/arch/arm/boot/dts/bcm53573.dtsi
++++ b/arch/arm/boot/dts/bcm53573.dtsi
+@@ -135,7 +135,7 @@
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+- ehci: ehci@4000 {
++ ehci: usb@4000 {
+ compatible = "generic-ehci";
+ reg = <0x4000 0x1000>;
+ interrupt-parent = <&gic>;
+@@ -155,7 +155,7 @@
+ };
+ };
+
+- ohci: ohci@d000 {
++ ohci: usb@d000 {
+ #usb-cells = <0>;
+
+ compatible = "generic-ohci";
--- /dev/null
+From 4b650a20bdb5f9558007dd3055a17a1644a91c3e Mon Sep 17 00:00:00 2001
+From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
+Date: Tue, 20 Oct 2020 14:59:46 +0300
+Subject: [PATCH] ARM: dts: BCM5310X: Harmonize xHCI DT nodes name
+
+In accordance with the Generic xHCI bindings the corresponding node
+name is suppose to comply with the Generic USB HCD DT schema, which
+requires the USB nodes to have the name acceptable by the regexp:
+"^usb(@.*)?" . Make sure the "generic-xhci"-compatible nodes are
+correctly named.
+
+Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
+Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -318,7 +318,7 @@
+
+ interrupt-parent = <&gic>;
+
+- xhci: xhci@23000 {
++ xhci: usb@23000 {
+ #usb-cells = <0>;
+
+ compatible = "generic-xhci";
--- /dev/null
+From bd9a01e28e5d1632528e531480b42d6e2c861d88 Mon Sep 17 00:00:00 2001
+From: Vivek Unune <npcomplete13@gmail.com>
+Date: Sun, 1 Nov 2020 15:08:03 -0500
+Subject: [PATCH] ARM: dts: BCM5301X: Linksys EA9500 add fixed partitions
+
+This router has dual paritions to store trx firmware image and
+dual partitions for nvram. The second one in each of these cases acts
+as a backup store.
+
+When tested with OpenWrt, the default partition parser causes two issues:
+
+1. It labels both nvram partitions as nvram. In factory, second one is
+labeled devinfo.
+2. It parses second trx image and tries to create second 'linux' partition
+and fails with - cannot create duplicate 'linux' partition
+
+The following patch works around both of these issues.
+
+Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ .../boot/dts/bcm47094-linksys-panamera.dts | 41 +++++++++++++++++++
+ 1 file changed, 41 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
++++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+@@ -292,3 +292,44 @@
+ &usb3_phy {
+ status = "okay";
+ };
++
++&nandcs {
++ partitions {
++ compatible = "fixed-partitions";
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ partition@0 {
++ label = "boot";
++ reg = <0x0000000 0x0080000>;
++ read-only;
++ };
++
++ partition@80000 {
++ label = "nvram";
++ reg = <0x080000 0x0100000>;
++ };
++
++ partition@180000{
++ label = "devinfo";
++ reg = <0x0180000 0x080000>;
++ };
++
++ partition@200000 {
++ label = "firmware";
++ reg = <0x0200000 0x01D00000>;
++ compatible = "brcm,trx";
++ };
++
++ partition@1F00000 {
++ label = "failsafe";
++ reg = <0x01F00000 0x01D00000>;
++ read-only;
++ };
++
++ partition@5200000 {
++ label = "system";
++ reg = <0x05200000 0x02E00000>;
++ };
++ };
++};
--- /dev/null
+From 2f34ae32f5e74096540cd7ce95bfd467cb74b21a Mon Sep 17 00:00:00 2001
+From: Vivek Unune <npcomplete13@gmail.com>
+Date: Wed, 4 Nov 2020 15:29:51 -0500
+Subject: [PATCH] ARM: dts: BCM5301X: Use corretc pinctrl compatible for 4709x
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+BCM47094 version of pinmux uses different compatible and supports MDIO
+pinmux pins. Hence, use the correct compatible string and defines the
+MDIO pins group.
+
+Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
+Acked-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm47094.dtsi | 9 +++++++++
+ arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
+ 2 files changed, 10 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm47094.dtsi
++++ b/arch/arm/boot/dts/bcm47094.dtsi
+@@ -8,6 +8,15 @@
+ / {
+ };
+
++&pinctrl {
++ compatible = "brcm,bcm4709-pinmux";
++
++ pinmux_mdio: mdio {
++ groups = "mdio_grp";
++ function = "mdio";
++ };
++};
++
+ &usb3_phy {
+ compatible = "brcm,ns-bx-usb3-phy";
+ };
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -428,7 +428,7 @@
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+- pin-controller@1c0 {
++ pinctrl: pin-controller@1c0 {
+ compatible = "brcm,bcm4708-pinmux";
+ reg = <0x1c0 0x24>;
+ reg-names = "cru_gpio_control";
--- /dev/null
+From c862059875cffc013ee27bf9759ac288224e7a14 Mon Sep 17 00:00:00 2001
+From: Vivek Unune <npcomplete13@gmail.com>
+Date: Wed, 4 Nov 2020 15:29:52 -0500
+Subject: [PATCH] ARM: dts: BCM5301X: Linksys EA9500 make use of pinctrl
+
+Now that we have a pin controller, use that instead of manuplating the
+mdio/mdc pins directly. i.e. we no longer require the mdio-mii-mux
+
+Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ .../boot/dts/bcm47094-linksys-panamera.dts | 26 +++----------------
+ 1 file changed, 4 insertions(+), 22 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
++++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+@@ -123,33 +123,13 @@
+ };
+ };
+
+- mdio-bus-mux {
+- #address-cells = <1>;
+- #size-cells = <0>;
++ mdio-bus-mux@18003000 {
+
+ /* BIT(9) = 1 => external mdio */
+- mdio_ext: mdio@200 {
++ mdio@200 {
+ reg = <0x200>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+- };
+- };
+-
+- mdio-mii-mux {
+- compatible = "mdio-mux-mmioreg";
+- mdio-parent-bus = <&mdio_ext>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+- reg = <0x1800c1c0 0x4>;
+-
+- /* BIT(6) = mdc, BIT(7) = mdio */
+- mux-mask = <0xc0>;
+-
+- mdio-mii@0 {
+- /* Enable MII function */
+- reg = <0x0>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+
+ switch@0 {
+ compatible = "brcm,bcm53125";
+@@ -159,6 +139,8 @@
+ reset-names = "robo_reset";
+ reg = <0>;
+ dsa,member = <1 0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinmux_mdio>;
+
+ ports {
+ #address-cells = <1>;
--- /dev/null
+From 632ddf978565378e7efb9ea77c0ba239ea66bfdc Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Fri, 13 Nov 2020 11:09:19 +0100
+Subject: [PATCH] ARM: dts: BCM5301X: Disable USB 3 PHY on devices without USB
+ 3
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+It seems pointless to have it enabled.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts | 4 ----
+ arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts | 4 ----
+ arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 4 ----
+ arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts | 4 ----
+ arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts | 4 ----
+ arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts | 4 ----
+ 6 files changed, 24 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
++++ b/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
+@@ -57,10 +57,6 @@
+ status = "okay";
+ };
+
+-&usb3_phy {
+- status = "okay";
+-};
+-
+ &srab {
+ status = "okay";
+
+--- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
++++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
+@@ -64,10 +64,6 @@
+ status = "okay";
+ };
+
+-&usb3_phy {
+- status = "okay";
+-};
+-
+ &srab {
+ status = "okay";
+
+--- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
++++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
+@@ -117,7 +117,3 @@
+ };
+ };
+ };
+-
+-&usb3_phy {
+- status = "okay";
+-};
+--- a/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
++++ b/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
+@@ -57,10 +57,6 @@
+ status = "okay";
+ };
+
+-&usb3_phy {
+- status = "okay";
+-};
+-
+ &srab {
+ status = "okay";
+
+--- a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
++++ b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
+@@ -105,10 +105,6 @@
+ status = "okay";
+ };
+
+-&usb3_phy {
+- status = "okay";
+-};
+-
+ &srab {
+ status = "okay";
+
+--- a/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts
++++ b/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts
+@@ -126,7 +126,3 @@
+ &usb2 {
+ vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
+ };
+-
+-&usb3_phy {
+- status = "okay";
+-};
--- /dev/null
+From b2ab5e8697ef6591aeeda23be49e096705dbbda3 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Fri, 13 Nov 2020 10:50:12 +0100
+Subject: [PATCH] ARM: dts: BCM5301X: Enable USB 3 PHY on Luxul XWR-3150
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This device has a functional USB 3 port so PHY is required.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Reported-by: kernel test robot <lkp@intel.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
+@@ -71,6 +71,10 @@
+ vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
+ };
+
++&usb3_phy {
++ status = "okay";
++};
++
+ &spi_nor {
+ status = "okay";
+ };
--- /dev/null
+From f527cb6f3345f7faa8e61dd9f3c437437327428c Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Mon, 9 Nov 2020 11:41:01 -0800
+Subject: [PATCH] ARM: dts: BCM5301X: Update Ethernet switch node name
+
+Update the switch unit name from srab to ethernet-switch, allowing us to
+fix warnings such as:
+
+ CHECK arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml
+arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml:
+srab@18007000: $nodename:0: 'srab@18007000' does not match
+'^(ethernet-)?switch(@.*)?$'
+ From schema:
+Documentation/devicetree/bindings/net/dsa/b53.yaml
+
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -482,7 +482,7 @@
+ #thermal-sensor-cells = <0>;
+ };
+
+- srab: srab@18007000 {
++ srab: ethernet-switch@18007000 {
+ compatible = "brcm,bcm5301x-srab";
+ reg = <0x18007000 0x1000>;
+
--- /dev/null
+From 953efcb0c0234f8c488ebd4090378e949d6ba78b Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Mon, 9 Nov 2020 16:42:09 -0800
+Subject: [PATCH] ARM: dts: BCM5301X: Add a default compatible for switch node
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Provide a default compatible string which is based on the 53011 SRAB
+compatible by default. The 4709 and 47094 default to the 53012 SRAB
+compatible.
+
+This allows us to have sane defaults and silences the following
+warnings:
+
+arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dt.yaml:
+ethernet-switch@18007000: compatible: 'oneOf' conditional failed, one
+must be fixed:
+ ['brcm,bcm5301x-srab'] is too short
+ 'brcm,bcm5325' was expected
+ 'brcm,bcm53115' was expected
+ 'brcm,bcm53125' was expected
+ 'brcm,bcm53128' was expected
+ 'brcm,bcm5365' was expected
+ 'brcm,bcm5395' was expected
+ 'brcm,bcm5389' was expected
+ 'brcm,bcm5397' was expected
+ 'brcm,bcm5398' was expected
+ 'brcm,bcm11360-srab' was expected
+ 'brcm,bcm5301x-srab' is not one of ['brcm,bcm53010-srab',
+'brcm,bcm53011-srab', 'brcm,bcm53012-srab', 'brcm,bcm53018-srab',
+'brcm,bcm53019-srab']
+ 'brcm,bcm5301x-srab' is not one of ['brcm,bcm11404-srab',
+'brcm,bcm11407-srab', 'brcm,bcm11409-srab', 'brcm,bcm58310-srab',
+'brcm,bcm58311-srab', 'brcm,bcm58313-srab']
+ 'brcm,bcm5301x-srab' is not one of ['brcm,bcm58522-srab',
+'brcm,bcm58523-srab', 'brcm,bcm58525-srab', 'brcm,bcm58622-srab',
+'brcm,bcm58623-srab', 'brcm,bcm58625-srab', 'brcm,bcm88312-srab']
+ 'brcm,bcm5301x-srab' is not one of ['brcm,bcm3384-switch',
+'brcm,bcm6328-switch', 'brcm,bcm6368-switch']
+ From schema:
+Documentation/devicetree/bindings/net/dsa/b53.yaml
+
+Acked-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm4709.dtsi | 4 ++++
+ arch/arm/boot/dts/bcm47094.dtsi | 4 ++++
+ arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
+ 3 files changed, 9 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm4709.dtsi
++++ b/arch/arm/boot/dts/bcm4709.dtsi
+@@ -9,3 +9,7 @@
+ clock-frequency = <125000000>;
+ status = "okay";
+ };
++
++&srab {
++ compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
++};
+--- a/arch/arm/boot/dts/bcm47094.dtsi
++++ b/arch/arm/boot/dts/bcm47094.dtsi
+@@ -25,3 +25,7 @@
+ clock-frequency = <125000000>;
+ status = "okay";
+ };
++
++&srab {
++ compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
++};
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -483,7 +483,7 @@
+ };
+
+ srab: ethernet-switch@18007000 {
+- compatible = "brcm,bcm5301x-srab";
++ compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab";
+ reg = <0x18007000 0x1000>;
+
+ status = "disabled";
--- /dev/null
+From fd577b41421bc24e2d04cab96d387301b649eb14 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Mon, 9 Nov 2020 17:20:17 -0800
+Subject: [PATCH] ARM: dts: BCM5301X: Provide defaults ports container node
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Provide an empty 'ports' container node with the correct #address-cells
+and #size-cells properties. This silences the following warning:
+
+arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dt.yaml:
+ethernet-switch@18007000: 'oneOf' conditional failed, one must be fixed:
+ 'ports' is a required property
+ 'ethernet-ports' is a required property
+ From schema:
+Documentation/devicetree/bindings/net/dsa/b53.yaml
+
+Acked-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts | 3 ---
+ arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts | 3 ---
+ arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts | 3 ---
+ arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts | 3 ---
+ arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts | 3 ---
+ arch/arm/boot/dts/bcm47094-linksys-panamera.dts | 3 ---
+ arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts | 3 ---
+ arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts | 3 ---
+ arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 3 ---
+ arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts | 3 ---
+ arch/arm/boot/dts/bcm5301x.dtsi | 4 ++++
+ arch/arm/boot/dts/bcm953012er.dts | 3 ---
+ 12 files changed, 4 insertions(+), 33 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
++++ b/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
+@@ -61,9 +61,6 @@
+ status = "okay";
+
+ ports {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+ port@0 {
+ reg = <0>;
+ label = "poe";
+--- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
++++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
+@@ -68,9 +68,6 @@
+ status = "okay";
+
+ ports {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+ port@4 {
+ reg = <4>;
+ label = "lan";
+--- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
++++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
+@@ -122,9 +122,6 @@
+ status = "okay";
+
+ ports {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+ port@0 {
+ reg = <0>;
+ label = "lan4";
+--- a/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
++++ b/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
+@@ -61,9 +61,6 @@
+ status = "okay";
+
+ ports {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+ port@4 {
+ reg = <4>;
+ label = "poe";
+--- a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
++++ b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
+@@ -109,9 +109,6 @@
+ status = "okay";
+
+ ports {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+ port@0 {
+ reg = <0>;
+ label = "lan4";
+--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
++++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+@@ -201,9 +201,6 @@
+ dsa,member = <0 0>;
+
+ ports {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+ port@1 {
+ reg = <1>;
+ label = "lan7";
+--- a/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
+@@ -59,9 +59,6 @@
+ status = "okay";
+
+ ports {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+ port@0 {
+ reg = <0>;
+ label = "poe";
+--- a/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
+@@ -57,9 +57,6 @@
+ status = "okay";
+
+ ports {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+ port@0 {
+ reg = <0>;
+ label = "lan";
+--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
+@@ -108,9 +108,6 @@
+ status = "okay";
+
+ ports {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+ port@0 {
+ reg = <0>;
+ label = "lan4";
+--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
+@@ -83,9 +83,6 @@
+ status = "okay";
+
+ ports {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+ port@0 {
+ reg = <0>;
+ label = "lan4";
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -489,6 +489,10 @@
+ status = "disabled";
+
+ /* ports are defined in board DTS */
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ };
+ };
+
+ rng: rng@18004000 {
+--- a/arch/arm/boot/dts/bcm953012er.dts
++++ b/arch/arm/boot/dts/bcm953012er.dts
+@@ -69,9 +69,6 @@
+ status = "okay";
+
+ ports {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+ port@0 {
+ reg = <0>;
+ label = "port0";
--- /dev/null
+From 428ac8df021dd1cbcc693eb76636873d42327e5d Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Wed, 10 Mar 2021 22:04:46 +0100
+Subject: [PATCH] ARM: dts: BCM5301X: Describe NVMEM NVRAM on Linksys & Luxul
+ routers
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Provide access to NVRAM which contains device environment variables.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts | 5 +++++
+ arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts | 5 +++++
+ arch/arm/boot/dts/bcm4709-linksys-ea9200.dts | 5 +++++
+ arch/arm/boot/dts/bcm47094-linksys-panamera.dts | 5 +++++
+ arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts | 5 +++++
+ arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts | 5 +++++
+ arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 5 +++++
+ arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts | 5 +++++
+ 8 files changed, 40 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts
++++ b/arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts
+@@ -21,6 +21,11 @@
+ reg = <0x00000000 0x08000000>;
+ };
+
++ nvram@1c080000 {
++ compatible = "brcm,nvram";
++ reg = <0x1c080000 0x180000>;
++ };
++
+ gpio-keys {
+ compatible = "gpio-keys";
+
+--- a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
++++ b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
+@@ -21,6 +21,11 @@
+ reg = <0x00000000 0x08000000>;
+ };
+
++ nvram@1eff0000 {
++ compatible = "brcm,nvram";
++ reg = <0x1eff0000 0x10000>;
++ };
++
+ leds {
+ compatible = "gpio-leds";
+
+--- a/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts
++++ b/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts
+@@ -22,6 +22,11 @@
+ <0x88000000 0x08000000>;
+ };
+
++ nvram@1c080000 {
++ compatible = "brcm,nvram";
++ reg = <0x1c080000 0x180000>;
++ };
++
+ gpio-keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
++++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+@@ -22,6 +22,11 @@
+ <0x88000000 0x08000000>;
+ };
+
++ nvram@1c080000 {
++ compatible = "brcm,nvram";
++ reg = <0x1c080000 0x100000>;
++ };
++
+ gpio-keys {
+ compatible = "gpio-keys";
+
+--- a/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
+@@ -22,6 +22,11 @@
+ <0x88000000 0x18000000>;
+ };
+
++ nvram@1eff0000 {
++ compatible = "brcm,nvram";
++ reg = <0x1eff0000 0x10000>;
++ };
++
+ leds {
+ compatible = "gpio-leds";
+
+--- a/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
+@@ -22,6 +22,11 @@
+ <0x88000000 0x18000000>;
+ };
+
++ nvram@1eff0000 {
++ compatible = "brcm,nvram";
++ reg = <0x1eff0000 0x10000>;
++ };
++
+ leds {
+ compatible = "gpio-leds";
+
+--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
+@@ -22,6 +22,11 @@
+ <0x88000000 0x08000000>;
+ };
+
++ nvram@1eff0000 {
++ compatible = "brcm,nvram";
++ reg = <0x1eff0000 0x10000>;
++ };
++
+ leds {
+ compatible = "gpio-leds";
+
+--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
+@@ -22,6 +22,11 @@
+ <0x88000000 0x18000000>;
+ };
+
++ nvram@1eff0000 {
++ compatible = "brcm,nvram";
++ reg = <0x1eff0000 0x10000>;
++ };
++
+ leds {
+ compatible = "gpio-leds";
+
--- /dev/null
+From 1d3352aeed164ef73f05cf80ca001f11d2f3312d Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Mon, 29 Mar 2021 07:54:30 +0200
+Subject: [PATCH] ARM: dts: BCM5301X: Fix Linksys EA9500 partitions
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Partitions are basically fixed indeed but firmware ones don't have
+hardcoded function ("firmware" vs "failsafe"). Actual function depends
+on bootloader configuration. Use a proper binding for that.
+
+While at it fix numbers formatting to avoid:
+arch/arm/boot/dts/bcm47094-linksys-panamera.dt.yaml: partitions: 'partition@1F00000' does not match any of the regexes: '^partition@[0-9a-f]+$', 'pinctrl-[0-9]+'
+ From schema: Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm47094-linksys-panamera.dts | 16 +++++++---------
+ 1 file changed, 7 insertions(+), 9 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
++++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+@@ -279,7 +279,7 @@
+
+ &nandcs {
+ partitions {
+- compatible = "fixed-partitions";
++ compatible = "linksys,ns-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+@@ -300,20 +300,18 @@
+ };
+
+ partition@200000 {
+- label = "firmware";
+- reg = <0x0200000 0x01D00000>;
+- compatible = "brcm,trx";
++ reg = <0x0200000 0x01d00000>;
++ compatible = "linksys,ns-firmware", "brcm,trx";
+ };
+
+- partition@1F00000 {
+- label = "failsafe";
+- reg = <0x01F00000 0x01D00000>;
+- read-only;
++ partition@1f00000 {
++ reg = <0x01f00000 0x01d00000>;
++ compatible = "linksys,ns-firmware", "brcm,trx";
+ };
+
+ partition@5200000 {
+ label = "system";
+- reg = <0x05200000 0x02E00000>;
++ reg = <0x05200000 0x02e00000>;
+ };
+ };
+ };
--- /dev/null
+From dcb56d61d5a8acca0a357cc603397bc0272ce4cb Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Mon, 29 Mar 2021 10:04:09 +0200
+Subject: [PATCH] ARM: dts: BCM5301X: Set Linksys EA9500 power LED
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Set Linux default trigger to default on, just like it's normally done
+for power LEDs.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm47094-linksys-panamera.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
++++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+@@ -75,6 +75,7 @@
+ power {
+ label = "bcm53xx:white:power";
+ gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "default-on";
+ };
+
+ wifi-disabled {
--- /dev/null
+From c39edb9f9dcb6c8a0ba0ebf5df9e0ac93ab94b82 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Fri, 5 Mar 2021 19:32:35 +0100
+Subject: [PATCH] dt-bindings: nvmem: add Broadcom's NVRAM
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Broadcom's NVRAM structure contains device data and can be accessed
+using I/O mapping.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Reviewed-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+---
+ .../devicetree/bindings/nvmem/brcm,nvram.yaml | 34 +++++++++++++++++++
+ 1 file changed, 34 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/nvmem/brcm,nvram.yaml
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/nvmem/brcm,nvram.yaml
+@@ -0,0 +1,34 @@
++# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/nvmem/brcm,nvram.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: Broadcom's NVRAM
++
++description: |
++ Broadcom's NVRAM is a structure containing device specific environment
++ variables. It is used for storing device configuration, booting parameters
++ and calibration data.
++
++ NVRAM can be accessed on Broadcom BCM47xx MIPS and Northstar ARM Cortex-A9
++ devices usiong I/O mapped memory.
++
++maintainers:
++ - Rafał Miłecki <rafal@milecki.pl>
++
++allOf:
++ - $ref: "nvmem.yaml#"
++
++properties:
++ compatible:
++ const: brcm,nvram
++
++unevaluatedProperties: false
++
++examples:
++ - |
++ nvram@1eff0000 {
++ compatible = "brcm,nvram";
++ reg = <0x1eff0000 0x10000>;
++ };
--- /dev/null
+From b152bbeb0282bfcf6f91d0d5befd7582c1c3fc23 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Fri, 5 Mar 2021 19:32:36 +0100
+Subject: [PATCH] nvmem: brcm_nvram: new driver exposing Broadcom's NVRAM
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This driver provides access to Broadcom's NVRAM.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+---
+ drivers/nvmem/Kconfig | 9 +++++
+ drivers/nvmem/Makefile | 2 +
+ drivers/nvmem/brcm_nvram.c | 78 ++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 89 insertions(+)
+ create mode 100644 drivers/nvmem/brcm_nvram.c
+
+--- a/drivers/nvmem/Kconfig
++++ b/drivers/nvmem/Kconfig
+@@ -270,4 +270,13 @@ config SPRD_EFUSE
+ This driver can also be built as a module. If so, the module
+ will be called nvmem-sprd-efuse.
+
++
++config NVMEM_BRCM_NVRAM
++ tristate "Broadcom's NVRAM support"
++ depends on ARCH_BCM_5301X || COMPILE_TEST
++ depends on HAS_IOMEM
++ help
++ This driver provides support for Broadcom's NVRAM that can be accessed
++ using I/O mapping.
++
+ endif
+--- a/drivers/nvmem/Makefile
++++ b/drivers/nvmem/Makefile
+@@ -55,3 +55,5 @@ obj-$(CONFIG_NVMEM_ZYNQMP) += nvmem_zynq
+ nvmem_zynqmp_nvmem-y := zynqmp_nvmem.o
+ obj-$(CONFIG_SPRD_EFUSE) += nvmem_sprd_efuse.o
+ nvmem_sprd_efuse-y := sprd-efuse.o
++obj-$(CONFIG_NVMEM_BRCM_NVRAM) += nvmem_brcm_nvram.o
++nvmem_brcm_nvram-y := brcm_nvram.o
+--- /dev/null
++++ b/drivers/nvmem/brcm_nvram.c
+@@ -0,0 +1,78 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl>
++ */
++
++#include <linux/io.h>
++#include <linux/mod_devicetable.h>
++#include <linux/module.h>
++#include <linux/nvmem-provider.h>
++#include <linux/platform_device.h>
++
++struct brcm_nvram {
++ struct device *dev;
++ void __iomem *base;
++};
++
++static int brcm_nvram_read(void *context, unsigned int offset, void *val,
++ size_t bytes)
++{
++ struct brcm_nvram *priv = context;
++ u8 *dst = val;
++
++ while (bytes--)
++ *dst++ = readb(priv->base + offset++);
++
++ return 0;
++}
++
++static int brcm_nvram_probe(struct platform_device *pdev)
++{
++ struct nvmem_config config = {
++ .name = "brcm-nvram",
++ .reg_read = brcm_nvram_read,
++ };
++ struct device *dev = &pdev->dev;
++ struct resource *res;
++ struct brcm_nvram *priv;
++
++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
++ if (!priv)
++ return -ENOMEM;
++ priv->dev = dev;
++
++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ priv->base = devm_ioremap_resource(dev, res);
++ if (IS_ERR(priv->base))
++ return PTR_ERR(priv->base);
++
++ config.dev = dev;
++ config.priv = priv;
++ config.size = resource_size(res);
++
++ return PTR_ERR_OR_ZERO(devm_nvmem_register(dev, &config));
++}
++
++static const struct of_device_id brcm_nvram_of_match_table[] = {
++ { .compatible = "brcm,nvram", },
++ {},
++};
++
++static struct platform_driver brcm_nvram_driver = {
++ .probe = brcm_nvram_probe,
++ .driver = {
++ .name = "brcm_nvram",
++ .of_match_table = brcm_nvram_of_match_table,
++ },
++};
++
++static int __init brcm_nvram_init(void)
++{
++ return platform_driver_register(&brcm_nvram_driver);
++}
++
++subsys_initcall_sync(brcm_nvram_init);
++
++MODULE_AUTHOR("Rafał Miłecki");
++MODULE_LICENSE("GPL");
++MODULE_DEVICE_TABLE(of, brcm_nvram_of_match_table);
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Tue, 13 Apr 2021 18:25:20 +0200
+Subject: [PATCH] mtd: parsers: trx: parse "firmware" MTD partitions only
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Parsing every partition with "compatible" set to "brcm,trx" results in
+parsing both: firmware partition and failsafe partition on devices that
+implement failsafe booting. This affects e.g. Linksys EA9500 which has:
+
+partition@200000 {
+ reg = <0x0200000 0x01d00000>;
+ compatible = "linksys,ns-firmware", "brcm,trx";
+};
+
+partition@1f00000 {
+ reg = <0x01f00000 0x01d00000>;
+ compatible = "linksys,ns-firmware", "brcm,trx";
+};
+
+Check for MTD partition name "firmware" before parsing. Recently added
+ofpart_linksys_ns.c creates "firmware" and "failsafe" depending on
+bootloader setup.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+ drivers/mtd/parsers/parser_trx.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/mtd/parsers/parser_trx.c
++++ b/drivers/mtd/parsers/parser_trx.c
+@@ -85,6 +85,10 @@ static int parser_trx_parse(struct mtd_i
+ uint8_t curr_part = 0, i = 0;
+ int err;
+
++ /* Don't parse any failsafe / backup partitions */
++ if (strcmp(mtd->name, "firmware"))
++ return -EINVAL;
++
+ parts = kcalloc(TRX_PARSER_MAX_PARTS, sizeof(struct mtd_partition),
+ GFP_KERNEL);
+ if (!parts)
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Sat, 1 Oct 2016 22:54:48 +0200
+Subject: [PATCH] usb: xhci: add support for performing fake doorbell
+
+Broadcom's Northstar XHCI controllers seem to need a special start
+procedure to work correctly. There isn't any official documentation of
+this, the problem is that controller doesn't detect any connected
+devices with default setup. Moreover connecting USB device to controller
+that doesn't run properly can cause SoC's watchdog issues.
+
+A workaround that was successfully tested on multiple devices is to
+perform a fake doorbell. This patch adds code for doing this and enables
+it on BCM4708 family.
+---
+ drivers/usb/host/xhci-plat.c | 6 +++++
+ drivers/usb/host/xhci.c | 63 +++++++++++++++++++++++++++++++++++++++++---
+ drivers/usb/host/xhci.h | 1 +
+ 3 files changed, 67 insertions(+), 3 deletions(-)
+
+--- a/drivers/usb/host/xhci-plat.c
++++ b/drivers/usb/host/xhci-plat.c
+@@ -87,6 +87,8 @@ static int xhci_priv_resume_quirk(struct
+ static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci)
+ {
+ struct xhci_plat_priv *priv = xhci_to_priv(xhci);
++ struct platform_device*pdev = to_platform_device(dev);
++ struct device_node *node = pdev->dev.of_node;
+
+ /*
+ * As of now platform drivers don't provide MSI support so we ensure
+@@ -94,6 +96,9 @@ static void xhci_plat_quirks(struct devi
+ * dev struct in order to setup MSI
+ */
+ xhci->quirks |= XHCI_PLAT | priv->quirks;
++
++ if (node && of_machine_is_compatible("brcm,bcm4708"))
++ xhci->quirks |= XHCI_FAKE_DOORBELL;
+ }
+
+ /* called during probe() after chip reset completes */
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -156,6 +156,49 @@ int xhci_start(struct xhci_hcd *xhci)
+ return ret;
+ }
+
++/**
++ * xhci_fake_doorbell - Perform a fake doorbell on a specified slot
++ *
++ * Some controllers require a fake doorbell to start correctly. Without that
++ * they simply don't detect any devices.
++ */
++static int xhci_fake_doorbell(struct xhci_hcd *xhci, int slot_id)
++{
++ u32 temp;
++
++ /* Alloc a virt device for that slot */
++ if (!xhci_alloc_virt_device(xhci, slot_id, NULL, GFP_NOIO)) {
++ xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
++ return -ENOMEM;
++ }
++
++ /* Ring fake doorbell for slot_id ep 0 */
++ xhci_ring_ep_doorbell(xhci, slot_id, 0, 0);
++ usleep_range(1000, 1500);
++
++ /* Read the status to check if HSE is set or not */
++ temp = readl(&xhci->op_regs->status);
++
++ /* Clear HSE if set */
++ if (temp & STS_FATAL) {
++ xhci_dbg(xhci, "HSE problem detected, status: 0x%08x\n", temp);
++ temp &= ~0x1fff;
++ temp |= STS_FATAL;
++ writel(temp, &xhci->op_regs->status);
++ usleep_range(1000, 1500);
++ readl(&xhci->op_regs->status);
++ }
++
++ /* Free virt device */
++ xhci_free_virt_device(xhci, slot_id);
++
++ /* We're done if controller is already running */
++ if (readl(&xhci->op_regs->command) & CMD_RUN)
++ return 0;
++
++ return xhci_start(xhci);
++}
++
+ /*
+ * Reset a halted HC.
+ *
+@@ -608,10 +651,20 @@ static int xhci_init(struct usb_hcd *hcd
+
+ static int xhci_run_finished(struct xhci_hcd *xhci)
+ {
+- if (xhci_start(xhci)) {
+- xhci_halt(xhci);
+- return -ENODEV;
++ int err;
++
++ err = xhci_start(xhci);
++ if (err) {
++ err = -ENODEV;
++ goto err_halt;
+ }
++
++ if (xhci->quirks & XHCI_FAKE_DOORBELL) {
++ err = xhci_fake_doorbell(xhci, 1);
++ if (err)
++ goto err_halt;
++ }
++
+ xhci->shared_hcd->state = HC_STATE_RUNNING;
+ xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
+
+@@ -621,6 +674,10 @@ static int xhci_run_finished(struct xhci
+ xhci_dbg_trace(xhci, trace_xhci_dbg_init,
+ "Finished xhci_run for USB3 roothub");
+ return 0;
++
++err_halt:
++ xhci_halt(xhci);
++ return err;
+ }
+
+ /*
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -1880,6 +1880,7 @@ struct xhci_hcd {
+ #define XHCI_DISABLE_SPARSE BIT_ULL(38)
+ #define XHCI_SG_TRB_CACHE_SIZE_QUIRK BIT_ULL(39)
+ #define XHCI_NO_SOFT_RETRY BIT_ULL(40)
++#define XHCI_FAKE_DOORBELL BIT_ULL(41)
+
+ unsigned int num_active_eps;
+ unsigned int limit_active_eps;
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Wed, 24 Sep 2014 22:14:07 +0200
+Subject: [PATCH] ARM: BCM5301X: Disable MMU and Dcache during decompression
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Broadcom devices have broken CFE (bootloader) that leaves hardware in an
+invalid state. It causes problems with booting Linux. On Northstar
+devices kernel was randomly hanging in ~25% of tries during early init.
+Hangs used to happen at random places in the start_kernel. On BCM53573
+kernel doesn't even seem to start booting.
+
+To workaround this problem we need to do following very early:
+1) Clear 2 following bits in the SCTLR register:
+#define CR_M (1 << 0) /* MMU enable */
+#define CR_C (1 << 2) /* Dcache enable */
+2) Flush the whole D-cache
+3) Disable L2 cache
+
+Unfortunately this patch is not upstreamable as it does above things
+unconditionally. We can't check if we are running on Broadcom platform
+in any safe way and doing such hacks with ARCH_MULTI_V7 is unacceptable
+as it could break other devices support.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+
+--- a/arch/arm/boot/compressed/Makefile
++++ b/arch/arm/boot/compressed/Makefile
+@@ -35,6 +35,11 @@ ifeq ($(CONFIG_ARCH_ACORN),y)
+ OBJS += ll_char_wr.o font.o
+ endif
+
++ifeq ($(CONFIG_ARCH_BCM_5301X),y)
++OBJS += head-bcm_5301x-mpcore.o
++OBJS += cache-v7-min.o
++endif
++
+ ifeq ($(CONFIG_ARCH_SA1100),y)
+ OBJS += head-sa1100.o
+ endif
+--- /dev/null
++++ b/arch/arm/boot/compressed/head-bcm_5301x-mpcore.S
+@@ -0,0 +1,37 @@
++/*
++ *
++ * Platform specific tweaks. This is merged into head.S by the linker.
++ *
++ */
++
++#include <linux/linkage.h>
++#include <asm/assembler.h>
++#include <asm/cp15.h>
++
++ .section ".start", "ax"
++
++/*
++ * This code section is spliced into the head code by the linker
++ */
++
++__plat_uncompress_start:
++
++ @ Preserve r8/r7 i.e. kernel entry values
++ mov r12, r8
++
++ @ Clear MMU enable and Dcache enable bits
++ mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR
++ bic r0, #CR_C|CR_M
++ mcr p15, 0, r0, c1, c0, 0 @ Write SCTLR
++ nop
++
++ @ Call the cache invalidation routine
++ bl v7_flush_dcache_all
++ nop
++ mov r0,#0
++ ldr r3, =0x19022000 @ L2 cache controller, control reg
++ str r0, [r3, #0x100] @ Disable L2 cache
++ nop
++
++ @ Restore
++ mov r8, r12
+--- a/arch/arm/boot/compressed/cache-v7-min.S
++++ b/arch/arm/boot/compressed/cache-v7-min.S
+@@ -12,6 +12,7 @@
+
+ #include <linux/linkage.h>
+ #include <linux/init.h>
++#include <asm/assembler.h>
+
+ __INIT
+
+@@ -63,7 +64,7 @@ loop2:
+ ARM( orr r11, r11, r9, lsl r2 ) @ factor index number into r11
+ THUMB( lsl r6, r9, r2 )
+ THUMB( orr r11, r11, r6 ) @ factor index number into r11
+- mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
++ mcr p15, 0, r11, c7, c6, 2 @ clean & invalidate by set/way
+ subs r9, r9, #1 @ decrement the index
+ bge loop2
+ subs r4, r4, #1 @ decrement the way
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Subject: [PATCH] ARM: dts: BCM5301X: Update Northstar pinctrl binding
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -422,16 +422,12 @@
+ #size-cells = <1>;
+
+ cru@100 {
+- compatible = "simple-bus";
++ compatible = "syscon", "simple-mfd";
+ reg = <0x100 0x1a4>;
+- ranges;
+- #address-cells = <1>;
+- #size-cells = <1>;
+
+- pinctrl: pin-controller@1c0 {
++ pinctrl: pinctrl {
+ compatible = "brcm,bcm4708-pinmux";
+- reg = <0x1c0 0x24>;
+- reg-names = "cru_gpio_control";
++ offset = <0xc0>;
+
+ spi-pins {
+ groups = "spi_grp";
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
+Subject: [PATCH] ARM: BCM5301X: Add DT for Netgear R7900
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
+---
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -106,6 +106,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
+ bcm4709-buffalo-wxr-1900dhp.dtb \
+ bcm4709-linksys-ea9200.dtb \
+ bcm4709-netgear-r7000.dtb \
++ bcm4709-netgear-r7900.dtb \
+ bcm4709-netgear-r8000.dtb \
+ bcm4709-tplink-archer-c9-v1.dtb \
+ bcm47094-dlink-dir-885l.dtb \
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm4709-netgear-r7900.dts
+@@ -0,0 +1,42 @@
++/*
++ * Broadcom BCM470X / BCM5301X ARM platform code.
++ * DTS for Netgear R7900
++ *
++ * Copyright (C) 2016 Rafał Miłecki <zajec5@gmail.com>
++ *
++ * Licensed under the GNU/GPL. See COPYING for details.
++ */
++
++/dts-v1/;
++
++#include "bcm4709.dtsi"
++#include "bcm5301x-nand-cs0-bch8.dtsi"
++
++/ {
++ compatible = "netgear,r7900", "brcm,bcm4709", "brcm,bcm4708";
++ model = "Netgear R7900";
++
++ chosen {
++ bootargs = "console=ttyS0,115200";
++ };
++
++ memory {
++ reg = <0x00000000 0x08000000
++ 0x88000000 0x08000000>;
++ };
++
++ axi@18000000 {
++ usb3@23000 {
++ reg = <0x00023000 0x1000>;
++
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>;
++ };
++ };
++};
++
++&uart0 {
++ status = "okay";
++};
--- /dev/null
+From: Felix Fietkau <nbd@nbd.name>
+Subject: [PATCH] ARM: BCM5301X: Add power button for Buffalo WZR-1750DHP
+
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+--- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
++++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
+@@ -100,6 +100,12 @@
+ gpio-keys {
+ compatible = "gpio-keys";
+
++ power {
++ label = "Power";
++ linux,code = <KEY_POWER>;
++ gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
++ };
++
+ restart {
+ label = "Reset";
+ linux,code = <KEY_RESTART>;
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Subject: [PATCH] ARM: dts: BCM5301X: Add serial= to the bootargs
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+It's enough to have proper stdout-path for getting serial working but
+for some reason LEDE doesn't offer "Please press Enter to activate this
+console." unless ttyS0 is specified.
+
+This is a workaround to get serial working in LEDE.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+
+--- a/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts
++++ b/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts
+@@ -12,7 +12,7 @@
+ model = "TP-LINK Archer C5 V2";
+
+ chosen {
+- bootargs = "earlycon";
++ bootargs = "console=ttyS0,115200 earlycon";
+ };
+
+ memory@0 {
+--- a/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
+@@ -13,7 +13,7 @@
+ model = "Luxul ABR-4500 V1";
+
+ chosen {
+- bootargs = "earlycon";
++ bootargs = "console=ttyS0,115200 earlycon";
+ };
+
+ memory@0 {
+--- a/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
+@@ -13,7 +13,7 @@
+ model = "Luxul XBR-4500 V1";
+
+ chosen {
+- bootargs = "earlycon";
++ bootargs = "console=ttyS0,115200 earlycon";
+ };
+
+ memory@0 {
+--- a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
++++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
+@@ -12,7 +12,7 @@
+ model = "Luxul XAP-1440 V1";
+
+ chosen {
+- bootargs = "earlycon";
++ bootargs = "console=ttyS0,115200 earlycon";
+ };
+
+ memory@0 {
+--- a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
++++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
+@@ -12,7 +12,7 @@
+ model = "Luxul XAP-810 V1";
+
+ chosen {
+- bootargs = "earlycon";
++ bootargs = "console=ttyS0,115200 earlycon";
+ };
+
+ memory@0 {
+--- a/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
+@@ -12,7 +12,7 @@
+ model = "Luxul XAP-1610 V1";
+
+ chosen {
+- bootargs = "earlycon";
++ bootargs = "console=ttyS0,115200 earlycon";
+ };
+
+ memory@0 {
+--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
+@@ -13,7 +13,7 @@
+ model = "Luxul XWR-3150 V1";
+
+ chosen {
+- bootargs = "earlycon";
++ bootargs = "console=ttyS0,115200 earlycon";
+ };
+
+ memory@0 {
+--- a/arch/arm/boot/dts/bcm47094-phicomm-k3.dts
++++ b/arch/arm/boot/dts/bcm47094-phicomm-k3.dts
+@@ -13,6 +13,10 @@
+ compatible = "phicomm,k3", "brcm,bcm47094", "brcm,bcm4708";
+ model = "Phicomm K3";
+
++ chosen {
++ bootargs = "console=ttyS0,115200";
++ };
++
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x08000000>,
+--- a/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
++++ b/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
+@@ -13,7 +13,7 @@
+ model = "Luxul XWC-2000 V1";
+
+ chosen {
+- bootargs = "earlycon";
++ bootargs = "console=ttyS0,115200 earlycon";
+ };
+
+ memory {
--- /dev/null
+From 7166207bd1d8c46d09d640d46afc685df9bb9083 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 22 Nov 2018 09:21:49 +0100
+Subject: [PATCH] ARM: dts: BCM5301X: Describe partition formats
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+It's needed by OpenWrt for custom partitioning.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+ arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
++++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
+@@ -35,6 +35,7 @@
+ partition@0 {
+ label = "firmware";
+ reg = <0x00000000 0x08000000>;
++ compatible = "seama";
+ };
+ };
+ };
--- /dev/null
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Thu, 7 Jun 2018 19:29:12 +0200
+Subject: bcm53xx: add LED status label alias for Meraki MR32
+
+add an led-status alias label. This is used by OpenWrt's LED
+DTS lookup function to identifiy the indicator LED
+
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+
+--- a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
++++ b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
+@@ -27,6 +27,7 @@
+
+ aliases {
+ serial1 = &uart2;
++ led-status = &led_status;
+ };
+
+ leds {
+@@ -68,7 +69,7 @@
+ max-brightness = <255>;
+ };
+
+- green {
++ led_status: green {
+ /* SYS-LED 1 - Tricolor */
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_GREEN>;
--- /dev/null
+From 2a2af518266a29323cf30c3f9ba9ef2ceb1dd84b Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
+Date: Thu, 16 Oct 2014 20:52:16 +0200
+Subject: [PATCH] UBI: Detect EOF mark and erase all remaining blocks
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
+---
+ drivers/mtd/ubi/attach.c | 5 +++++
+ drivers/mtd/ubi/io.c | 4 ++++
+ drivers/mtd/ubi/ubi.h | 1 +
+ 3 files changed, 10 insertions(+)
+
+--- a/drivers/mtd/ubi/attach.c
++++ b/drivers/mtd/ubi/attach.c
+@@ -82,6 +82,9 @@ static int self_check_ai(struct ubi_devi
+ #define AV_ADD BIT(1)
+ #define AV_FIND_OR_ADD (AV_FIND | AV_ADD)
+
++/* Set on finding block with 0xdeadc0de, indicates erasing all blocks behind */
++bool erase_all_next;
++
+ /**
+ * find_or_add_av - internal function to find a volume, add a volume or do
+ * both (find and add if missing).
+@@ -1580,6 +1583,8 @@ int ubi_attach(struct ubi_device *ubi, i
+ if (!ai)
+ return -ENOMEM;
+
++ erase_all_next = false;
++
+ #ifdef CONFIG_MTD_UBI_FASTMAP
+ /* On small flash devices we disable fastmap in any case. */
+ if ((int)mtd_div_by_eb(ubi->mtd->size, ubi->mtd) <= UBI_FM_MAX_START) {
+--- a/drivers/mtd/ubi/io.c
++++ b/drivers/mtd/ubi/io.c
+@@ -710,6 +710,10 @@ int ubi_io_read_ec_hdr(struct ubi_device
+ }
+
+ magic = be32_to_cpu(ec_hdr->magic);
++ if (magic == 0xdeadc0de)
++ erase_all_next = true;
++ if (erase_all_next)
++ return read_err ? UBI_IO_FF_BITFLIPS : UBI_IO_FF;
+ if (magic != UBI_EC_HDR_MAGIC) {
+ if (mtd_is_eccerr(read_err))
+ return UBI_IO_BAD_HDR_EBADMSG;
+--- a/drivers/mtd/ubi/ubi.h
++++ b/drivers/mtd/ubi/ubi.h
+@@ -822,6 +822,7 @@ extern struct mutex ubi_devices_mutex;
+ extern struct blocking_notifier_head ubi_notifiers;
+
+ /* attach.c */
++extern bool erase_all_next;
+ struct ubi_ainf_peb *ubi_alloc_aeb(struct ubi_attach_info *ai, int pnum,
+ int ec);
+ void ubi_free_aeb(struct ubi_attach_info *ai, struct ubi_ainf_peb *aeb);
--- /dev/null
+From 4abdde3ad6bc0b3b157c4bf6ec0bf139d11d07e8 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
+Date: Wed, 13 May 2015 14:13:28 +0200
+Subject: [PATCH] b53: add hacky CPU port fixes for devices not using port 5
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
+---
+ drivers/net/phy/b53/b53_common.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/net/phy/b53/b53_common.c
++++ b/drivers/net/phy/b53/b53_common.c
+@@ -28,6 +28,7 @@
+ #include <linux/of.h>
+ #include <linux/of_net.h>
+ #include <linux/platform_data/b53.h>
++#include <linux/of.h>
+
+ #include "b53_regs.h"
+ #include "b53_priv.h"
+@@ -1587,6 +1588,29 @@ static int b53_switch_init(struct b53_de
+ return ret;
+ }
+
++ /* Set correct CPU port */
++ if (of_machine_is_compatible("asus,rt-ac87u"))
++ sw_dev->cpu_port = 7;
++ else if (of_machine_is_compatible("netgear,r7900"))
++ sw_dev->cpu_port = 8;
++ else if (of_machine_is_compatible("netgear,r8000"))
++ sw_dev->cpu_port = 8;
++ else if (of_machine_is_compatible("netgear,r8500"))
++ sw_dev->cpu_port = 8;
++
++ /* Enable extra ports */
++ if (of_machine_is_compatible("tenda,ac9"))
++ dev->enabled_ports |= BIT(5);
++
++ /*
++ * Workaround for devices using port 8 (connected to the 3rd iface).
++ * For some reason it doesn't work (no packets on eth2).
++ */
++ if (of_machine_is_compatible("netgear,r7900") ||
++ of_machine_is_compatible("netgear,r8000") ||
++ (of_machine_is_compatible("linksys,panamera") && dev->chip_id == BCM53012_DEVICE_ID))
++ sw_dev->cpu_port = 5;
++
+ dev->enabled_ports |= BIT(sw_dev->cpu_port);
+ sw_dev->ports = fls(dev->enabled_ports);
+
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 11 Mar 2021 08:24:44 +0100
+Subject: [PATCH] firmware: bcm47xx_nvram: support init from IO memory
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+ drivers/firmware/broadcom/bcm47xx_nvram.c | 17 +++++++++++++++++
+ include/linux/bcm47xx_nvram.h | 6 ++++++
+ 2 files changed, 23 insertions(+)
+
+--- a/drivers/firmware/broadcom/bcm47xx_nvram.c
++++ b/drivers/firmware/broadcom/bcm47xx_nvram.c
+@@ -110,6 +110,23 @@ found:
+ return 0;
+ }
+
++int bcm47xx_nvram_init_from_iomem(void __iomem *nvram_start, size_t res_size)
++{
++ if (nvram_len) {
++ pr_warn("nvram already initialized\n");
++ return -EEXIST;
++ }
++
++ if (!bcm47xx_nvram_is_valid(nvram_start)) {
++ pr_err("No valid NVRAM found\n");
++ return -ENOENT;
++ }
++
++ bcm47xx_nvram_copy(nvram_start, res_size);
++
++ return 0;
++}
++
+ /*
+ * On bcm47xx we need access to the NVRAM very early, so we can't use mtd
+ * subsystem to access flash. We can't even use platform device / driver to
+--- a/include/linux/bcm47xx_nvram.h
++++ b/include/linux/bcm47xx_nvram.h
+@@ -11,6 +11,7 @@
+ #include <linux/vmalloc.h>
+
+ #ifdef CONFIG_BCM47XX_NVRAM
++int bcm47xx_nvram_init_from_iomem(void __iomem *nvram_start, size_t res_size);
+ int bcm47xx_nvram_init_from_mem(u32 base, u32 lim);
+ int bcm47xx_nvram_getenv(const char *name, char *val, size_t val_len);
+ int bcm47xx_nvram_gpio_pin(const char *name);
+@@ -20,6 +21,11 @@ static inline void bcm47xx_nvram_release
+ vfree(nvram);
+ };
+ #else
++static inline int bcm47xx_nvram_init_from_iomem(void __iomem *nvram_start,
++ size_t res_size)
++{
++ return -ENOTSUPP;
++}
+ static inline int bcm47xx_nvram_init_from_mem(u32 base, u32 lim)
+ {
+ return -ENOTSUPP;
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 11 Mar 2021 08:26:14 +0100
+Subject: [PATCH] nvmem: brcm_nvram: provide NVMEM content to the NVRAM driver
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+ drivers/nvmem/brcm_nvram.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/nvmem/brcm_nvram.c
++++ b/drivers/nvmem/brcm_nvram.c
+@@ -3,6 +3,7 @@
+ * Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl>
+ */
+
++#include <linux/bcm47xx_nvram.h>
+ #include <linux/io.h>
+ #include <linux/mod_devicetable.h>
+ #include <linux/module.h>
+@@ -46,6 +47,8 @@ static int brcm_nvram_probe(struct platf
+ if (IS_ERR(priv->base))
+ return PTR_ERR(priv->base);
+
++ bcm47xx_nvram_init_from_iomem(priv->base, resource_size(res));
++
+ config.dev = dev;
+ config.priv = priv;
+ config.size = resource_size(res);
--- /dev/null
+From 6f1c62440eb6846cb8045d7a5480ec7bbe47c96f Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Mon, 15 Aug 2016 10:30:41 +0200
+Subject: [PATCH] BCM53573 minor hacks
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+
+--- a/arch/arm/boot/dts/bcm53573.dtsi
++++ b/arch/arm/boot/dts/bcm53573.dtsi
+@@ -54,6 +54,7 @@
+ <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
++ clocks = <&ilp>;
+ };
+
+ clocks {
+--- a/drivers/bcma/main.c
++++ b/drivers/bcma/main.c
+@@ -330,14 +330,6 @@ static int bcma_register_devices(struct
+ }
+ #endif
+
+-#ifdef CONFIG_BCMA_SFLASH
+- if (bus->drv_cc.sflash.present) {
+- err = platform_device_register(&bcma_sflash_dev);
+- if (err)
+- bcma_err(bus, "Error registering serial flash\n");
+- }
+-#endif
+-
+ #ifdef CONFIG_BCMA_NFLASH
+ if (bus->drv_cc.nflash.present) {
+ err = platform_device_register(&bcma_nflash_dev);
+@@ -415,6 +407,14 @@ int bcma_bus_register(struct bcma_bus *b
+ bcma_register_core(bus, core);
+ }
+
++#ifdef CONFIG_BCMA_SFLASH
++ if (bus->drv_cc.sflash.present) {
++ err = platform_device_register(&bcma_sflash_dev);
++ if (err)
++ bcma_err(bus, "Error registering serial flash\n");
++ }
++#endif
++
+ /* Try to get SPROM */
+ err = bcma_sprom_get(bus);
+ if (err == -ENOENT) {
+--- a/drivers/clocksource/arm_arch_timer.c
++++ b/drivers/clocksource/arm_arch_timer.c
+@@ -14,6 +14,7 @@
+ #include <linux/smp.h>
+ #include <linux/cpu.h>
+ #include <linux/cpu_pm.h>
++#include <linux/clk.h>
+ #include <linux/clockchips.h>
+ #include <linux/clocksource.h>
+ #include <linux/interrupt.h>
+@@ -919,6 +920,16 @@ static void arch_timer_of_configure_rate
+ if (of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
+ arch_timer_rate = rate;
+
++ /* Get clk rate through clk driver if present */
++ if (!arch_timer_rate) {
++ struct clk *clk = of_clk_get(np, 0);
++
++ if (!IS_ERR(clk)) {
++ if (!clk_prepare_enable(clk))
++ arch_timer_rate = clk_get_rate(clk);
++ }
++ }
++
+ /* Check the timer frequency. */
+ if (arch_timer_rate == 0)
+ pr_warn("frequency not available\n");
projects / openwrt / staging / hauke.git / commitdiff