};
- spi@E100800 {
- compatible = "lantiq,spi-xway-broken";
- reg = <0xE100800 0x100>;
- interrupt-parent = <&icu0>;
- interrupts = <22 23 24>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- m25p80@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- reg = <0 0>;
- spi-max-frequency = <1000000>;
-
- partition@0 {
- reg = <0x0 0x20000>;
- label = "SPI (RO) U-Boot Image";
- read-only;
- };
-
- partition@20000 {
- reg = <0x20000 0x10000>;
- label = "ENV_MAC";
- read-only;
- };
-
- partition@30000 {
- reg = <0x30000 0x10000>;
- label = "DPF";
- read-only;
- };
-
- partition@40000 {
- reg = <0x40000 0x10000>;
- label = "NVRAM";
- read-only;
- };
-
- partition@500000 {
- reg = <0x50000 0x003a0000>;
- label = "kernel";
- };
- };
- };
-
gpio: pinmux@E100B10 {
compatible = "lantiq,pinctrl-xr9";
pinctrl-names = "default";
};
};
};
+
+&spi {
+ status = "ok";
+
+ m25p80@3 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <3 0>;
+ spi-max-frequency = <1000000>;
+
+ partition@0 {
+ reg = <0x0 0x20000>;
+ label = "SPI (RO) U-Boot Image";
+ read-only;
+ };
+
+ partition@20000 {
+ reg = <0x20000 0x10000>;
+ label = "ENV_MAC";
+ read-only;
+ };
+
+ partition@30000 {
+ reg = <0x30000 0x10000>;
+ label = "DPF";
+ read-only;
+ };
+
+ partition@40000 {
+ reg = <0x40000 0x10000>;
+ label = "NVRAM";
+ read-only;
+ };
+
+ partition@500000 {
+ reg = <0x50000 0x003a0000>;
+ label = "kernel";
+ };
+ };
+};