--- /dev/null
+CONFIG_ALIGNMENT_TRAP=y
+CONFIG_ARCH_BCM=y
+CONFIG_ARCH_BCM_5301X=y
+# CONFIG_ARCH_BCM_MOBILE is not set
+CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
+CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
+CONFIG_ARCH_HAS_TICK_BROADCAST=y
+CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+CONFIG_ARCH_MULTIPLATFORM=y
+# CONFIG_ARCH_MULTI_CPU_AUTO is not set
+CONFIG_ARCH_MULTI_V6_V7=y
+CONFIG_ARCH_MULTI_V7=y
+# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
+CONFIG_ARCH_NR_GPIO=0
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
+CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_ARM=y
+CONFIG_ARM_APPENDED_DTB=y
+# CONFIG_ARM_ATAG_DTB_COMPAT is not set
+# CONFIG_ARM_CPU_SUSPEND is not set
+CONFIG_ARM_GIC=y
+CONFIG_ARM_GLOBAL_TIMER=y
+CONFIG_ARM_L1_CACHE_SHIFT=6
+CONFIG_ARM_L1_CACHE_SHIFT_6=y
+# CONFIG_ARM_LPAE is not set
+CONFIG_ARM_NR_BANKS=8
+CONFIG_ARM_PATCH_PHYS_VIRT=y
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+CONFIG_ARM_VIRT_EXT=y
+CONFIG_ATAGS=y
+CONFIG_AUTO_ZRELADDR=y
+CONFIG_B53=y
+# CONFIG_B53_MMAP_DRIVER is not set
+# CONFIG_B53_PHY_DRIVER is not set
+CONFIG_B53_SRAB_DRIVER=y
+CONFIG_BCMA=y
+CONFIG_BCMA_BLOCKIO=y
+CONFIG_BCMA_DEBUG=y
+CONFIG_BCMA_DRIVER_GMAC_CMN=y
+CONFIG_BCMA_HOST_PCI=y
+CONFIG_BCMA_HOST_PCI_POSSIBLE=y
+CONFIG_BCMA_HOST_SOC=y
+# CONFIG_BCM_KONA_WDT is not set
+CONFIG_BGMAC=y
+CONFIG_CACHE_L2X0=y
+CONFIG_CACHE_PL310=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
+CONFIG_CLKSRC_OF=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_COMMON_CLK=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+CONFIG_CPU_HAS_ASID=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_RMAP=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_V7=y
+CONFIG_DCACHE_WORD_ACCESS=y
+CONFIG_DEBUG_BCM_5301X=y
+# CONFIG_DEBUG_BCM_KONA_UART is not set
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_LL=y
+CONFIG_DEBUG_LL_INCLUDE="debug/pl01x.S"
+# CONFIG_DEBUG_LL_UART_8250 is not set
+# CONFIG_DEBUG_LL_UART_PL01X is not set
+# CONFIG_DEBUG_UART_8250 is not set
+CONFIG_DEBUG_UART_PHYS=0x18000300
+CONFIG_DEBUG_UART_PL01X=y
+CONFIG_DEBUG_UART_VIRT=0xf1000300
+CONFIG_DEBUG_UNCOMPRESS=y
+CONFIG_DEBUG_USER=y
+CONFIG_DTC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_FRAME_POINTER=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_IDLE_POLL_SETUP=y
+CONFIG_GENERIC_IO=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_NET_UTILS=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_SCHED_CLOCK=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_PFN_VALID=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_ARM_SCU=y
+CONFIG_HAVE_ARM_TWD=y
+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
+CONFIG_HAVE_BPF_JIT=y
+CONFIG_HAVE_CC_STACKPROTECTOR=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_CLK_PREPARE=y
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZ4=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_HAVE_KERNEL_XZ=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HAVE_PERF_REGS=y
+CONFIG_HAVE_PERF_USER_STACK_DUMP=y
+CONFIG_HAVE_PROC_CPU=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_SMP=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_UID16=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_HZ_FIXED=0
+CONFIG_HZ_PERIODIC=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IOMMU_HELPER=y
+CONFIG_IRQCHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_WORK=y
+CONFIG_KTIME_SCALAR=y
+CONFIG_MDIO_BOARDINFO=y
+CONFIG_MIGHT_HAVE_PCI=y
+# CONFIG_MLX5_CORE is not set
+CONFIG_MODULES_USE_ELF_REL=y
+# CONFIG_MTD_PHYSMAP_OF is not set
+CONFIG_MULTI_IRQ_HANDLER=y
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NET_FLOW_LIMIT=y
+CONFIG_NET_RX_BUSY_POLL=y
+CONFIG_NO_BOOTMEM=y
+CONFIG_NR_CPUS=4
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_MTD=y
+CONFIG_OF_NET=y
+CONFIG_OF_PCI=y
+CONFIG_OF_PCI_IRQ=y
+CONFIG_OLD_SIGACTION=y
+CONFIG_OLD_SIGSUSPEND3=y
+CONFIG_OUTER_CACHE=y
+CONFIG_OUTER_CACHE_SYNC=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PCI=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PHYLIB=y
+# CONFIG_PL310_ERRATA_588369 is not set
+# CONFIG_PL310_ERRATA_727915 is not set
+# CONFIG_PL310_ERRATA_753970 is not set
+# CONFIG_PL310_ERRATA_769419 is not set
+# CONFIG_PREEMPT_RCU is not set
+CONFIG_RCU_STALL_COMMON=y
+CONFIG_RFS_ACCEL=y
+CONFIG_RPS=y
+CONFIG_SCHED_HRTICK=y
+# CONFIG_SCSI_DMA is not set
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SMP=y
+CONFIG_SMP_ON_UP=y
+CONFIG_SPARSE_IRQ=y
+CONFIG_STOP_MACHINE=y
+CONFIG_SWCONFIG=y
+CONFIG_SWIOTLB=y
+# CONFIG_SWP_EMULATE is not set
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_TREE_RCU=y
+CONFIG_UID16=y
+CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
+CONFIG_USB_SUPPORT=y
+CONFIG_USE_OF=y
+CONFIG_VECTORS_BASE=0xffff0000
+# CONFIG_VFP is not set
+# CONFIG_XEN is not set
+CONFIG_XPS=y
+CONFIG_XZ_DEC_ARM=y
+CONFIG_XZ_DEC_BCJ=y
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ZBOOT_ROM_TEXT=0x0
+# CONFIG_ZBUD is not set
+CONFIG_ZONE_DMA_FLAG=0
--- /dev/null
+From 5b293ebe757213993ae93b6cbbf5e1d09b75ac2f Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Tue, 4 Feb 2014 00:01:43 +0100
+Subject: [PATCH 1/3] ARM: BCM5301X: initial support for the BCM5301X/BCM470X
+ SoCs with ARM CPU
+
+This patch adds support for the BCM5301X/BCM470X SoCs with an ARM CPUs.
+Currently just booting to a shell is working and nothing else, no
+Ethernet, wifi, flash, ...
+I have some pending patches to make Ethernet work for this device.
+Mostly device tree support for bcma is missing.
+
+This SoC is used in small office and home router with Broadcom SoCs
+it's internal name is Northstar. This code should support the BCM4707,
+BCM4708, BCM4709, BCM53010, BCM53011 and BCM53012 SoC. It uses one or
+two ARM Cortex A9 Cores, some highlights are 2 PCIe 2.0 controllers,
+4 Gigabit Ethernet MACs and a USB 3.0 host controller.
+
+This SoC uses a dual core CPU, but this is currently not implemented.
+More information about this SoC can be found here:
+http://www.anandtech.com/show/5925/broadcom-announces-bcm4708x-and-bcm5301x-socs-for-80211ac-routers
+
+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+Acked-by: Arnd Bergmann <arnd@arndb.de>
+Acked-by: Christian Daudt <bcm@fixthebug.org>
+Signed-off-by: Matt Porter <mporter@linaro.org>
+---
+ Documentation/devicetree/bindings/arm/bcm4708.txt | 8 ++++++
+ MAINTAINERS | 8 ++++++
+ arch/arm/configs/multi_v7_defconfig | 1 +
+ arch/arm/mach-bcm/Kconfig | 26 +++++++++++++++++++
+ arch/arm/mach-bcm/Makefile | 1 +
+ arch/arm/mach-bcm/bcm_5301x.c | 28 +++++++++++++++++++++
+ 6 files changed, 72 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/arm/bcm4708.txt
+ create mode 100644 arch/arm/mach-bcm/bcm_5301x.c
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/arm/bcm4708.txt
+@@ -0,0 +1,8 @@
++Broadcom BCM4708 device tree bindings
++-------------------------------------------
++
++Boards with the BCM4708 SoC shall have the following properties:
++
++Required root node property:
++
++compatible = "brcm,bcm4708";
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -1883,6 +1883,14 @@ F: arch/arm/boot/dts/bcm2835*
+ F: arch/arm/configs/bcm2835_defconfig
+ F: drivers/*/*bcm2835*
+
++BROADCOM BCM5301X ARM ARCHICTURE
++M: Hauke Mehrtens <hauke@hauke-m.de>
++L: linux-arm-kernel@lists.infradead.org
++S: Maintained
++F: arch/arm/mach-bcm/bcm_5301x.c
++F: arch/arm/boot/dts/bcm5301x.dtsi
++F: arch/arm/boot/dts/bcm470*
++
+ BROADCOM TG3 GIGABIT ETHERNET DRIVER
+ M: Nithin Nayak Sujir <nsujir@broadcom.com>
+ M: Michael Chan <mchan@broadcom.com>
+--- a/arch/arm/configs/multi_v7_defconfig
++++ b/arch/arm/configs/multi_v7_defconfig
+@@ -11,6 +11,7 @@ CONFIG_ARCH_MVEBU=y
+ CONFIG_MACH_ARMADA_370=y
+ CONFIG_MACH_ARMADA_XP=y
+ CONFIG_ARCH_BCM=y
++CONFIG_ARCH_BCM_5301X=y
+ CONFIG_ARCH_BCM_MOBILE=y
+ CONFIG_ARCH_BERLIN=y
+ CONFIG_MACH_BERLIN_BG2=y
+--- a/arch/arm/mach-bcm/Kconfig
++++ b/arch/arm/mach-bcm/Kconfig
+@@ -32,6 +32,32 @@ config ARCH_BCM_MOBILE
+ BCM11130, BCM11140, BCM11351, BCM28145 and
+ BCM28155 variants.
+
++config ARCH_BCM_5301X
++ bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7
++ depends on MMU
++ select ARM_GIC
++ select CACHE_L2X0
++ select HAVE_ARM_SCU if SMP
++ select HAVE_ARM_TWD if SMP
++ select HAVE_SMP
++ select COMMON_CLK
++ select GENERIC_CLOCKEVENTS
++ select ARM_GLOBAL_TIMER
++ select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
++ select MIGHT_HAVE_PCI
++ help
++ Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores.
++
++ This is a network SoC line mostly used in home routers and
++ wifi access points, it's internal name is Northstar.
++ This inclused the following SoC: BCM53010, BCM53011, BCM53012,
++ BCM53014, BCM53015, BCM53016, BCM53017, BCM53018, BCM4707,
++ BCM4708 and BCM4709.
++
++ Do not confuse this with the BCM4760 which is a totally
++ different SoC or with the older BCM47XX and BCM53XX based
++ network SoC using a MIPS CPU, they are supported by arch/mips/bcm47xx
++
+ endmenu
+
+ endif
+--- a/arch/arm/mach-bcm/Makefile
++++ b/arch/arm/mach-bcm/Makefile
+@@ -13,3 +13,4 @@
+ obj-$(CONFIG_ARCH_BCM_MOBILE) := board_bcm281xx.o bcm_kona_smc.o bcm_kona_smc_asm.o kona.o
+ plus_sec := $(call as-instr,.arch_extension sec,+sec)
+ AFLAGS_bcm_kona_smc_asm.o :=-Wa,-march=armv7-a$(plus_sec)
++obj-$(CONFIG_ARCH_BCM_5301X) += bcm_5301x.o
+--- /dev/null
++++ b/arch/arm/mach-bcm/bcm_5301x.c
+@@ -0,0 +1,28 @@
++/*
++ * Broadcom BCM470X / BCM5301X ARM platform code.
++ *
++ * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
++ *
++ * Licensed under the GNU/GPL. See COPYING for details.
++ */
++#include <linux/of_platform.h>
++#include <asm/hardware/cache-l2x0.h>
++
++#include <asm/mach/arch.h>
++
++
++static void __init bcm5301x_dt_init(void)
++{
++ l2x0_of_init(0, ~0UL);
++ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
++}
++
++static const char __initconst *bcm5301x_dt_compat[] = {
++ "brcm,bcm4708",
++ NULL,
++};
++
++DT_MACHINE_START(BCM5301X, "BCM5301X")
++ .init_machine = bcm5301x_dt_init,
++ .dt_compat = bcm5301x_dt_compat,
++MACHINE_END
--- /dev/null
+From 065802756b20d878c83290c115f212fc1631cba7 Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Tue, 4 Feb 2014 00:01:44 +0100
+Subject: [PATCH 2/3] ARM: BCM5301X: add early debugging support
+
+This adds support for early debugging of BCM5301X SoC.
+
+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+Acked-by: Arnd Bergmann <arnd@arndb.de>
+Acked-by: Christian Daudt <bcm@fixthebug.org>
+Signed-off-by: Matt Porter <mporter@linaro.org>
+---
+ arch/arm/Kconfig.debug | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/arch/arm/Kconfig.debug
++++ b/arch/arm/Kconfig.debug
+@@ -106,6 +106,11 @@ choice
+ depends on ARCH_BCM2835
+ select DEBUG_UART_PL01X
+
++ config DEBUG_BCM_5301X
++ bool "Kernel low-level debugging on BCM5301X UART1"
++ depends on ARCH_BCM_5301X
++ select DEBUG_UART_PL01X
++
+ config DEBUG_BCM_KONA_UART
+ bool "Kernel low-level debugging messages via BCM KONA UART"
+ depends on ARCH_BCM
+@@ -1023,6 +1028,7 @@ config DEBUG_UART_PHYS
+ default 0x101f1000 if ARCH_VERSATILE
+ default 0x101fb000 if DEBUG_NOMADIK_UART
+ default 0x16000000 if ARCH_INTEGRATOR
++ default 0x18000300 if DEBUG_BCM_5301X
+ default 0x1c090000 if DEBUG_VEXPRESS_UART0_RS1
+ default 0x20060000 if DEBUG_RK29_UART0
+ default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
+@@ -1071,6 +1077,7 @@ config DEBUG_UART_VIRT
+ default 0xf0009000 if DEBUG_CNS3XXX
+ default 0xf01fb000 if DEBUG_NOMADIK_UART
+ default 0xf0201000 if DEBUG_BCM2835
++ default 0xf1000300 if DEBUG_BCM_5301X
+ default 0xf11f1000 if ARCH_VERSATILE
+ default 0xf1600000 if ARCH_INTEGRATOR
+ default 0xf1c28000 if DEBUG_SUNXI_UART0
--- /dev/null
+From fdf4850cb5b2e5e549a18b8b41abb001bfb19e9c Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Tue, 4 Feb 2014 00:01:46 +0100
+Subject: [PATCH 3/3] ARM: BCM5301X: workaround suppress fault
+
+Without this patch I am getting a unhandled fault exception like this
+one after "Freeing unused kernel memory":
+
+Freeing unused kernel memory: 1260K (c02c1000 - c03fc000)
+Unhandled fault: imprecise external abort (0x1c06) at 0xb6f89005
+Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000007
+
+The address which is here 0xb6f89005 changes from boot to boot, with a
+new build the changes are bigger. With kernel 3.10 I have also seen
+this fault at different places in the boot process, but starting with
+3.11 they are always occurring after the "Freeing unused kernel memory"
+message. I never was able to completely boot to userspace without this
+handler. The abort code is constant 0x1c06. This fault just happens
+once in the boot process I have never seen it happing twice or more.
+
+I also tried changing the CPSR.A bit to 0 in init_early, with this code
+like Afzal suggested, but that did not change anything:
+asm volatile("mrs r12, cpsr\n"
+ "bic r12, r12, #0x00000100\n"
+ "msr cpsr_c, r12" ::: "r12", "cc", "memory");
+
+Disabling the L2 cache by building with CONFIG_CACHE_L2X0 unset did not
+help.
+
+This workaround was copied from the vendor code including most of the
+comments. It says it they think this is caused by the CFE boot loader
+used on this device. I do not have any access to any datasheet or
+errata document to check this.
+
+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+Acked-by: Arnd Bergmann <arnd@arndb.de>
+Acked-by: Christian Daudt <bcm@fixthebug.org>
+Signed-off-by: Matt Porter <mporter@linaro.org>
+---
+ arch/arm/mach-bcm/bcm_5301x.c | 33 +++++++++++++++++++++++++++++++++
+ 1 file changed, 33 insertions(+)
+
+--- a/arch/arm/mach-bcm/bcm_5301x.c
++++ b/arch/arm/mach-bcm/bcm_5301x.c
+@@ -9,8 +9,40 @@
+ #include <asm/hardware/cache-l2x0.h>
+
+ #include <asm/mach/arch.h>
++#include <asm/siginfo.h>
++#include <asm/signal.h>
+
+
++static bool first_fault = true;
++
++static int bcm5301x_abort_handler(unsigned long addr, unsigned int fsr,
++ struct pt_regs *regs)
++{
++ if (fsr == 0x1c06 && first_fault) {
++ first_fault = false;
++
++ /*
++ * These faults with code 0x1c06 happens for no good reason,
++ * possibly left over from the CFE boot loader.
++ */
++ pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",
++ addr, fsr);
++
++ /* Returning non-zero causes fault display and panic */
++ return 0;
++ }
++
++ /* Others should cause a fault */
++ return 1;
++}
++
++static void __init bcm5301x_init_early(void)
++{
++ /* Install our hook */
++ hook_fault_code(16 + 6, bcm5301x_abort_handler, SIGBUS, BUS_OBJERR,
++ "imprecise external abort");
++}
++
+ static void __init bcm5301x_dt_init(void)
+ {
+ l2x0_of_init(0, ~0UL);
+@@ -23,6 +55,7 @@ static const char __initconst *bcm5301x_
+ };
+
+ DT_MACHINE_START(BCM5301X, "BCM5301X")
++ .init_early = bcm5301x_init_early,
+ .init_machine = bcm5301x_dt_init,
+ .dt_compat = bcm5301x_dt_compat,
+ MACHINE_END
--- /dev/null
+From d27509f19b5f93ea3425cfef782bb3c6541cd44d Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Tue, 4 Feb 2014 00:01:45 +0100
+Subject: [PATCH] ARM: BCM5301X: add dts files for BCM4708 SoC
+
+This uses the newly added BCM5301X SoC code.
+
+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+Acked-by: Arnd Bergmann <arnd@arndb.de>
+Acked-by: Christian Daudt <bcm@fixthebug.org>
+Signed-off-by: Matt Porter <mporter@linaro.org>
+---
+ arch/arm/boot/dts/Makefile | 1 +
+ arch/arm/boot/dts/bcm4708-netgear-r6250.dts | 35 ++++++++++
+ arch/arm/boot/dts/bcm4708.dtsi | 34 ++++++++++
+ arch/arm/boot/dts/bcm5301x.dtsi | 95 +++++++++++++++++++++++++++
+ 4 files changed, 165 insertions(+)
+ create mode 100644 arch/arm/boot/dts/bcm4708-netgear-r6250.dts
+ create mode 100644 arch/arm/boot/dts/bcm4708.dtsi
+ create mode 100644 arch/arm/boot/dts/bcm5301x.dtsi
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -50,6 +50,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rp
+ dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm11351-brt.dtb \
+ bcm28155-ap.dtb
+ dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
++dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
+ dtb-$(CONFIG_ARCH_BERLIN) += \
+ berlin2-sony-nsz-gs7.dtb \
+ berlin2cd-google-chromecast.dtb
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
+@@ -0,0 +1,35 @@
++/*
++ * Broadcom BCM470X / BCM5301X arm platform code.
++ * DTS for Netgear R6250 V1
++ *
++ * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
++ *
++ * Licensed under the GNU/GPL. See COPYING for details.
++ */
++
++/dts-v1/;
++
++#include "bcm4708.dtsi"
++
++/ {
++ compatible = "netgear,r6250v1", "brcm,bcm4708";
++ model = "Netgear R6250 V1 (BCM4708)";
++
++ chosen {
++ bootargs = "console=ttyS0,115200";
++ };
++
++ memory {
++ reg = <0x00000000 0x08000000>;
++ };
++
++ chipcommonA {
++ uart0: serial@0300 {
++ status = "okay";
++ };
++
++ uart1: serial@0400 {
++ status = "okay";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm4708.dtsi
+@@ -0,0 +1,34 @@
++/*
++ * Broadcom BCM470X / BCM5301X ARM platform code.
++ * DTS for BCM4708 SoC.
++ *
++ * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
++ *
++ * Licensed under the GNU/GPL. See COPYING for details.
++ */
++
++#include "bcm5301x.dtsi"
++
++/ {
++ compatible = "brcm,bcm4708";
++
++ cpus {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ cpu@0 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a9";
++ next-level-cache = <&L2>;
++ reg = <0x0>;
++ };
++
++ cpu@1 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a9";
++ next-level-cache = <&L2>;
++ reg = <0x1>;
++ };
++ };
++
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -0,0 +1,95 @@
++/*
++ * Broadcom BCM470X / BCM5301X ARM platform code.
++ * Generic DTS part for all BCM53010, BCM53011, BCM53012, BCM53014, BCM53015,
++ * BCM53016, BCM53017, BCM53018, BCM4707, BCM4708 and BCM4709 SoCs
++ *
++ * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
++ *
++ * Licensed under the GNU/GPL. See COPYING for details.
++ */
++
++#include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/interrupt-controller/arm-gic.h>
++#include "skeleton.dtsi"
++
++/ {
++ interrupt-parent = <&gic>;
++
++ chipcommonA {
++ compatible = "simple-bus";
++ ranges = <0x00000000 0x18000000 0x00001000>;
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ uart0: serial@0300 {
++ compatible = "ns16550";
++ reg = <0x0300 0x100>;
++ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
++ clock-frequency = <100000000>;
++ status = "disabled";
++ };
++
++ uart1: serial@0400 {
++ compatible = "ns16550";
++ reg = <0x0400 0x100>;
++ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
++ clock-frequency = <100000000>;
++ status = "disabled";
++ };
++ };
++
++ mpcore {
++ compatible = "simple-bus";
++ ranges = <0x00000000 0x19020000 0x00003000>;
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ scu@0000 {
++ compatible = "arm,cortex-a9-scu";
++ reg = <0x0000 0x100>;
++ };
++
++ timer@0200 {
++ compatible = "arm,cortex-a9-global-timer";
++ reg = <0x0200 0x100>;
++ interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clk_periph>;
++ };
++
++ local-timer@0600 {
++ compatible = "arm,cortex-a9-twd-timer";
++ reg = <0x0600 0x100>;
++ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clk_periph>;
++ };
++
++ gic: interrupt-controller@1000 {
++ compatible = "arm,cortex-a9-gic";
++ #interrupt-cells = <3>;
++ #address-cells = <0>;
++ interrupt-controller;
++ reg = <0x1000 0x1000>,
++ <0x0100 0x100>;
++ };
++
++ L2: cache-controller@2000 {
++ compatible = "arm,pl310-cache";
++ reg = <0x2000 0x1000>;
++ cache-unified;
++ cache-level = <2>;
++ };
++ };
++
++ clocks {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ /* As long as we do not have a real clock driver us this
++ * fixed clock */
++ clk_periph: periph {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <400000000>;
++ };
++ };
++};
--- /dev/null
+From 22b90bcf616578abe09845c72317ce53312f7faf Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Sat, 25 Jan 2014 17:03:07 +0100
+Subject: [PATCH 8/8] ARM: BCM5301X: register bcma bus
+
+---
+ arch/arm/boot/dts/bcm4708.dtsi | 43 ++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 43 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm4708.dtsi
++++ b/arch/arm/boot/dts/bcm4708.dtsi
+@@ -31,4 +31,47 @@
+ };
+ };
+
++ aix@18000000 {
++ compatible = "brcm,bus-aix";
++ reg = <0x18000000 0x1000>;
++ ranges = <0x00000000 0x18000000 0x00100000>;
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ usb2@0 {
++ compatible = "brcm,northstar-usb2";
++ reg = <0x18021000 0x1000>;
++ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
++ usb3@0 {
++ compatible = "brcm,northstar-usb3";
++ reg = <0x18023000 0x1000>;
++ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
++ gmac@0 {
++ compatible = "brcm,northstar-gmac";
++ reg = <0x18024000 0x1000>;
++ interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
++ gmac@1 {
++ compatible = "brcm,northstar-gmac";
++ reg = <0x18025000 0x1000>;
++ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
++ gmac@2 {
++ compatible = "brcm,northstar-gmac";
++ reg = <0x18026000 0x1000>;
++ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
++ gmac@3 {
++ compatible = "brcm,northstar-gmac";
++ reg = <0x18027000 0x1000>;
++ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
++ };
++ };
+ };
--- /dev/null
+From c046c19fc8f1af7cf253fea5b0253143c159948a Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Mon, 6 Jan 2014 23:29:15 +0100
+Subject: [PATCH 6/8] bcma: register bcma as device tree driver
+
+This driver is used by the bcm53xx ARM SoC code.Now it is possible to
+give the address of the chipcommon core in device tree.
+
+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+---
+ drivers/bcma/host_soc.c | 70 +++++++++++++++++++++++++++++++++++++++++++++
+ include/linux/bcma/bcma.h | 2 ++
+ 2 files changed, 72 insertions(+)
+
+--- a/drivers/bcma/host_soc.c
++++ b/drivers/bcma/host_soc.c
+@@ -7,6 +7,9 @@
+
+ #include "bcma_private.h"
+ #include "scan.h"
++#include <linux/slab.h>
++#include <linux/module.h>
++#include <linux/of_address.h>
+ #include <linux/bcma/bcma.h>
+ #include <linux/bcma/bcma_soc.h>
+
+@@ -173,6 +176,7 @@ int __init bcma_host_soc_register(struct
+ /* Host specific */
+ bus->hosttype = BCMA_HOSTTYPE_SOC;
+ bus->ops = &bcma_host_soc_ops;
++ bus->host_pdev = NULL;
+
+ /* Register */
+ err = bcma_bus_early_register(bus, &soc->core_cc, &soc->core_mips);
+@@ -181,3 +185,69 @@ int __init bcma_host_soc_register(struct
+
+ return err;
+ }
++
++#ifdef CONFIG_OF
++static int bcma_host_soc_probe(struct platform_device *pdev)
++{
++ struct device *dev = &pdev->dev;
++ struct device_node *np = dev->of_node;
++ struct bcma_bus *bus;
++ int err;
++
++ /* Alloc */
++ bus = devm_kzalloc(dev, sizeof(*bus), GFP_KERNEL);
++ if (!bus)
++ return -ENOMEM;
++
++ /* Map MMIO */
++ bus->mmio = of_iomap(np, 0);
++ if (!bus->mmio)
++ return -ENOMEM;
++
++ /* Host specific */
++ bus->hosttype = BCMA_HOSTTYPE_SOC;
++ bus->ops = &bcma_host_soc_ops;
++ bus->host_pdev = pdev;
++
++ /* Register */
++ err = bcma_bus_register(bus);
++ if (err)
++ goto err_unmap_mmio;
++
++ platform_set_drvdata(pdev, bus);
++
++ return err;
++
++err_unmap_mmio:
++ iounmap(bus->mmio);
++ return err;
++}
++
++static int bcma_host_soc_remove(struct platform_device *pdev)
++{
++ struct bcma_bus *bus = platform_get_drvdata(pdev);
++
++ bcma_bus_unregister(bus);
++ iounmap(bus->mmio);
++ platform_set_drvdata(pdev, NULL);
++
++ return 0;
++}
++
++static const struct of_device_id bcma_host_soc_of_match[] = {
++ { .compatible = "brcm,bus-aix", },
++ {},
++};
++MODULE_DEVICE_TABLE(of, bcma_host_soc_of_match);
++
++static struct platform_driver bcma_host_soc_driver = {
++ .driver = {
++ .name = "bcma-host-soc",
++ .owner = THIS_MODULE,
++ .of_match_table = bcma_host_soc_of_match,
++ },
++ .probe = bcma_host_soc_probe,
++ .remove = bcma_host_soc_remove,
++};
++module_platform_driver(bcma_host_soc_driver);
++#endif /* CONFIG_OF */
+--- a/include/linux/bcma/bcma.h
++++ b/include/linux/bcma/bcma.h
+@@ -319,6 +319,8 @@ struct bcma_bus {
+ struct pci_dev *host_pci;
+ /* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */
+ struct sdio_func *host_sdio;
++ /* Pointer to platform device (only for BCMA_HOSTTYPE_SOC) */
++ struct platform_device *host_pdev;
+ };
+
+ struct bcma_chipinfo chipinfo;
--- /dev/null
+From 06a21484198df9a4d34fe5062878d3bf4fc14340 Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Thu, 9 Jan 2014 19:40:14 +0100
+Subject: [PATCH 7/8] bcma: get irqs from dt
+
+---
+ drivers/bcma/main.c | 42 +++++++++++++++++++++++++++++++++++++++++-
+ 1 file changed, 41 insertions(+), 1 deletion(-)
+
+--- a/drivers/bcma/main.c
++++ b/drivers/bcma/main.c
+@@ -10,6 +10,8 @@
+ #include <linux/platform_device.h>
+ #include <linux/bcma/bcma.h>
+ #include <linux/slab.h>
++#include <linux/of_irq.h>
++#include <linux/of_address.h>
+
+ MODULE_DESCRIPTION("Broadcom's specific AMBA driver");
+ MODULE_LICENSE("GPL");
+@@ -120,6 +122,38 @@ static void bcma_release_core_dev(struct
+ kfree(core);
+ }
+
++static struct device_node *bcma_of_find_child_device(struct platform_device *parent,
++ struct bcma_device *core)
++{
++ struct device_node *node;
++ u64 size;
++ const __be32 *reg;
++
++ if (!parent || !parent->dev.of_node)
++ return NULL;
++
++ for_each_child_of_node(parent->dev.of_node, node) {
++ reg = of_get_address(node, 0, &size, 0);
++ if (!reg)
++ continue;
++ if (be32_to_cpup(reg) == core->addr)
++ return node;
++ }
++ return NULL;
++}
++
++static void bcma_of_fill_device(struct platform_device *parent,
++ struct bcma_device *core)
++{
++ struct device_node *node;
++
++ node = bcma_of_find_child_device(parent, core);
++ if (!node)
++ return;
++ core->dev.of_node = node;
++ core->irq = irq_of_parse_and_map(node, 0);
++}
++
+ static int bcma_register_cores(struct bcma_bus *bus)
+ {
+ struct bcma_device *core;
+@@ -154,7 +188,13 @@ static int bcma_register_cores(struct bc
+ break;
+ case BCMA_HOSTTYPE_SOC:
+ core->dev.dma_mask = &core->dev.coherent_dma_mask;
+- core->dma_dev = &core->dev;
++ if (bus->host_pdev) {
++ core->dma_dev = &bus->host_pdev->dev;
++ core->dev.parent = &bus->host_pdev->dev;
++ bcma_of_fill_device(bus->host_pdev, core);
++ } else {
++ core->dma_dev = &core->dev;
++ }
+ break;
+ case BCMA_HOSTTYPE_SDIO:
+ break;
--- /dev/null
+These are some hackish patches to make the Ethernet driver work somehow
+on this arm core.
+The flash driver is not working, so we removed the nvram reading, this
+should be changed after we have a flash driver.
+The mdelay(1) is a ugly workaround for this arm chip, this seams to be a dma problem.
+
+The PHY says it is not connected by default, just ignore it.
+
+--- a/drivers/net/ethernet/broadcom/Kconfig
++++ b/drivers/net/ethernet/broadcom/Kconfig
+@@ -131,7 +131,7 @@ config BNX2X_SRIOV
+
+ config BGMAC
+ tristate "BCMA bus GBit core support"
+- depends on BCMA_HOST_SOC && HAS_DMA && BCM47XX
++ depends on BCMA_HOST_SOC && HAS_DMA
+ select PHYLIB
+ ---help---
+ This driver supports GBit MAC and BCM4706 GBit MAC cores on BCMA bus.
+--- a/drivers/net/ethernet/broadcom/bgmac.c
++++ b/drivers/net/ethernet/broadcom/bgmac.c
+@@ -17,7 +17,11 @@
+ #include <linux/interrupt.h>
+ #include <linux/dma-mapping.h>
+ #include <linux/platform_data/b53.h>
++#ifdef CONFIG_BCM47XX
+ #include <bcm47xx_nvram.h>
++#else
++#define bcm47xx_nvram_getenv(a, b, c) -1
++#endif
+
+ static const struct bcma_device_id bgmac_bcma_tbl[] = {
+ BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_4706_MAC_GBIT, BCMA_ANY_REV, BCMA_ANY_CLASS),
+@@ -1452,7 +1456,7 @@ static int bgmac_probe(struct bcma_devic
+ int err;
+
+ /* We don't support 2nd, 3rd, ... units, SPROM has to be adjusted */
+- if (core->core_unit > 1) {
++ if (core->core_unit > 0) {
+ pr_err("Unsupported core_unit %d\n", core->core_unit);
+ return -ENOTSUPP;
+ }
+@@ -1487,8 +1491,7 @@ static int bgmac_probe(struct bcma_devic
+ }
+ bgmac->cmn = core->bus->drv_gmac_cmn.core;
+
+- bgmac->phyaddr = core->core_unit ? sprom->et1phyaddr :
+- sprom->et0phyaddr;
++ bgmac->phyaddr = BGMAC_PHY_NOREGS; // core->core_unit ? sprom->et1phyaddr : sprom->et0phyaddr;
+ bgmac->phyaddr &= BGMAC_PHY_MASK;
+ if (bgmac->phyaddr == BGMAC_PHY_MASK) {
+ bgmac_err(bgmac, "No PHY found\n");
+@@ -1540,8 +1543,7 @@ static int bgmac_probe(struct bcma_devic
+ /* TODO: reset the external phy. Specs are needed */
+ bgmac_phy_reset(bgmac);
+
+- bgmac->has_robosw = !!(core->bus->sprom.boardflags_lo &
+- BGMAC_BFL_ENETROBO);
++ bgmac->has_robosw = 1;
+ if (bgmac->has_robosw)
+ bgmac_warn(bgmac, "Support for Roboswitch not implemented\n");
+
+--- a/drivers/net/phy/phy_device.c
++++ b/drivers/net/phy/phy_device.c
+@@ -898,7 +898,7 @@ int genphy_update_link(struct phy_device
+ return status;
+
+ if ((status & BMSR_LSTATUS) == 0)
+- phydev->link = 0;
++ phydev->link = 1;
+ else
+ phydev->link = 1;
+
projects / openwrt / staging / stintel.git / commitdiff