cxgb4: handle interrupt raised when FW crashes
authorRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Fri, 9 Jun 2017 05:42:35 +0000 (11:12 +0530)
committerDavid S. Miller <davem@davemloft.net>
Fri, 9 Jun 2017 17:12:23 +0000 (13:12 -0400)
Handle TIMER0INT when FW crashes. Check for PCIE_FW[FW_EVAL]
and if it says "Device FW Crashed", then treat it as fatal.
Else, non-fatal.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
drivers/net/ethernet/chelsio/cxgb4/t4_regs.h
drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h

index da1322da49250382e0efe41ecc59f487bec06c4d..16af646a7fe426fd9a0827f3a8751bef423a63eb 100644 (file)
@@ -4040,6 +4040,7 @@ static void cim_intr_handler(struct adapter *adapter)
                { MBHOSTPARERR_F, "CIM mailbox host parity error", -1, 1 },
                { TIEQINPARERRINT_F, "CIM TIEQ outgoing parity error", -1, 1 },
                { TIEQOUTPARERRINT_F, "CIM TIEQ incoming parity error", -1, 1 },
+               { TIMER0INT_F, "CIM TIMER0 interrupt", -1, 1 },
                { 0 }
        };
        static const struct intr_info cim_upintr_info[] = {
@@ -4074,11 +4075,27 @@ static void cim_intr_handler(struct adapter *adapter)
                { 0 }
        };
 
+       u32 val, fw_err;
        int fat;
 
-       if (t4_read_reg(adapter, PCIE_FW_A) & PCIE_FW_ERR_F)
+       fw_err = t4_read_reg(adapter, PCIE_FW_A);
+       if (fw_err & PCIE_FW_ERR_F)
                t4_report_fw_error(adapter);
 
+       /* When the Firmware detects an internal error which normally
+        * wouldn't raise a Host Interrupt, it forces a CIM Timer0 interrupt
+        * in order to make sure the Host sees the Firmware Crash.  So
+        * if we have a Timer0 interrupt and don't see a Firmware Crash,
+        * ignore the Timer0 interrupt.
+        */
+
+       val = t4_read_reg(adapter, CIM_HOST_INT_CAUSE_A);
+       if (val & TIMER0INT_F)
+               if (!(fw_err & PCIE_FW_ERR_F) ||
+                   (PCIE_FW_EVAL_G(fw_err) != PCIE_FW_EVAL_CRASH))
+                       t4_write_reg(adapter, CIM_HOST_INT_CAUSE_A,
+                                    TIMER0INT_F);
+
        fat = t4_handle_intr_status(adapter, CIM_HOST_INT_CAUSE_A,
                                    cim_intr_info) +
              t4_handle_intr_status(adapter, CIM_HOST_UPACC_INT_CAUSE_A,
index 3348d33c36faca900e92bca25607ac79b0246908..3884336ce23ca79c2730e3c294601af092e0afaa 100644 (file)
 #define TIEQINPARERRINT_V(x) ((x) << TIEQINPARERRINT_S)
 #define TIEQINPARERRINT_F    TIEQINPARERRINT_V(1U)
 
+#define TIMER0INT_S    2
+#define TIMER0INT_V(x) ((x) << TIMER0INT_S)
+#define TIMER0INT_F    TIMER0INT_V(1U)
+
 #define PREFDROPINT_S    1
 #define PREFDROPINT_V(x) ((x) << PREFDROPINT_S)
 #define PREFDROPINT_F    PREFDROPINT_V(1U)
index c65c33c03bcbba027ad32af7bc20c5f8d8412fd8..f47461aa658b482139bbec350cbf9f5ffe6498fc 100644 (file)
@@ -3088,6 +3088,10 @@ struct fw_debug_cmd {
 #define FW_DEBUG_CMD_TYPE_G(x) \
        (((x) >> FW_DEBUG_CMD_TYPE_S) & FW_DEBUG_CMD_TYPE_M)
 
+enum pcie_fw_eval {
+       PCIE_FW_EVAL_CRASH = 0,
+};
+
 #define PCIE_FW_ERR_S          31
 #define PCIE_FW_ERR_V(x)       ((x) << PCIE_FW_ERR_S)
 #define PCIE_FW_ERR_F          PCIE_FW_ERR_V(1U)