#define TNETD7200_DEF_USB_CLK 48000000
struct tnetd7300_clock {
- volatile u32 ctrl;
+ u32 ctrl;
#define PREDIV_MASK 0x001f0000
#define PREDIV_SHIFT 16
#define POSTDIV_MASK 0x0000001f
u32 unused1[3];
- volatile u32 pll;
+ u32 pll;
#define MUL_MASK 0x0000f000
#define MUL_SHIFT 12
#define PLL_MODE_MASK 0x00000001
};
struct tnetd7200_clock {
- volatile u32 ctrl;
+ u32 ctrl;
u32 unused1[3];
#define DIVISOR_ENABLE_MASK 0x00008000
- volatile u32 mul;
- volatile u32 prediv;
- volatile u32 postdiv;
- volatile u32 postdiv2;
+ u32 mul;
+ u32 prediv;
+ u32 postdiv;
+ u32 postdiv2;
u32 unused2[6];
- volatile u32 cmd;
- volatile u32 status;
- volatile u32 cmden;
+ u32 cmd;
+ u32 status;
+ u32 cmden;
u32 padding[15];
};
static int __init memsize(void)
{
u32 size = (64 << 20);
- volatile u32 *addr = (u32 *)KSEG1ADDR(0x14000000 + size - 4);
+ u32 *addr = (u32 *)KSEG1ADDR(0x14000000 + size - 4);
u32 *kernel_end = (u32 *)KSEG1ADDR(CPHYSADDR((u32)&_end));
+ u32 *tmpaddr = addr;
- while (addr > kernel_end) {
- *addr = (u32)addr;
+ while (tmpaddr > kernel_end) {
+ *tmpaddr = (u32)tmpaddr;
size >>= 1;
- addr -= size >> 2;
+ tmpaddr -= size >> 2;
}
do {
- addr += size >> 2;
- if (*addr != (u32)addr)
+ tmpaddr += size >> 2;
+ if (*tmpaddr != (u32)tmpaddr)
break;
size <<= 1;
} while (size < (64 << 20));
+ writel(tmpaddr, &addr);
+
return size;
}
+ *(u32 *)(ebase + 0x20C) = 0x00000000;
+ flush_icache_range(ebase + 0x200, ebase + 0x210);
+ } else {
-+ *(volatile u32 *)(ebase + 0x200) =
++ *(u32 *)(ebase + 0x200) =
+ 0x08000000 | (0x03ffffff & (handler >> 2));
+ flush_icache_range(ebase + 0x200, ebase + 0x204);
+ }