PL011: Fix a bug in the UART FIFO polling

Before attempting to write a character, the PL011 driver polls
the PL011_UARTFR_TXFF bit to know whether the UART FIFO is full.
However, the comparison with 1 was incorrect because
PL011_UARTFR_TXFF is not at bit 0. This patch fixes it.

Change-Id: If78892345bbdc8a5e4ae4a1b7159753c609681b0

diff --git a/drivers/arm/pl011/pl011_console.c b/drivers/arm/pl011/pl011_console.c
index 0e82aa21b79faa805d265ceb5b56a1d128433761..a26c00eda3c2f4f76ccab87462b01c878465bc65 100644 (file)
--- a/drivers/arm/pl011/pl011_console.c
+++ b/drivers/arm/pl011/pl011_console.c
@@ -65,8 +65,10 @@ void console_init(unsigned long base_addr)
 
 }
 
-#define WAIT_UNTIL_UART_FREE(base) while ((pl011_read_fr(base)\
-                                       & PL011_UARTFR_TXFF) == 1)
+#define WAIT_UNTIL_UART_FREE(base)                             \
+       while ((pl011_read_fr(base) & PL011_UARTFR_TXFF))       \
+               continue
+
 int console_putc(int c)
 {
        assert(uart_base);