arm: ls102xa: Fixed a register definition error
authorTang Yuantian <Yuantian.Tang@freescale.com>
Thu, 9 Oct 2014 08:11:37 +0000 (16:11 +0800)
committerYork Sun <yorksun@freescale.com>
Wed, 19 Nov 2014 20:56:14 +0000 (12:56 -0800)
There are 8 SCFG_SPARECR registers in SCFG memory block, not one.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h

index 7995fe262b17c653569a247e617608be83039ce8..b5db7205fc46bd84a0b9e7494aa10c2ef9c4c011 100644 (file)
@@ -182,7 +182,7 @@ struct ccsr_scfg {
        u32 etsecmcr;
        u32 sdhciovserlcr;
        u32 resv14[61];
-       u32 sparecr;
+       u32 sparecr[8];
 };
 
 /* Clocking */