This patch backports the upstream patch that adds the 4B_OPCODES flag to w25q256 under 5.4 kernel.
This is needed for ipq40xx and ramips.
Signed-off-by: Robert Marko <robimarko@gmail.com>
--- /dev/null
+From 10050a02f7d508fa88f70fcfceefbacd13488ca7 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Mon, 23 Dec 2019 17:05:49 +0200
+Subject: [PATCH] mtd: spi-nor: Add 4B_OPCODES flag to w25q256
+
+The w25q256 supports 4-byte opcodes so lets add the flag.
+Tested on OpenWrt under 4.19.82 kernel on 8devices Habanero.
+
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
+---
+ drivers/mtd/spi-nor/spi-nor.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/drivers/mtd/spi-nor/spi-nor.c
++++ b/drivers/mtd/spi-nor/spi-nor.c
+@@ -2480,7 +2480,9 @@ static const struct flash_info spi_nor_i
+ { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) },
+ { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) },
+ { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) },
+- { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
++ { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512,
++ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
++ SPI_NOR_4B_OPCODES) },
+ { "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 512,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+ { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024,
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -2704,7 +2704,7 @@ static int spi_nor_write(struct mtd_info
+@@ -2706,7 +2706,7 @@ static int spi_nor_write(struct mtd_info
write_enable(nor);
ret = spi_nor_write_data(nor, addr, page_remain, buf + i);
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -4884,6 +4884,7 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -4886,6 +4886,7 @@ int spi_nor_scan(struct spi_nor *nor, co
*/
if (JEDEC_MFR(nor->info) == SNOR_MFR_ATMEL ||
JEDEC_MFR(nor->info) == SNOR_MFR_INTEL ||
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -4397,6 +4397,7 @@ static void st_micron_set_default_init(s
+@@ -4399,6 +4399,7 @@ static void st_micron_set_default_init(s
static void winbond_set_default_init(struct spi_nor *nor)
{
nor->params.set_4byte = winbond_set_4byte;
}
-@@ -4886,6 +4887,7 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -4888,6 +4889,7 @@ int spi_nor_scan(struct spi_nor *nor, co
JEDEC_MFR(nor->info) == SNOR_MFR_INTEL ||
JEDEC_MFR(nor->info) == SNOR_MFR_MACRONIX ||
JEDEC_MFR(nor->info) == SNOR_MFR_SST ||
depends on OF && (ARM || ARM64 || COMPILE_TEST)
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -4464,6 +4464,7 @@ static void spi_nor_info_init_params(str
+@@ -4466,6 +4466,7 @@ static void spi_nor_info_init_params(str
struct spi_nor_erase_map *map = ¶ms->erase_map;
const struct flash_info *info = nor->info;
struct device_node *np = spi_nor_get_flash_node(nor);
u8 i, erase_mask;
/* Initialize legacy flash parameters and settings. */
-@@ -4527,6 +4528,21 @@ static void spi_nor_info_init_params(str
+@@ -4529,6 +4530,21 @@ static void spi_nor_info_init_params(str
*/
erase_mask = 0;
i = 0;
if (info->flags & SECT_4K_PMC) {
erase_mask |= BIT(i);
spi_nor_set_erase_type(&map->erase_type[i], 4096u,
-@@ -4538,6 +4554,7 @@ static void spi_nor_info_init_params(str
+@@ -4540,6 +4556,7 @@ static void spi_nor_info_init_params(str
SPINOR_OP_BE_4K);
i++;
}
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -2504,6 +2504,9 @@ static const struct flash_info spi_nor_i
+@@ -2506,6 +2506,9 @@ static const struct flash_info spi_nor_i
/* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */
{ "XM25QH64A", INFO(0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "XM25QH128A", INFO(0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },