The peach boards have their SDRAM start address at 0x20000000 instead of
0x40000000 which seems common for all other exynos5 based boards. This
means the layout set in exynos5-common.h causes the kernel be loaded
more then 128MB (at 0x42000000) away from memory start which breaks
booting kernels with CONFIG_AUTO_ZRELADDR
Define a custom MEM_LAYOUT_ENV_SETTINGS for both peach boards which uses
the same offsets from start of memory as the common exynos5 settings.
This fixes booting via bootz and PXE
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
#define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
#define CONFIG_SPI_BOOTING
+#define MEM_LAYOUT_ENV_SETTINGS \
+ "bootm_size=0x10000000\0" \
+ "kernel_addr_r=0x22000000\0" \
+ "fdt_addr_r=0x23000000\0" \
+ "ramdisk_addr_r=0x23300000\0" \
+ "scriptaddr=0x30000000\0" \
+ "pxefile_addr_r=0x31000000\0"
+
#include <configs/exynos5420-common.h>
#include <configs/exynos5-dt-common.h>
#define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
#define CONFIG_SPI_BOOTING
+#define MEM_LAYOUT_ENV_SETTINGS \
+ "bootm_size=0x10000000\0" \
+ "kernel_addr_r=0x22000000\0" \
+ "fdt_addr_r=0x23000000\0" \
+ "ramdisk_addr_r=0x23300000\0" \
+ "scriptaddr=0x30000000\0" \
+ "pxefile_addr_r=0x31000000\0"
+
#include <configs/exynos5420-common.h>
#include <configs/exynos5-dt-common.h>