xgifb_reg_set(P3d4, 0xB0, 0x80); /* DDRII Dual frequency mode */
XGINew_DDR2_DefaultRegister(HwDeviceExtension, P3d4, pVBInfo);
}
- xgifb_reg_set(P3c4,
- 0x1B,
- pVBInfo->SR15[3][pVBInfo->ram_type]); /* SR1B */
+ xgifb_reg_set(P3c4, 0x1B, 0x03); /* SR1B */
}
{0x7C, 0x08, 0x01, 200},
};
-static const unsigned char XG27_SR13[4][3] = {
+static const unsigned char XG27_SR13[3][3] = {
{0x35, 0x45, 0xb1}, /* SR13 */
{0x41, 0x51, 0x5c}, /* SR14 */
{0x32, 0x32, 0x42}, /* SR18 */
- {0x03, 0x03, 0x03} /* SR1B */
};
-static const unsigned char XGI340_SR13[4][3] = {
+static const unsigned char XGI340_SR13[3][3] = {
{0x35, 0x45, 0xb1}, /* SR13 */
{0x41, 0x51, 0x5c}, /* SR14 */
{0x31, 0x42, 0x42}, /* SR18 */
- {0x03, 0x03, 0x03} /* SR1B */
};
static const unsigned char XGI340_cr41[24][3] = {