#include <asm/gpio.h>
#include <asm/arch/rmobile.h>
#include <asm/arch/rcar-mstp.h>
+#include <asm/arch/mmc.h>
#include <miiphy.h>
#include <i2c.h>
+#include <mmc.h>
#include "qos.h"
DECLARE_GLOBAL_DATA_PTR;
#define TMU0_MSTP125 (1 << 25)
#define SCIF0_MSTP721 (1 << 21)
#define ETHER_MSTP813 (1 << 13)
+#define MMC1_MSTP305 (1 << 5)
int board_early_init_f(void)
{
mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP721);
/* ETHER */
mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHER_MSTP813);
+ /* eMMC */
+ mstp_clrbits_le32(MSTPSR3, SMSTPCR3, MMC1_MSTP305);
return 0;
}
return 0;
}
+int board_mmc_init(bd_t *bis)
+{
+ int ret = 0;
+
+#ifdef CONFIG_SH_MMCIF
+ gpio_request(GPIO_FN_MMC1_D0, NULL);
+ gpio_request(GPIO_FN_MMC1_D1, NULL);
+ gpio_request(GPIO_FN_MMC1_D2, NULL);
+ gpio_request(GPIO_FN_MMC1_D3, NULL);
+ gpio_request(GPIO_FN_MMC1_D4, NULL);
+ gpio_request(GPIO_FN_MMC1_D5, NULL);
+ gpio_request(GPIO_FN_MMC1_D6, NULL);
+ gpio_request(GPIO_FN_MMC1_D7, NULL);
+ gpio_request(GPIO_FN_MMC1_CLK, NULL);
+ gpio_request(GPIO_FN_MMC1_CMD, NULL);
+
+ ret = mmcif_mmc_init();
+#endif
+ return ret;
+}
+
+
int dram_init(void)
{
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
#define CONFIG_USB_STORAGE
+/* MMC */
+#define CONFIG_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+
+#define CONFIG_SH_MMCIF
+#define CONFIG_SH_MMCIF_ADDR 0xEE220000
+#define CONFIG_SH_MMCIF_CLK 97500000
+
/* Module stop status bits */
/* INTC-RT */
#define CONFIG_SMSTP0_ENA 0x00400000