This fixes a regression caused by
e25fbe3fe531029dc7b100ea4c79dbc802e17fc2
(gw_ventana: Move the DCD settings to spl code)
The clock gating must be setup prior to calling arch_cpu_init(). Without this
booting to SD (directly via eFuse or via bmode) will hang.
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
struct ventana_board_info ventana_info;
int board_model;
+ /* setup clock gating */
+ ccgr_init();
+
/* setup AIPS and disable watchdog */
arch_cpu_init();
- ccgr_init();
+ /* setup AXI */
gpr_init();
/* iomux and setup of i2c */