* which is done by master demod.
* Master feeds also clock and controls power via GPIO.
*/
- ret = af9035_rd_reg(d, state->eeprom_addr + EEPROM_DUAL_MODE, &tmp);
+ ret = af9035_rd_reg(d, state->eeprom_addr + EEPROM_TS_MODE, &tmp);
if (ret < 0)
goto err;
- if (tmp) {
+ if (tmp == 1 || tmp == 3) {
/* configure gpioh1, reset & power slave demod */
ret = af9035_wr_reg_mask(d, 0x00d8b0, 0x01, 0x01);
if (ret < 0)
}
/* check if there is dual tuners */
- ret = af9035_rd_reg(d, state->eeprom_addr + EEPROM_DUAL_MODE, &tmp);
+ ret = af9035_rd_reg(d, state->eeprom_addr + EEPROM_TS_MODE, &tmp);
if (ret < 0)
goto err;
- state->dual_mode = tmp;
- dev_dbg(&d->udev->dev, "%s: dual mode=%d\n", __func__,
- state->dual_mode);
+ if (tmp == 1 || tmp == 3)
+ state->dual_mode = true;
+
+ dev_dbg(&d->udev->dev, "%s: ts mode=%d dual mode=%d\n", __func__,
+ tmp, state->dual_mode);
if (state->dual_mode) {
/* read 2nd demodulator I2C address */
* eeprom is memory mapped as read only. Writing that memory mapped address
* will not corrupt eeprom.
*
- * eeprom has value 0x00 single mode and 0x03 for dual mode as far as I have
- * seen to this day.
+ * TS mode:
+ * 0 TS
+ * 1 DCA + PIP
+ * 3 PIP
+ * n DCA
+ *
+ * Values 0 and 3 are seen to this day. 0 for single TS and 3 for dual TS.
*/
#define EEPROM_BASE_AF9035 0x42fd
#define EEPROM_SHIFT 0x10
#define EEPROM_IR_MODE 0x10
-#define EEPROM_DUAL_MODE 0x29
+#define EEPROM_TS_MODE 0x29
#define EEPROM_2ND_DEMOD_ADDR 0x2a
#define EEPROM_IR_TYPE 0x2c
#define EEPROM_1_IF_L 0x30