* Patch by Jon Loeliger 2005-02-08

  Determine L2 Cache size dynamically on 85XX boards.

diff --git a/CHANGELOG b/CHANGELOG
index ac9471d45f8a6a1b1ac25f5cd79f06fcc292ef6a..7dd4fad9a1be51d26b443094169dc212e9d094c6 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -1,6 +1,9 @@
 ======================================================================
 Changes for U-Boot 1.1.3:
 ======================================================================
+* Patch by Jon Loeliger 2005-02-08
+  Determine L2 Cache size dynamically on 85XX boards.
+
 * Patch by Jon Loeliger, Kumar Gala 2005-02-08
   - Convert the CPM2 based functionality to use new CONFIG_CPM2
     option rather than a myriad of CONFIG_MPC8560-like variants.

diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index 4d6438fd4d634eeeb099babdc0436c9301920add..79ea91f22adcc6cb1a187b2e083ff8da556d4fc5 100644 (file)
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -188,6 +188,21 @@ int cpu_init_r (void)
        volatile ccsr_l2cache_t *l2cache = &immap->im_l2cache;
        volatile uint temp;
 
+       asm("msync;isync");
+       temp = l2cache->l2ctl;
+       temp &= 0x30000000;
+       switch ( temp ) {
+       case 0x20000000:
+               printf ("L2 cache 256KB:");
+               break;
+       case 0x00000000:
+       case 0x10000000:
+       case 0x30000000:
+       default:
+               printf ("L2 cache unknown size. Check the silicon!\n");
+               return -1;
+       }
+
        asm("msync;isync");
        l2cache->l2ctl = 0x68000000; /* invalidate */
        temp = l2cache->l2ctl;
@@ -196,7 +211,7 @@ int cpu_init_r (void)
        temp = l2cache->l2ctl;
        asm("msync;isync");
 
-       printf("L2:    256 kB enabled\n");
+       printf("enabled\n");
 #else
        printf("L2:    disabled.\n");
 #endif