ipq806x: apply updated USB PHY settings to v2.0 SoC
authorPavel Kubelun <be.dissent@gmail.com>
Thu, 18 Jan 2018 10:38:18 +0000 (13:38 +0300)
committerJohn Crispin <john@phrozen.org>
Tue, 22 May 2018 18:34:14 +0000 (20:34 +0200)
USB PHY power settings introduced for ipq8065 SoC with commit
644a0d5 "ipq8065: adjust SS USB PHY power settings"

According to that commit msg and in correspondence to GPL tarballs
and related QSDK branch those settings are applied to ipq8064
SoCs of version >= 2.0.

https://github.com/paul-chambers/netgear-r7800/blob/master/git_home/linux.git/sourcecode/arch/arm/mach-msm/board-ipq806x.c#L2507-L2514

Now as we have clarified that mass market boards are of SoC v2.0
move those USB PHY settings from ipq8065 (v3.0 SoC) dtsi to
ipq8064 v2.0 dtsi.

Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
[slh: rebase for kernel v4.14 as well]
Signed-off-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8065.dtsi
target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065.dtsi

index b90ce81868ec840255105b87c5f0c55ba3cc5927..5a40b03eefdea869683d65e2a2ee77b248c87f4d 100644 (file)
@@ -1 +1,18 @@
 #include "qcom-ipq8064-v1.0.dtsi"
+
+/ {
+       soc: soc {
+
+               ss_phy_0: phy@110f8830 {
+                       rx_eq = <2>;
+                       tx_deamp_3_5db = <32>;
+                       mpll = <0xa0>;
+               };
+
+               ss_phy_1: phy@100f8830 {
+                       rx_eq = <2>;
+                       tx_deamp_3_5db = <32>;
+                       mpll = <0xa0>;
+               };
+       };
+};
index 211fb6ad2bf81279353bb7ffee09d255c44e50f2..37fb922be0410ade91eff8d4bc9674dc8e66da42 100644 (file)
                        };
                };
 
-               ss_phy_0: phy@110f8830 {
-                       rx_eq = <2>;
-                       tx_deamp_3_5db = <32>;
-                       mpll = <0xa0>;
-               };
-               ss_phy_1: phy@100f8830 {
-                       rx_eq = <2>;
-                       tx_deamp_3_5db = <32>;
-                       mpll = <0xa0>;
-               };
-
                /* Temporary fixed regulator */
                vsdcc_fixed: vsdcc-regulator {
                        compatible = "regulator-fixed";
index b90ce81868ec840255105b87c5f0c55ba3cc5927..5a40b03eefdea869683d65e2a2ee77b248c87f4d 100644 (file)
@@ -1 +1,18 @@
 #include "qcom-ipq8064-v1.0.dtsi"
+
+/ {
+       soc: soc {
+
+               ss_phy_0: phy@110f8830 {
+                       rx_eq = <2>;
+                       tx_deamp_3_5db = <32>;
+                       mpll = <0xa0>;
+               };
+
+               ss_phy_1: phy@100f8830 {
+                       rx_eq = <2>;
+                       tx_deamp_3_5db = <32>;
+                       mpll = <0xa0>;
+               };
+       };
+};
index 211fb6ad2bf81279353bb7ffee09d255c44e50f2..37fb922be0410ade91eff8d4bc9674dc8e66da42 100644 (file)
                        };
                };
 
-               ss_phy_0: phy@110f8830 {
-                       rx_eq = <2>;
-                       tx_deamp_3_5db = <32>;
-                       mpll = <0xa0>;
-               };
-               ss_phy_1: phy@100f8830 {
-                       rx_eq = <2>;
-                       tx_deamp_3_5db = <32>;
-                       mpll = <0xa0>;
-               };
-
                /* Temporary fixed regulator */
                vsdcc_fixed: vsdcc-regulator {
                        compatible = "regulator-fixed";