-// SPDX-License-Identifier: (GPL-2.0 OR MIT)\r
-/*\r
- * Copyright (C) 2021 MediaTek Inc.\r
- * Author: Sam.Shih <sam.shih@mediatek.com>\r
- */\r
-\r
-/dts-v1/;\r
-#include "mt7986a.dtsi"\r
-#include <dt-bindings/gpio/gpio.h>\r
-#include <dt-bindings/input/input.h>\r
-\r
-/ {\r
- model = "Zyxel EX5601-T0";\r
- compatible = "zyxel,ex5601-t0", "mediatek,mt7986a-rfb-snand";\r
-\r
- aliases {\r
- serial0 = &uart0;\r
- };\r
-\r
- chosen {\r
- stdout-path = "serial0:115200n8";\r
- };\r
-\r
- memory {\r
- reg = <0 0x40000000 0 0x40000000>;\r
- };\r
-\r
- reg_1p8v: regulator-1p8v {\r
- compatible = "regulator-fixed";\r
- regulator-name = "fixed-1.8V";\r
- regulator-min-microvolt = <1800000>;\r
- regulator-max-microvolt = <1800000>;\r
- regulator-boot-on;\r
- regulator-always-on;\r
- };\r
-\r
- reg_3p3v: regulator-3p3v {\r
- compatible = "regulator-fixed";\r
- regulator-name = "fixed-3.3V";\r
- regulator-min-microvolt = <3300000>;\r
- regulator-max-microvolt = <3300000>;\r
- regulator-boot-on;\r
- regulator-always-on;\r
- };\r
-\r
- reg_5v: regulator-5v {\r
- compatible = "regulator-fixed";\r
- regulator-name = "fixed-5V";\r
- regulator-min-microvolt = <5000000>;\r
- regulator-max-microvolt = <5000000>;\r
- regulator-boot-on;\r
- regulator-always-on;\r
- };\r
-\r
- gpio-keys {\r
- compatible = "gpio-keys";\r
- poll-interval = <20>;\r
-\r
- reset-button {\r
- label = "reset";\r
- gpios = <&pio 21 GPIO_ACTIVE_LOW>;\r
- linux,code = <KEY_RESTART>;\r
- };\r
-\r
- wlan-button {\r
- label = "wlan";\r
- gpios = <&pio 11 GPIO_ACTIVE_LOW>;\r
- linux,code = <KEY_WLAN>;\r
- };\r
- wps-button {\r
- label = "wps";\r
- gpios = <&pio 56 GPIO_ACTIVE_LOW>;\r
- linux,code = <KEY_WPS_BUTTON>;\r
- };\r
- };\r
-\r
- zyleds {\r
- compatible = "gpio-leds";\r
-\r
- led_green_wifi24g {\r
- label = "zyled-green-wifi24g";\r
- gpios = <&pio 1 GPIO_ACTIVE_LOW>;\r
- default-state = "off";\r
- };\r
-\r
- led_green_wifi5g {\r
- label = "zyled-green-wifi5g";\r
- gpios = <&pio 2 GPIO_ACTIVE_LOW>;\r
- default-state = "off";\r
- };\r
-\r
- led_green_inet {\r
- label = "zyled-green-inet";\r
- gpios = <&pio 14 GPIO_ACTIVE_LOW>;\r
- default-state = "off";\r
- };\r
-\r
- led_red_inet {\r
- label = "zyled-red-inet";\r
- gpios = <&pio 15 GPIO_ACTIVE_LOW>;\r
- default-state = "off";\r
- };\r
-\r
- led_green_pwr {\r
- label = "zyled-green-pwr";\r
- gpios = <&pio 13 GPIO_ACTIVE_LOW>;\r
- linux,default-trigger = "timer"; /* Default blinking */\r
- led-pattern = <125 125>; /* Fast blink is 4 HZ */\r
- };\r
-\r
- led_red_pwr {\r
- label = "zyled-red-pwr";\r
- gpios = <&pio 12 GPIO_ACTIVE_LOW>;\r
- default-state = "off";\r
- };\r
-\r
- led_green_fxs {\r
- label = "zyled-green-fxs";\r
- gpios = <&pio 16 GPIO_ACTIVE_HIGH>;\r
- default-state = "off";\r
- };\r
-\r
- led_amber_fxs {\r
- label = "zyled-amber-fxs";\r
- gpios = <&pio 17 GPIO_ACTIVE_HIGH>;\r
- default-state = "off";\r
- };\r
-\r
- led_amber_wps24g {\r
- label = "zyled-amber-wps24g";\r
- gpios = <&pio 18 GPIO_ACTIVE_HIGH>;\r
- default-state = "off";\r
- };\r
-\r
- led_amber_wps5g {\r
- label = "zyled-amber-wps5g";\r
- gpios = <&pio 19 GPIO_ACTIVE_HIGH>;\r
- default-state = "off";\r
- };\r
-\r
- led_green_lan {\r
- label = "zyled-green-lan";\r
- gpios = <&pio 20 GPIO_ACTIVE_HIGH>;\r
- default-state = "off";\r
- };\r
-\r
- led_green_sfp {\r
- label = "zyled-green-sfp";\r
- gpios = <&pio 24 GPIO_ACTIVE_HIGH>;\r
- default-state = "off";\r
- };\r
-\r
- };\r
-\r
-};\r
-\r
-ð {\r
- status = "okay";\r
-\r
- gmac0: mac@0 {\r
- compatible = "mediatek,eth-mac";\r
- reg = <0>;\r
- phy-mode = "2500base-x";\r
-\r
- nvmem-cells = <&macaddr_factory_002a>;\r
- nvmem-cell-names = "mac-address";\r
-\r
- fixed-link {\r
- speed = <2500>;\r
- full-duplex;\r
- pause;\r
- };\r
- };\r
-\r
- gmac1: mac@1 {\r
- compatible = "mediatek,eth-mac";\r
- reg = <1>;\r
- phy-mode = "2500base-x";\r
- phy = <&phy6>;\r
-\r
- nvmem-cells = <&macaddr_factory_0024>;\r
- nvmem-cell-names = "mac-address";\r
- };\r
-\r
- mdio: mdio-bus {\r
- #address-cells = <1>;\r
- #size-cells = <0>;\r
- reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;\r
- reset-delay-us = <1500000>;\r
- reset-post-delay-us = <1000000>;\r
-\r
- phy5: phy@5 {\r
- compatible = "ethernet-phy-ieee802.3-c45";\r
- reg = <5>;\r
- };\r
-\r
- phy6: phy@6 {\r
- compatible = "ethernet-phy-ieee802.3-c45";\r
- reg = <6>;\r
- };\r
-\r
- switch@0 {\r
- compatible = "mediatek,mt7531";\r
- reg = <31>;\r
- reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;\r
-\r
- ports {\r
- #address-cells = <1>;\r
- #size-cells = <0>;\r
-\r
- port@1 {\r
- reg = <1>;\r
- label = "lan1";\r
- };\r
-\r
- port@2 {\r
- reg = <2>;\r
- label = "lan2";\r
- };\r
-\r
- port@3 {\r
- reg = <3>;\r
- label = "lan3";\r
- };\r
-\r
- port@5 {\r
- reg = <5>;\r
- label = "lan4";\r
- phy-mode = "2500base-x";\r
- phy = <&phy5>;\r
- };\r
-\r
- port@6 {\r
- reg = <6>;\r
- ethernet = <&gmac0>;\r
- phy-mode = "2500base-x";\r
-\r
- fixed-link {\r
- speed = <2500>;\r
- full-duplex;\r
- pause;\r
- };\r
- };\r
- };\r
- };\r
- };\r
-};\r
-\r
-&wmac {\r
- status = "okay";\r
- pinctrl-names = "default", "dbdc";\r
- pinctrl-0 = <&wf_2g_5g_pins>;\r
- pinctrl-1 = <&wf_dbdc_pins>;\r
- mediatek,mtd-eeprom = <&factory 0x0>;\r
- nvmem-cells = <&macaddr_factory_0004>;\r
- nvmem-cell-names = "mac-address";\r
-};\r
-\r
-&crypto {\r
- status = "okay";\r
-};\r
-\r
-&mmc0 {\r
- pinctrl-names = "default", "state_uhs";\r
- pinctrl-0 = <&mmc0_pins_default>;\r
- pinctrl-1 = <&mmc0_pins_uhs>;\r
- bus-width = <8>;\r
- max-frequency = <200000000>;\r
- cap-mmc-highspeed;\r
- mmc-hs200-1_8v;\r
- mmc-hs400-1_8v;\r
- hs400-ds-delay = <0x14014>;\r
- vmmc-supply = <®_3p3v>;\r
- vqmmc-supply = <®_1p8v>;\r
- non-removable;\r
- no-sd;\r
- no-sdio;\r
- status = "disabled";\r
-};\r
-\r
-&pcie {\r
- pinctrl-names = "default";\r
- pinctrl-0 = <&pcie_pins>;\r
- status = "okay";\r
-};\r
-\r
-&pcie_phy {\r
- status = "okay";\r
-};\r
-\r
-&pio {\r
- mmc0_pins_default: mmc0-pins {\r
- mux {\r
- function = "emmc";\r
- groups = "emmc_51";\r
- };\r
- conf-cmd-dat {\r
- pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",\r
- "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",\r
- "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";\r
- input-enable;\r
- drive-strength = <4>;\r
- mediatek,pull-up-adv = <1>; /* pull-up 10K */\r
- };\r
- conf-clk {\r
- pins = "EMMC_CK";\r
- drive-strength = <6>;\r
- mediatek,pull-down-adv = <2>; /* pull-down 50K */\r
- };\r
- conf-ds {\r
- pins = "EMMC_DSL";\r
- mediatek,pull-down-adv = <2>; /* pull-down 50K */\r
- };\r
- conf-rst {\r
- pins = "EMMC_RSTB";\r
- drive-strength = <4>;\r
- mediatek,pull-up-adv = <1>; /* pull-up 10K */\r
- };\r
- };\r
-\r
- mmc0_pins_uhs: mmc0-uhs-pins {\r
- mux {\r
- function = "emmc";\r
- groups = "emmc_51";\r
- };\r
- conf-cmd-dat {\r
- pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",\r
- "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",\r
- "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";\r
- input-enable;\r
- drive-strength = <4>;\r
- mediatek,pull-up-adv = <1>; /* pull-up 10K */\r
- };\r
- conf-clk {\r
- pins = "EMMC_CK";\r
- drive-strength = <6>;\r
- mediatek,pull-down-adv = <2>; /* pull-down 50K */\r
- };\r
- conf-ds {\r
- pins = "EMMC_DSL";\r
- mediatek,pull-down-adv = <2>; /* pull-down 50K */\r
- };\r
- conf-rst {\r
- pins = "EMMC_RSTB";\r
- drive-strength = <4>;\r
- mediatek,pull-up-adv = <1>; /* pull-up 10K */\r
- };\r
- };\r
-\r
- pcie_pins: pcie-pins {\r
- mux {\r
- function = "pcie";\r
- groups = "pcie_clk", "pcie_wake", "pcie_pereset";\r
- };\r
- };\r
-\r
- spic_pins_g2: spic-pins-29-to-32 {\r
- mux {\r
- function = "spi";\r
- groups = "spi1_2";\r
- };\r
- };\r
-\r
- spi_flash_pins: spi-flash-pins-33-to-38 {\r
- mux {\r
- function = "spi";\r
- groups = "spi0", "spi0_wp_hold";\r
- };\r
- conf-pu {\r
- pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";\r
- drive-strength = <8>;\r
- mediatek,pull-up-adv = <0>; /* bias-disable */\r
- };\r
- conf-pd {\r
- pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";\r
- drive-strength = <8>;\r
- mediatek,pull-down-adv = <0>; /* bias-disable */\r
- };\r
- };\r
-\r
- uart1_pins: uart1-pins {\r
- mux {\r
- function = "uart";\r
- groups = "uart1";\r
- };\r
- };\r
-\r
- uart2_pins: uart2-pins {\r
- mux {\r
- function = "uart";\r
- groups = "uart2";\r
- };\r
- };\r
-\r
- wf_2g_5g_pins: wf_2g_5g-pins {\r
- mux {\r
- function = "wifi";\r
- groups = "wf_2g", "wf_5g";\r
- };\r
- conf {\r
- pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",\r
- "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",\r
- "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",\r
- "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",\r
- "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",\r
- "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",\r
- "WF1_TOP_CLK", "WF1_TOP_DATA";\r
- drive-strength = <4>;\r
- };\r
- };\r
-\r
- wf_dbdc_pins: wf_dbdc-pins {\r
- mux {\r
- function = "wifi";\r
- groups = "wf_dbdc";\r
- };\r
- conf {\r
- pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",\r
- "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",\r
- "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",\r
- "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",\r
- "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",\r
- "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",\r
- "WF1_TOP_CLK", "WF1_TOP_DATA";\r
- drive-strength = <4>;\r
- };\r
- };\r
-};\r
-\r
-&spi0 {\r
- pinctrl-names = "default";\r
- pinctrl-0 = <&spi_flash_pins>;\r
- cs-gpios = <0>, <0>;\r
- #address-cells = <1>;\r
- #size-cells = <0>;\r
- status = "okay";\r
-\r
- spi_nand: spi_nand@0 {\r
- #address-cells = <1>;\r
- #size-cells = <1>;\r
- compatible = "spi-nand";\r
- reg = <1>;\r
- spi-max-frequency = <10000000>;\r
- spi-tx-buswidth = <4>;\r
- spi-rx-buswidth = <4>;\r
-\r
- partitions {\r
- compatible = "fixed-partitions";\r
- #address-cells = <1>;\r
- #size-cells = <1>;\r
-\r
- partition@0 {\r
- label = "BL2";\r
- reg = <0x00000 0x0100000>;\r
- read-only;\r
- };\r
-\r
- partition@100000 {\r
- label = "u-boot-env";\r
- reg = <0x0100000 0x0080000>;\r
- };\r
-\r
- factory: partition@180000 {\r
- label = "Factory";\r
- reg = <0x180000 0x0200000>;\r
- read-only;\r
- };\r
-\r
- partition@380000 {\r
- label = "FIP";\r
- reg = <0x380000 0x01C0000>;\r
- read-only;\r
- };\r
-\r
- partition@540000 {\r
- label = "zloader";\r
- reg = <0x540000 0x0040000>;\r
- read-only;\r
- };\r
-\r
- partition@580000 {\r
- label = "ubi";\r
- reg = <0x580000 0x4000000>;\r
- };\r
-\r
- partition@4580000 {\r
- label = "ubi2";\r
- reg = <0x4580000 0x4000000>;\r
- read-only;\r
- };\r
-\r
- partition@8580000 {\r
- label = "zyubi";\r
- reg = <0x8580000 0x15A80000>;\r
- };\r
- };\r
- };\r
-};\r
-\r
-&spi1 {\r
- pinctrl-names = "default";\r
- pinctrl-0 = <&spic_pins_g2>;\r
- status = "okay";\r
-\r
- proslic_spi: proslic_spi@0 {\r
- compatible = "silabs,proslic_spi";\r
- reg = <0>;\r
- spi-max-frequency = <10000000>;\r
- spi-cpha = <1>;\r
- spi-cpol = <1>;\r
- channel_count = <1>;\r
- debug_level = <4>; /* 1 = TRC, 2 = DBG, 4 = ERR */\r
- reset_gpio = <&pio 7 GPIO_ACTIVE_HIGH>;\r
- ig,enable-spi = <1>; /* 1: Enable, 0: Disable */\r
- };\r
-};\r
-\r
-&ssusb {\r
- vusb33-supply = <®_3p3v>;\r
- vbus-supply = <®_5v>;\r
- status = "okay";\r
-};\r
-\r
-&uart0 {\r
- status = "okay";\r
-};\r
-\r
-&uart1 {\r
- pinctrl-names = "default";\r
- pinctrl-0 = <&uart1_pins>;\r
- status = "okay";\r
-};\r
-\r
-&uart2 {\r
- pinctrl-names = "default";\r
- pinctrl-0 = <&uart2_pins>;\r
- status = "okay";\r
-};\r
-\r
-&usb_phy {\r
- status = "okay";\r
-};\r
-\r
-&factory {\r
- compatible = "nvmem-cells";\r
- #address-cells = <1>;\r
- #size-cells = <1>;\r
-\r
- macaddr_factory_0004: macaddr@0004 {\r
- reg = <0x0004 0x6>;\r
- };\r
-\r
- macaddr_factory_0024: macaddr@0024 {\r
- reg = <0x0024 0x6>;\r
- };\r
-\r
- macaddr_factory_002a: macaddr@002a {\r
- reg = <0x002a 0x6>;\r
- };\r
-};\r
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2021 MediaTek Inc.
+ * Author: Sam.Shih <sam.shih@mediatek.com>
+ */
+
+/dts-v1/;
+#include "mt7986a.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Zyxel EX5601-T0";
+ compatible = "zyxel,ex5601-t0", "mediatek,mt7986a-rfb-snand";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ reg = <0 0x40000000 0 0x40000000>;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_5v: regulator-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ poll-interval = <20>;
+
+ reset-button {
+ label = "reset";
+ gpios = <&pio 21 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+
+ wlan-button {
+ label = "wlan";
+ gpios = <&pio 11 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_WLAN>;
+ };
+ wps-button {
+ label = "wps";
+ gpios = <&pio 56 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_WPS_BUTTON>;
+ };
+ };
+
+ zyleds {
+ compatible = "gpio-leds";
+
+ led_green_wifi24g {
+ label = "zyled-green-wifi24g";
+ gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_green_wifi5g {
+ label = "zyled-green-wifi5g";
+ gpios = <&pio 2 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_green_inet {
+ label = "zyled-green-inet";
+ gpios = <&pio 14 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_red_inet {
+ label = "zyled-red-inet";
+ gpios = <&pio 15 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_green_pwr {
+ label = "zyled-green-pwr";
+ gpios = <&pio 13 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "timer"; /* Default blinking */
+ led-pattern = <125 125>; /* Fast blink is 4 HZ */
+ };
+
+ led_red_pwr {
+ label = "zyled-red-pwr";
+ gpios = <&pio 12 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led_green_fxs {
+ label = "zyled-green-fxs";
+ gpios = <&pio 16 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ led_amber_fxs {
+ label = "zyled-amber-fxs";
+ gpios = <&pio 17 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ led_amber_wps24g {
+ label = "zyled-amber-wps24g";
+ gpios = <&pio 18 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ led_amber_wps5g {
+ label = "zyled-amber-wps5g";
+ gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ led_green_lan {
+ label = "zyled-green-lan";
+ gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ led_green_sfp {
+ label = "zyled-green-sfp";
+ gpios = <&pio 24 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ };
+
+};
+
+ð {
+ status = "okay";
+
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "2500base-x";
+
+ nvmem-cells = <&macaddr_factory_002a>;
+ nvmem-cell-names = "mac-address";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+
+ gmac1: mac@1 {
+ compatible = "mediatek,eth-mac";
+ reg = <1>;
+ phy-mode = "2500base-x";
+ phy = <&phy6>;
+
+ nvmem-cells = <&macaddr_factory_0024>;
+ nvmem-cell-names = "mac-address";
+ };
+
+ mdio: mdio-bus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <1500000>;
+ reset-post-delay-us = <1000000>;
+
+ phy5: phy@5 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <5>;
+ };
+
+ phy6: phy@6 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <6>;
+ };
+
+ switch@0 {
+ compatible = "mediatek,mt7531";
+ reg = <31>;
+ reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "lan4";
+ phy-mode = "2500base-x";
+ phy = <&phy5>;
+ };
+
+ port@6 {
+ reg = <6>;
+ ethernet = <&gmac0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+ };
+ };
+};
+
+&wmac {
+ status = "okay";
+ pinctrl-names = "default", "dbdc";
+ pinctrl-0 = <&wf_2g_5g_pins>;
+ pinctrl-1 = <&wf_dbdc_pins>;
+ mediatek,mtd-eeprom = <&factory 0x0>;
+ nvmem-cells = <&macaddr_factory_0004>;
+ nvmem-cell-names = "mac-address";
+};
+
+&crypto {
+ status = "okay";
+};
+
+&mmc0 {
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&mmc0_pins_default>;
+ pinctrl-1 = <&mmc0_pins_uhs>;
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ hs400-ds-delay = <0x14014>;
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <®_1p8v>;
+ non-removable;
+ no-sd;
+ no-sdio;
+ status = "disabled";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_pins>;
+ status = "okay";
+};
+
+&pcie_phy {
+ status = "okay";
+};
+
+&pio {
+ mmc0_pins_default: mmc0-pins {
+ mux {
+ function = "emmc";
+ groups = "emmc_51";
+ };
+ conf-cmd-dat {
+ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
+ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
+ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
+ input-enable;
+ drive-strength = <4>;
+ mediatek,pull-up-adv = <1>; /* pull-up 10K */
+ };
+ conf-clk {
+ pins = "EMMC_CK";
+ drive-strength = <6>;
+ mediatek,pull-down-adv = <2>; /* pull-down 50K */
+ };
+ conf-ds {
+ pins = "EMMC_DSL";
+ mediatek,pull-down-adv = <2>; /* pull-down 50K */
+ };
+ conf-rst {
+ pins = "EMMC_RSTB";
+ drive-strength = <4>;
+ mediatek,pull-up-adv = <1>; /* pull-up 10K */
+ };
+ };
+
+ mmc0_pins_uhs: mmc0-uhs-pins {
+ mux {
+ function = "emmc";
+ groups = "emmc_51";
+ };
+ conf-cmd-dat {
+ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
+ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
+ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
+ input-enable;
+ drive-strength = <4>;
+ mediatek,pull-up-adv = <1>; /* pull-up 10K */
+ };
+ conf-clk {
+ pins = "EMMC_CK";
+ drive-strength = <6>;
+ mediatek,pull-down-adv = <2>; /* pull-down 50K */
+ };
+ conf-ds {
+ pins = "EMMC_DSL";
+ mediatek,pull-down-adv = <2>; /* pull-down 50K */
+ };
+ conf-rst {
+ pins = "EMMC_RSTB";
+ drive-strength = <4>;
+ mediatek,pull-up-adv = <1>; /* pull-up 10K */
+ };
+ };
+
+ pcie_pins: pcie-pins {
+ mux {
+ function = "pcie";
+ groups = "pcie_clk", "pcie_wake", "pcie_pereset";
+ };
+ };
+
+ spic_pins_g2: spic-pins-29-to-32 {
+ mux {
+ function = "spi";
+ groups = "spi1_2";
+ };
+ };
+
+ spi_flash_pins: spi-flash-pins-33-to-38 {
+ mux {
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
+ };
+ conf-pu {
+ pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
+ drive-strength = <8>;
+ mediatek,pull-up-adv = <0>; /* bias-disable */
+ };
+ conf-pd {
+ pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
+ drive-strength = <8>;
+ mediatek,pull-down-adv = <0>; /* bias-disable */
+ };
+ };
+
+ uart1_pins: uart1-pins {
+ mux {
+ function = "uart";
+ groups = "uart1";
+ };
+ };
+
+ uart2_pins: uart2-pins {
+ mux {
+ function = "uart";
+ groups = "uart2";
+ };
+ };
+
+ wf_2g_5g_pins: wf_2g_5g-pins {
+ mux {
+ function = "wifi";
+ groups = "wf_2g", "wf_5g";
+ };
+ conf {
+ pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+ "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
+ "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
+ "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
+ "WF1_TOP_CLK", "WF1_TOP_DATA";
+ drive-strength = <4>;
+ };
+ };
+
+ wf_dbdc_pins: wf_dbdc-pins {
+ mux {
+ function = "wifi";
+ groups = "wf_dbdc";
+ };
+ conf {
+ pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+ "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
+ "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
+ "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
+ "WF1_TOP_CLK", "WF1_TOP_DATA";
+ drive-strength = <4>;
+ };
+ };
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_flash_pins>;
+ cs-gpios = <0>, <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ spi_nand: spi_nand@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-nand";
+ reg = <1>;
+ spi-max-frequency = <10000000>;
+ spi-tx-buswidth = <4>;
+ spi-rx-buswidth = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "BL2";
+ reg = <0x00000 0x0100000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "u-boot-env";
+ reg = <0x0100000 0x0080000>;
+ };
+
+ factory: partition@180000 {
+ label = "Factory";
+ reg = <0x180000 0x0200000>;
+ read-only;
+ };
+
+ partition@380000 {
+ label = "FIP";
+ reg = <0x380000 0x01C0000>;
+ read-only;
+ };
+
+ partition@540000 {
+ label = "zloader";
+ reg = <0x540000 0x0040000>;
+ read-only;
+ };
+
+ partition@580000 {
+ label = "ubi";
+ reg = <0x580000 0x4000000>;
+ };
+
+ partition@4580000 {
+ label = "ubi2";
+ reg = <0x4580000 0x4000000>;
+ read-only;
+ };
+
+ partition@8580000 {
+ label = "zyubi";
+ reg = <0x8580000 0x15A80000>;
+ };
+ };
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spic_pins_g2>;
+ status = "okay";
+
+ proslic_spi: proslic_spi@0 {
+ compatible = "silabs,proslic_spi";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+ spi-cpha = <1>;
+ spi-cpol = <1>;
+ channel_count = <1>;
+ debug_level = <4>; /* 1 = TRC, 2 = DBG, 4 = ERR */
+ reset_gpio = <&pio 7 GPIO_ACTIVE_HIGH>;
+ ig,enable-spi = <1>; /* 1: Enable, 0: Disable */
+ };
+};
+
+&ssusb {
+ vusb33-supply = <®_3p3v>;
+ vbus-supply = <®_5v>;
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&factory {
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_factory_0004: macaddr@0004 {
+ reg = <0x0004 0x6>;
+ };
+
+ macaddr_factory_0024: macaddr@0024 {
+ reg = <0x0024 0x6>;
+ };
+
+ macaddr_factory_002a: macaddr@002a {
+ reg = <0x002a 0x6>;
+ };
+};
projects / openwrt / staging / hauke.git / commitdiff