net: ethernet: mediatek: Add MT7629 ethernet support
authorSean Wang <sean.wang@mediatek.com>
Sat, 1 Jun 2019 00:03:14 +0000 (08:03 +0800)
committerDavid S. Miller <davem@davemloft.net>
Mon, 3 Jun 2019 22:00:00 +0000 (15:00 -0700)
Add ethernet support to MT7629 SoC

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mediatek/mtk_eth_soc.c
drivers/net/ethernet/mediatek/mtk_eth_soc.h

index d4b3e01b6d5a8db529c40c22cb725cbb90e64202..f7a658129f80f9a99c8ef6790cbcbe11fe4b6212 100644 (file)
@@ -54,8 +54,10 @@ static const struct mtk_ethtool_stats {
 };
 
 static const char * const mtk_clks_source_name[] = {
-       "ethif", "esw", "gp0", "gp1", "gp2", "trgpll", "sgmii_tx250m",
-       "sgmii_rx250m", "sgmii_cdr_ref", "sgmii_cdr_fb", "sgmii_ck", "eth2pll"
+       "ethif", "sgmiitop", "esw", "gp0", "gp1", "gp2", "fe", "trgpll",
+       "sgmii_tx250m", "sgmii_rx250m", "sgmii_cdr_ref", "sgmii_cdr_fb",
+       "sgmii2_tx250m", "sgmii2_rx250m", "sgmii2_cdr_ref", "sgmii2_cdr_fb",
+       "sgmii_ck", "eth2pll",
 };
 
 void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg)
@@ -2628,11 +2630,19 @@ static const struct mtk_soc_data mt7623_data = {
        .required_pctl = true,
 };
 
+static const struct mtk_soc_data mt7629_data = {
+       .ana_rgc3 = 0x128,
+       .caps = MT7629_CAPS | MTK_HWLRO,
+       .required_clks = MT7629_CLKS_BITMAP,
+       .required_pctl = false,
+};
+
 const struct of_device_id of_mtk_match[] = {
        { .compatible = "mediatek,mt2701-eth", .data = &mt2701_data},
        { .compatible = "mediatek,mt7621-eth", .data = &mt7621_data},
        { .compatible = "mediatek,mt7622-eth", .data = &mt7622_data},
        { .compatible = "mediatek,mt7623-eth", .data = &mt7623_data},
+       { .compatible = "mediatek,mt7629-eth", .data = &mt7629_data},
        {},
 };
 MODULE_DEVICE_TABLE(of, of_mtk_match);
index 89d68dd60b3d5c24edce63d5cb149b0b28eef22a..a0aa5008d5cc9c9b9baf322430d691135084acc9 100644 (file)
@@ -475,15 +475,21 @@ enum mtk_tx_flags {
  */
 enum mtk_clks_map {
        MTK_CLK_ETHIF,
+       MTK_CLK_SGMIITOP,
        MTK_CLK_ESW,
        MTK_CLK_GP0,
        MTK_CLK_GP1,
        MTK_CLK_GP2,
+       MTK_CLK_FE,
        MTK_CLK_TRGPLL,
        MTK_CLK_SGMII_TX_250M,
        MTK_CLK_SGMII_RX_250M,
        MTK_CLK_SGMII_CDR_REF,
        MTK_CLK_SGMII_CDR_FB,
+       MTK_CLK_SGMII2_TX_250M,
+       MTK_CLK_SGMII2_RX_250M,
+       MTK_CLK_SGMII2_CDR_REF,
+       MTK_CLK_SGMII2_CDR_FB,
        MTK_CLK_SGMII_CK,
        MTK_CLK_ETH2PLL,
        MTK_CLK_MAX
@@ -502,6 +508,19 @@ enum mtk_clks_map {
                                 BIT(MTK_CLK_SGMII_CK) | \
                                 BIT(MTK_CLK_ETH2PLL))
 #define MT7621_CLKS_BITMAP     (0)
+#define MT7629_CLKS_BITMAP     (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) |  \
+                                BIT(MTK_CLK_GP0) | BIT(MTK_CLK_GP1) | \
+                                BIT(MTK_CLK_GP2) | BIT(MTK_CLK_FE) | \
+                                BIT(MTK_CLK_SGMII_TX_250M) | \
+                                BIT(MTK_CLK_SGMII_RX_250M) | \
+                                BIT(MTK_CLK_SGMII_CDR_REF) | \
+                                BIT(MTK_CLK_SGMII_CDR_FB) | \
+                                BIT(MTK_CLK_SGMII2_TX_250M) | \
+                                BIT(MTK_CLK_SGMII2_RX_250M) | \
+                                BIT(MTK_CLK_SGMII2_CDR_REF) | \
+                                BIT(MTK_CLK_SGMII2_CDR_FB) | \
+                                BIT(MTK_CLK_SGMII_CK) | \
+                                BIT(MTK_CLK_ETH2PLL) | BIT(MTK_CLK_SGMIITOP))
 
 enum mtk_dev_state {
        MTK_HW_INIT,