Hardware specification:
SoC: MediaTek MT7981B 2x A53
Flash: 64GB eMMC or 128 MB SPI-NAND
RAM: 512MB
Ethernet: 4x 10/100/1000 Mbps
Switch: MediaTek MT7531AE
WiFi: MediaTek MT7976C
Button: Reset, Mesh
Power: DC 12V 1A
- UART: 3.3v, 115200n8
--------------------------
| Layout |
| ----------------- |
| 4 | GND TX VCC RX | <= |
| ----------------- |
--------------------------
Gain SSH access:
1. Login into web interface, and download the configuration.
2. Enter fakeroot, decompress the configuration:
tar -zxf cfg_export_config_file.conf
3. Edit 'etc/config/dropbear', set 'enable' to '1'.
4. Edit 'etc/shadow', update (remove) root password:
'root::19523:0:99999:7:::'
5. Repack 'etc' directory:
tar -zcf cfg_export_config_file.conf etc/
* If you find an error about 'etc/wireless/mediatek/DBDC_card0.dat',
just ignore it.
6. Upload new configuration via web interface, now you can SSH to RAX3000M.
Check stroage type:
Check the label on the back of the device:
"CH EC CMIIT ID: xxxx" is eMMC version
"CH CMIIT ID: xxxx" is NAND version
eMMC Flash instructions:
1. SSH to RAX3000M, and backup everything, especially 'factory' part.
('data' partition can be ignored, it's useless.)
2. Write new GPT table:
dd if=openwrt-mediatek-filogic-cmcc_rax3000m-emmc-gpt.bin of=/dev/mmcblk0 bs=512 seek=0 count=34 conv=fsync
3. Erase and write new BL2:
echo 0 > /sys/block/mmcblk0boot0/force_ro
dd if=/dev/zero of=/dev/mmcblk0boot0 bs=512 count=8192 conv=fsync
dd if=openwrt-mediatek-filogic-cmcc_rax3000m-emmc-preloader.bin of=/dev/mmcblk0boot0 bs=512 conv=fsync
4. Erase and write new FIP:
dd if=/dev/zero of=/dev/mmcblk0 bs=512 seek=13312 count=8192 conv=fsync
dd if=openwrt-mediatek-filogic-cmcc_rax3000m-emmc-bl31-uboot.fip of=/dev/mmcblk0 bs=512 seek=13312 conv=fsync
5. Set static IP on your PC:
IP 192.168.1.254, GW 192.168.1.1
6. Serve OpenWrt initramfs image using TFTP server.
7. Cut off the power and re-engage, wait for TFTP recovery to complete.
8. After OpenWrt has booted, perform sysupgrade.
9. Additionally, if you want to have eMMC recovery boot feature:
(Don't worry! You will always have TFTP recovery boot feature.)
dd if=openwrt-mediatek-filogic-cmcc_rax3000m-initramfs-recovery.itb of=/dev/mmcblk0p4 bs=512 conv=fsync
NAND Flash instructions:
1. SSH to RAX3000M, and backup everything, especially 'Factory' part.
2. Erase and write new BL2:
mtd erase BL2
mtd write openwrt-mediatek-filogic-cmcc_rax3000m-nand-preloader.bin BL2
3. Erase and write new FIP:
mtd erase FIP
mtd write openwrt-mediatek-filogic-cmcc_rax3000m-nand-bl31-uboot.fip FIP
4. Set static IP on your PC:
IP 192.168.1.254, GW 192.168.1.1
5. Serve OpenWrt initramfs image using TFTP server.
6. Cut off the power and re-engage, wait for TFTP recovery to complete.
7. After OpenWrt has booted, erase UBI volumes:
ubidetach -p /dev/mtd0
ubiformat -y /dev/mtd0
ubiattach -p /dev/mtd0
8. Create new ubootenv volumes:
ubimkvol /dev/ubi0 -n 0 -N ubootenv -s 128KiB
ubimkvol /dev/ubi0 -n 1 -N ubootenv2 -s 128KiB
9. Additionally, if you want to have NAND recovery boot feature:
(Don't worry! You will always have TFTP recovery boot feature.)
ubimkvol /dev/ubi0 -n 2 -N recovery -s 20MiB
ubiupdatevol /dev/ubi0_2 openwrt-mediatek-filogic-cmcc_rax3000m-initramfs-recovery.itb
10. Perform sysupgrade.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
(cherry picked from commit
423186d7d8b4f23aee91fca4f1774a195eba00d8)
[rebased to 23.05]
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
;;
esac
;;
+cmcc,rax3000m)
+ case "$(cmdline_get_var root)" in
+ /dev/mmc*)
+ local envdev=$(find_mmc_part "ubootenv" "mmcblk0")
+ ubootenv_add_uci_config "$envdev" "0x0" "0x40000" "0x40000" "1"
+ ubootenv_add_uci_config "$envdev" "0x40000" "0x40000" "0x40000" "1"
+ ;;
+ *)
+ . /lib/upgrade/nand.sh
+ local envubi=$(nand_find_ubi ubi)
+ local envdev=/dev/$(nand_find_volume $envubi ubootenv)
+ local envdev2=/dev/$(nand_find_volume $envubi ubootenv2)
+ ubootenv_add_uci_config "$envdev" "0x0" "0x1f000" "0x1f000" "1"
+ ubootenv_add_uci_config "$envdev2" "0x0" "0x1f000" "0x1f000" "1"
+ ;;
+ esac
+ ;;
glinet,gl-mt3000)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x80000" "0x20000"
;;
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "cmcc,rax3000m", "mediatek,mt7981";
+
+ fragment@0 {
+ target = <&mmc0>;
+ __overlay__ {
+ bus-width = <8>;
+ max-frequency = <26000000>;
+ no-sd;
+ no-sdio;
+ non-removable;
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&mmc0_pins_default>;
+ pinctrl-1 = <&mmc0_pins_uhs>;
+ vmmc-supply = <®_3p3v>;
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&pio>;
+ __overlay__ {
+ mmc0_pins_default: mmc0-pins {
+ mux {
+ function = "flash";
+ groups = "emmc_45";
+ };
+ };
+
+ mmc0_pins_uhs: mmc0-uhs-pins {
+ mux {
+ function = "flash";
+ groups = "emmc_45";
+ };
+ };
+ };
+ };
+};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "cmcc,rax3000m", "mediatek,mt7981";
+
+ fragment@0 {
+ target = <&gmac0>;
+ __overlay__ {
+ nvmem-cells = <&macaddr_factory_2a 0>;
+ nvmem-cell-names = "mac-address";
+ };
+ };
+
+ fragment@1 {
+ target = <&gmac1>;
+ __overlay__ {
+ nvmem-cells = <&macaddr_factory_24 0>;
+ nvmem-cell-names = "mac-address";
+ };
+ };
+
+ fragment@2 {
+ target = <&pio>;
+ __overlay__ {
+ spi0_flash_pins: spi0-pins {
+ mux {
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
+ };
+
+ conf-pu {
+ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+ drive-strength = <8>;
+ mediatek,pull-up-adv = <0>; /* bias-disable */
+ };
+
+ conf-pd {
+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+ drive-strength = <8>;
+ mediatek,pull-up-adv = <0>; /* bias-disable */
+ };
+ };
+ };
+ };
+
+ fragment@3 {
+ target = <&spi0>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_flash_pins>;
+ status = "okay";
+
+ spi_nand@0 {
+ compatible = "spi-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+
+ spi-max-frequency = <52000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "bl2";
+ reg = <0x00000 0x0100000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "u-boot-env";
+ reg = <0x100000 0x80000>;
+ };
+
+ factory: partition@180000 {
+ label = "factory";
+ reg = <0x180000 0x200000>;
+ read-only;
+
+ compatible = "nvmem-cells";
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_factory_24: macaddr@24 {
+ compatible = "mac-base";
+ reg = <0x24 0x6>;
+ #nvmem-cell-cells = <1>;
+ };
+
+ macaddr_factory_2a: macaddr@2a {
+ compatible = "mac-base";
+ reg = <0x2a 0x6>;
+ #nvmem-cell-cells = <1>;
+ };
+ };
+ };
+
+ partition@380000 {
+ label = "fip";
+ reg = <0x380000 0x200000>;
+ read-only;
+ };
+
+ partition@580000 {
+ label = "ubi";
+ reg = <0x580000 0x7200000>;
+ };
+ };
+ };
+ };
+ };
+
+ fragment@4 {
+ target = <&wifi>;
+ __overlay__ {
+ mediatek,mtd-eeprom = <&factory 0x0>;
+ };
+ };
+};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (C) 2023 Tianling Shen <cnsztl@immortalwrt.org>
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "mt7981.dtsi"
+
+/ {
+ model = "CMCC RAX3000M";
+ compatible = "cmcc,rax3000m", "mediatek,mt7981";
+
+ aliases {
+ led-boot = &red_led;
+ led-failsafe = &red_led;
+ led-running = &green_led;
+ led-upgrade = &green_led;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ reg = <0 0x40000000 0 0x20000000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ button-reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+ };
+
+ button-mesh {
+ label = "mesh";
+ linux,code = <BTN_9>;
+ linux,input-type = <EV_SW>;
+ gpios = <&pio 0 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ green_led: led-0 {
+ label = "green:status";
+ gpios = <&pio 9 GPIO_ACTIVE_LOW>;
+ };
+
+ led-1 {
+ label = "blue:status";
+ gpios = <&pio 12 GPIO_ACTIVE_LOW>;
+ };
+
+ red_led: led-2 {
+ label = "red:status";
+ gpios = <&pio 35 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+ð {
+ status = "okay";
+
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+
+ gmac1: mac@1 {
+ compatible = "mediatek,eth-mac";
+ reg = <1>;
+ phy-mode = "gmii";
+ phy-handle = <&int_gbe_phy>;
+ };
+};
+
+&mdio_bus {
+ switch: switch@0 {
+ compatible = "mediatek,mt7531";
+ reg = <31>;
+ reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&pio>;
+ interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
+ };
+};
+
+&switch {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "lan3";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan1";
+ };
+
+ port@6 {
+ reg = <6>;
+ ethernet = <&gmac0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&watchdog {
+ status = "okay";
+};
+
+&wifi {
+ status = "okay";
+};
+
+&xhci {
+ status = "okay";
+};
glinet,gl-mt3000)
ucidef_set_interfaces_lan_wan eth1 eth0
;;
+ cmcc,rax3000m|\
h3c,magic-nx30-pro)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" eth1
;;
bananapi,bpi-r3)
wan_mac=$(macaddr_add $(cat /sys/class/net/eth0/address) 1)
;;
+ cmcc,rax3000m)
+ case "$(cmdline_get_var root)" in
+ /dev/mmc*)
+ wan_mac=$(mmc_get_mac_binary factory 0x2a)
+ lan_mac=$(mmc_get_mac_binary factory 0x24)
+ label_mac=$wan_mac
+ ;;
+ esac
+ ;;
h3c,magic-nx30-pro)
wan_mac=$(mtd_get_mac_ascii pdt_data_1 ethaddr)
lan_mac=$(macaddr_add "$wan_mac" 1)
;;
esac
;;
+"mediatek/mt7981_eeprom_mt7976_dbdc.bin")
+ case "$board" in
+ cmcc,rax3000m)
+ case "$(cmdline_get_var root)" in
+ /dev/mmc*)
+ caldata_extract_mmc "factory" 0x0 0x1000
+ ;;
+ esac
+ ;;
+ esac
+ ;;
"mediatek/mt7986_eeprom_mt7976.bin")
case "$board" in
acer,predator-w6)
[ "$PHYNBR" = "0" ] && macaddr_unsetbit $addr 6 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_setbit $addr 6 > /sys${DEVPATH}/macaddress
;;
+ cmcc,rax3000m)
+ case "$(cmdline_get_var root)" in
+ /dev/mmc*)
+ addr=$(mmc_get_mac_binary factory 0xa)
+ ;;
+ *)
+ addr=$(mtd_get_mac_binary factory 0xa)
+ ;;
+ esac
+ [ "$PHYNBR" = "1" ] && echo "$addr" > /sys${DEVPATH}/macaddress
+ ;;
cudy,wr3000-v1)
addr=$(mtd_get_mac_binary bdinfo 0xde00)
# Originally, phy0 is phy1 mac with LA bit set. However, this would conflict
;;
esac
;;
+ cmcc,rax3000m)
+ case "$(cmdline_get_var root)" in
+ /dev/mmc*)
+ CI_KERNPART="production"
+ emmc_do_upgrade "$1"
+ ;;
+ *)
+ CI_KERNPART="fit"
+ nand_do_upgrade "$1"
+ ;;
+ esac
+ ;;
cudy,wr3000-v1)
default_do_upgrade "$1"
;;
[ "$#" -gt 1 ] && return 1
case "$board" in
- bananapi,bpi-r3)
+ bananapi,bpi-r3|\
+ cmcc,rax3000m)
[ "$magic" != "d00dfeed" ] && {
echo "Invalid image type."
return 1
platform_copy_config() {
case "$(board_name)" in
- bananapi,bpi-r3)
+ bananapi,bpi-r3|\
+ cmcc,rax3000m)
case "$(cmdline_get_var root)" in
/dev/mmc*)
emmc_copy_config
endef
TARGET_DEVICES += bananapi_bpi-r3
+define Device/cmcc_rax3000m
+ DEVICE_VENDOR := CMCC
+ DEVICE_MODEL := RAX3000M
+ DEVICE_DTS := mt7981b-cmcc-rax3000m
+ DEVICE_DTS_OVERLAY := mt7981b-cmcc-rax3000m-emmc mt7981b-cmcc-rax3000m-nand
+ DEVICE_DTS_DIR := ../dts
+ DEVICE_DTC_FLAGS := --pad 4096
+ DEVICE_DTS_LOADADDR := 0x43f00000
+ DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware kmod-usb3 \
+ e2fsprogs f2fsck mkf2fs
+ KERNEL_LOADADDR := 0x44000000
+ KERNEL := kernel-bin | gzip
+ KERNEL_INITRAMFS := kernel-bin | lzma | \
+ fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
+ KERNEL_INITRAMFS_SUFFIX := -recovery.itb
+ KERNEL_IN_UBI := 1
+ UBOOTENV_IN_UBI := 1
+ IMAGES := sysupgrade.itb
+ IMAGE_SIZE := $$(shell expr 64 + $$(CONFIG_TARGET_ROOTFS_PARTSIZE))m
+ IMAGE/sysupgrade.itb := append-kernel | \
+ fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | \
+ pad-rootfs | append-metadata
+ ARTIFACTS := \
+ emmc-gpt.bin emmc-preloader.bin emmc-bl31-uboot.fip \
+ nand-preloader.bin nand-bl31-uboot.fip
+ ARTIFACT/emmc-gpt.bin := mt798x-gpt emmc
+ ARTIFACT/emmc-preloader.bin := mt7981-bl2 emmc-ddr4
+ ARTIFACT/emmc-bl31-uboot.fip := mt7981-bl31-uboot cmcc_rax3000m-emmc
+ ARTIFACT/nand-preloader.bin := mt7981-bl2 spim-nand-ddr4
+ ARTIFACT/nand-bl31-uboot.fip := mt7981-bl31-uboot cmcc_rax3000m-nand
+endef
+TARGET_DEVICES += cmcc_rax3000m
+
define Device/cudy_wr3000-v1
DEVICE_VENDOR := Cudy
DEVICE_MODEL := WR3000