MIPS: KVM: Omit FPU handling entry code if possible

The FPU handling code on entry from guest is unnecessary if no FPU is
present, so allow it to be dropped at uasm assembly time.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim KrÄmář <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/arch/mips/kvm/entry.c b/arch/mips/kvm/entry.c
index 9a18b4939b353922456be556d0ac9326dc39e8ef..c0d9f551c1c18f589a5207dae21f928a066a4a53 100644 (file)
--- a/arch/mips/kvm/entry.c
+++ b/arch/mips/kvm/entry.c
@@ -393,18 +393,21 @@ void *kvm_mips_build_exit(void *addr)
        UASM_i_LW(&p, K0, uasm_rel_lo((long)&ebase), K0);
        uasm_i_mtc0(&p, K0, C0_EBASE);
 
-       /*
-        * If FPU is enabled, save FCR31 and clear it so that later ctc1's don't
-        * trigger FPE for pending exceptions.
-        */
-       uasm_i_lui(&p, AT, ST0_CU1 >> 16);
-       uasm_i_and(&p, V1, V0, AT);
-       uasm_il_beqz(&p, &r, V1, label_fpu_1);
-        uasm_i_nop(&p);
-       uasm_i_cfc1(&p, T0, 31);
-       uasm_i_sw(&p, T0, offsetof(struct kvm_vcpu_arch, fpu.fcr31), K1);
-       uasm_i_ctc1(&p, ZERO, 31);
-       uasm_l_fpu_1(&l, p);
+       if (raw_cpu_has_fpu) {
+               /*
+                * If FPU is enabled, save FCR31 and clear it so that later
+                * ctc1's don't trigger FPE for pending exceptions.
+                */
+               uasm_i_lui(&p, AT, ST0_CU1 >> 16);
+               uasm_i_and(&p, V1, V0, AT);
+               uasm_il_beqz(&p, &r, V1, label_fpu_1);
+                uasm_i_nop(&p);
+               uasm_i_cfc1(&p, T0, 31);
+               uasm_i_sw(&p, T0, offsetof(struct kvm_vcpu_arch, fpu.fcr31),
+                         K1);
+               uasm_i_ctc1(&p, ZERO, 31);
+               uasm_l_fpu_1(&l, p);
+       }
 
 #ifdef CONFIG_CPU_HAS_MSA
        /*