Tegra: handlers for common and SoC-specific SiP calls
authorVarun Wadekar <vwadekar@nvidia.com>
Thu, 10 Dec 2015 02:18:53 +0000 (18:18 -0800)
committerVarun Wadekar <vwadekar@nvidia.com>
Thu, 23 Feb 2017 18:42:57 +0000 (10:42 -0800)
This patch implements a handler for common SiP calls. A weak
implementation for the SoC-specific handler has been provided
which can be overridden by SoCs to implement any custom SiP
calls.

Change-Id: I45122892a84ea35d7b44be0f35dc15f6bb95193e
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
plat/nvidia/tegra/common/tegra_common.mk
plat/nvidia/tegra/common/tegra_sip_calls.c [new file with mode: 0644]
plat/nvidia/tegra/soc/t132/plat_sip_calls.c
plat/nvidia/tegra/soc/t210/plat_sip_calls.c [deleted file]
plat/nvidia/tegra/soc/t210/platform_t210.mk

index 82da7fd046a22c917f83f59a81dd6cfd12fee5f3..c9e92557c89e946c77a893186222da4e77159c30 100644 (file)
@@ -59,4 +59,5 @@ BL31_SOURCES          +=      drivers/arm/gic/gic_v2.c                        \
                                ${COMMON_DIR}/tegra_delay_timer.c               \
                                ${COMMON_DIR}/tegra_gic.c                       \
                                ${COMMON_DIR}/tegra_pm.c                        \
+                               ${COMMON_DIR}/tegra_sip_calls.c                 \
                                ${COMMON_DIR}/tegra_topology.c
diff --git a/plat/nvidia/tegra/common/tegra_sip_calls.c b/plat/nvidia/tegra/common/tegra_sip_calls.c
new file mode 100644 (file)
index 0000000..3bcd441
--- /dev/null
@@ -0,0 +1,134 @@
+/*
+ * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <arch.h>
+#include <arch_helpers.h>
+#include <assert.h>
+#include <bl_common.h>
+#include <debug.h>
+#include <errno.h>
+#include <memctrl.h>
+#include <runtime_svc.h>
+#include <tegra_private.h>
+
+/*******************************************************************************
+ * Common Tegra SiP SMCs
+ ******************************************************************************/
+#define TEGRA_SIP_NEW_VIDEOMEM_REGION          0x82000003
+
+/*******************************************************************************
+ * SoC specific SiP handler
+ ******************************************************************************/
+#pragma weak plat_sip_handler
+int plat_sip_handler(uint32_t smc_fid,
+                    uint64_t x1,
+                    uint64_t x2,
+                    uint64_t x3,
+                    uint64_t x4,
+                    void *cookie,
+                    void *handle,
+                    uint64_t flags)
+{
+       return -ENOTSUP;
+}
+
+/*******************************************************************************
+ * This function is responsible for handling all SiP calls from the NS world
+ ******************************************************************************/
+uint64_t tegra_sip_handler(uint32_t smc_fid,
+                          uint64_t x1,
+                          uint64_t x2,
+                          uint64_t x3,
+                          uint64_t x4,
+                          void *cookie,
+                          void *handle,
+                          uint64_t flags)
+{
+       uint32_t ns;
+       int err;
+
+       /* Determine which security state this SMC originated from */
+       ns = is_caller_non_secure(flags);
+       if (!ns)
+               SMC_RET1(handle, SMC_UNK);
+
+       /* Check if this is a SoC specific SiP */
+       err = plat_sip_handler(smc_fid, x1, x2, x3, x4, cookie, handle, flags);
+       if (err == 0)
+               SMC_RET1(handle, err);
+
+       switch (smc_fid) {
+
+       case TEGRA_SIP_NEW_VIDEOMEM_REGION:
+
+               /* clean up the high bits */
+               x1 = (uint32_t)x1;
+               x2 = (uint32_t)x2;
+
+               /*
+                * Check if Video Memory overlaps TZDRAM (contains bl31/bl32)
+                * or falls outside of the valid DRAM range
+                */
+               err = bl31_check_ns_address(x1, x2);
+               if (err)
+                       SMC_RET1(handle, err);
+
+               /*
+                * Check if Video Memory is aligned to 1MB.
+                */
+               if ((x1 & 0xFFFFF) || (x2 & 0xFFFFF)) {
+                       ERROR("Unaligned Video Memory base address!\n");
+                       SMC_RET1(handle, -ENOTSUP);
+               }
+
+               /* new video memory carveout settings */
+               tegra_memctrl_videomem_setup(x1, x2);
+
+               SMC_RET1(handle, 0);
+               break;
+
+       default:
+               ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
+               break;
+       }
+
+       SMC_RET1(handle, SMC_UNK);
+}
+
+/* Define a runtime service descriptor for fast SMC calls */
+DECLARE_RT_SVC(
+       tegra_sip_fast,
+
+       OEN_SIP_START,
+       OEN_SIP_END,
+       SMC_TYPE_FAST,
+       NULL,
+       tegra_sip_handler
+);
index 450e1dd3b9f10bed12bbb6eb476a49d7a6f1c60d..6c89944e9fa94661b8a33ae8dded8da9c6cac388 100644 (file)
@@ -35,8 +35,6 @@
 #include <context_mgmt.h>
 #include <debug.h>
 #include <errno.h>
-#include <memctrl.h>
-#include <runtime_svc.h>
 #include <tegra_private.h>
 
 #define NS_SWITCH_AARCH32      1
@@ -45,7 +43,6 @@
 /*******************************************************************************
  * Tegra132 SiP SMCs
  ******************************************************************************/
-#define TEGRA_SIP_NEW_VIDEOMEM_REGION          0x82000003
 #define TEGRA_SIP_AARCH_SWITCH                 0x82000004
 
 /*******************************************************************************
 #define SPSR64         SPSR_64(MODE_EL2, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS)
 
 /*******************************************************************************
- * This function is responsible for handling all SiP calls from the NS world
+ * This function is responsible for handling all T132 SiP calls
  ******************************************************************************/
-uint64_t tegra132_sip_handler(uint32_t smc_fid,
-                          uint64_t x1,
-                          uint64_t x2,
-                          uint64_t x3,
-                          uint64_t x4,
-                          void *cookie,
-                          void *handle,
-                          uint64_t flags)
+int plat_sip_handler(uint32_t smc_fid,
+                    uint64_t x1,
+                    uint64_t x2,
+                    uint64_t x3,
+                    uint64_t x4,
+                    void *cookie,
+                    void *handle,
+                    uint64_t flags)
 {
-       uint32_t ns;
-       int err;
-
-       /* Determine which security state this SMC originated from */
-       ns = is_caller_non_secure(flags);
-       if (!ns)
-               SMC_RET1(handle, SMC_UNK);
-
        switch (smc_fid) {
 
-       case TEGRA_SIP_NEW_VIDEOMEM_REGION:
-
-               /* clean up the high bits */
-               x1 = (uint32_t)x1;
-               x2 = (uint32_t)x2;
-
-               /*
-                * Check if Video Memory overlaps TZDRAM (contains bl31/bl32)
-                * or falls outside of the valid DRAM range
-                */
-               err = bl31_check_ns_address(x1, x2);
-               if (err)
-                       SMC_RET1(handle, err);
-
-               /*
-                * Check if Video Memory is aligned to 1MB.
-                */
-               if ((x1 & 0xFFFFF) || (x2 & 0xFFFFF)) {
-                       ERROR("Unaligned Video Memory base address!\n");
-                       SMC_RET1(handle, -ENOTSUP);
-               }
-
-               /* new video memory carveout settings */
-               tegra_memctrl_videomem_setup(x1, x2);
-
-               SMC_RET1(handle, 0);
-               break;
-
        case TEGRA_SIP_AARCH_SWITCH:
 
                /* clean up the high bits */
@@ -113,7 +74,7 @@ uint64_t tegra132_sip_handler(uint32_t smc_fid,
 
                if (!x1 || x2 > NS_SWITCH_AARCH32) {
                        ERROR("%s: invalid parameters\n", __func__);
-                       SMC_RET1(handle, SMC_UNK);
+                       return -EINVAL;
                }
 
                /* x1 = ns entry point */
@@ -125,24 +86,12 @@ uint64_t tegra132_sip_handler(uint32_t smc_fid,
 
                INFO("CPU switched to AARCH%s mode\n",
                        (x2 == NS_SWITCH_AARCH32) ? "32" : "64");
-               SMC_RET1(handle, 0);
-               break;
+               return 0;
 
        default:
                ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
                break;
        }
 
-       SMC_RET1(handle, SMC_UNK);
+       return -ENOTSUP;
 }
-
-/* Define a runtime service descriptor for fast SMC calls */
-DECLARE_RT_SVC(
-       tegra132_sip_fast,
-
-       OEN_SIP_START,
-       OEN_SIP_END,
-       SMC_TYPE_FAST,
-       NULL,
-       tegra132_sip_handler
-);
diff --git a/plat/nvidia/tegra/soc/t210/plat_sip_calls.c b/plat/nvidia/tegra/soc/t210/plat_sip_calls.c
deleted file mode 100644 (file)
index 7d9838a..0000000
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <arch.h>
-#include <arch_helpers.h>
-#include <assert.h>
-#include <bl_common.h>
-#include <context_mgmt.h>
-#include <debug.h>
-#include <errno.h>
-#include <memctrl.h>
-#include <runtime_svc.h>
-#include <tegra_private.h>
-
-/*******************************************************************************
- * Tegra210 SiP SMCs
- ******************************************************************************/
-#define TEGRA_SIP_NEW_VIDEOMEM_REGION          0x82000003
-
-/*******************************************************************************
- * This function is responsible for handling all SiP calls from the NS world
- ******************************************************************************/
-uint64_t tegra210_sip_handler(uint32_t smc_fid,
-                          uint64_t x1,
-                          uint64_t x2,
-                          uint64_t x3,
-                          uint64_t x4,
-                          void *cookie,
-                          void *handle,
-                          uint64_t flags)
-{
-       uint32_t ns;
-       int err;
-
-       /* Determine which security state this SMC originated from */
-       ns = is_caller_non_secure(flags);
-       if (!ns)
-               SMC_RET1(handle, SMC_UNK);
-
-       switch (smc_fid) {
-
-       case TEGRA_SIP_NEW_VIDEOMEM_REGION:
-
-               /* clean up the high bits */
-               x1 = (uint32_t)x1;
-               x2 = (uint32_t)x2;
-
-               /*
-                * Check if Video Memory overlaps TZDRAM (contains bl31/bl32)
-                * or falls outside of the valid DRAM range
-                */
-               err = bl31_check_ns_address(x1, x2);
-               if (err)
-                       SMC_RET1(handle, err);
-
-               /*
-                * Check if Video Memory is aligned to 1MB.
-                */
-               if ((x1 & 0xFFFFF) || (x2 & 0xFFFFF)) {
-                       ERROR("Unaligned Video Memory base address!\n");
-                       SMC_RET1(handle, -ENOTSUP);
-               }
-
-               /* new video memory carveout settings */
-               tegra_memctrl_videomem_setup(x1, x2);
-
-               SMC_RET1(handle, 0);
-               break;
-
-       default:
-               ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
-               break;
-       }
-
-       SMC_RET1(handle, SMC_UNK);
-}
-
-/* Define a runtime service descriptor for fast SMC calls */
-DECLARE_RT_SVC(
-       tegra210_sip_fast,
-
-       OEN_SIP_START,
-       OEN_SIP_END,
-       SMC_TYPE_FAST,
-       NULL,
-       tegra210_sip_handler
-);
index d83c54db0d33b13cfe9fc51efcc6093303e2d7ba..2c908f9da210968442273dbe9066c287de8c4483 100644 (file)
@@ -51,7 +51,6 @@ BL31_SOURCES          +=      lib/cpus/aarch64/cortex_a53.S           \
                                ${COMMON_DIR}/drivers/flowctrl/flowctrl.c       \
                                ${COMMON_DIR}/drivers/memctrl/memctrl_v1.c      \
                                ${SOC_DIR}/plat_psci_handlers.c         \
-                               ${SOC_DIR}/plat_sip_calls.c             \
                                ${SOC_DIR}/plat_setup.c                 \
                                ${SOC_DIR}/plat_secondary.c