return !old_crtc_state->ips_enabled;
}
-static bool needs_nv12_wa(struct drm_i915_private *dev_priv,
- const struct intel_crtc_state *crtc_state)
+static bool needs_nv12_wa(const struct intel_crtc_state *crtc_state)
{
+ struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
+
if (!crtc_state->nv12_planes)
return false;
return false;
}
-static bool needs_scalerclk_wa(struct drm_i915_private *dev_priv,
- const struct intel_crtc_state *crtc_state)
+static bool needs_scalerclk_wa(const struct intel_crtc_state *crtc_state)
{
+ struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
+
/* Wa_2006604312:icl */
if (crtc_state->scaler_state.scaler_users > 0 && IS_ICELAKE(dev_priv))
return true;
intel_post_enable_primary(&crtc->base, pipe_config);
}
- if (needs_nv12_wa(dev_priv, old_crtc_state) &&
- !needs_nv12_wa(dev_priv, pipe_config))
+ if (needs_nv12_wa(old_crtc_state) &&
+ !needs_nv12_wa(pipe_config))
skl_wa_827(dev_priv, crtc->pipe, false);
- if (needs_scalerclk_wa(dev_priv, old_crtc_state) &&
- !needs_scalerclk_wa(dev_priv, pipe_config))
+ if (needs_scalerclk_wa(old_crtc_state) &&
+ !needs_scalerclk_wa(pipe_config))
icl_wa_scalerclkgating(dev_priv, crtc->pipe, false);
}
}
/* Display WA 827 */
- if (!needs_nv12_wa(dev_priv, old_crtc_state) &&
- needs_nv12_wa(dev_priv, pipe_config))
+ if (!needs_nv12_wa(old_crtc_state) &&
+ needs_nv12_wa(pipe_config))
skl_wa_827(dev_priv, crtc->pipe, true);
/* Wa_2006604312:icl */
- if (!needs_scalerclk_wa(dev_priv, old_crtc_state) &&
- needs_scalerclk_wa(dev_priv, pipe_config))
+ if (!needs_scalerclk_wa(old_crtc_state) &&
+ needs_scalerclk_wa(pipe_config))
icl_wa_scalerclkgating(dev_priv, crtc->pipe, true);
/*