drm/amdgpu: Add amdgpu_gfx_off_ctrl function

v2:
   1. drop the special handling for the hw IP
      suggested by hawking and Christian.
   2. refine the variable name suggested by Flora.

This funciton as the entry of gfx off feature.
we arbitrat gfx off feature enable/disable in this
function.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 447c4c7a36d686b0e2fb93722611066f8e93db4e..47fbe8f540361d82b873ffa98666c0cafca76ad9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -950,6 +950,10 @@ struct amdgpu_gfx {
        /* NGG */
        struct amdgpu_ngg               ngg;
 
+       /* gfx off */
+       bool                            gfx_off_state; /* true: enabled, false: disabled */
+       struct mutex                    gfx_off_mutex;
+       uint32_t                        gfx_off_req_count; /* default 1, enable gfx off: dec 1, disable gfx off: add 1 */
        /* pipe reservation */
        struct mutex                    pipe_reserve_mutex;
        DECLARE_BITMAP                  (pipe_reserve_bitmap, AMDGPU_MAX_COMPUTE_QUEUES);
@@ -1774,6 +1778,7 @@ void amdgpu_device_program_register_sequence(struct amdgpu_device *adev,
                                             const u32 array_size);
 
 bool amdgpu_device_is_px(struct drm_device *dev);
+void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable);
 /* atpx handler */
 #if defined(CONFIG_VGA_SWITCHEROO)
 void amdgpu_register_atpx_handler(void);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 8ab5ccbc14ace34f6618452b01432bafd55cb5a3..2068b7fe7523c8c51b942de4ce49f56faa8bc0e9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2367,6 +2367,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
        mutex_init(&adev->gfx.gpu_clock_mutex);
        mutex_init(&adev->srbm_mutex);
        mutex_init(&adev->gfx.pipe_reserve_mutex);
+       mutex_init(&adev->gfx.gfx_off_mutex);
        mutex_init(&adev->grbm_idx_mutex);
        mutex_init(&adev->mn_lock);
        mutex_init(&adev->virt.vf_errors.lock);
@@ -2394,6 +2395,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
        INIT_DELAYED_WORK(&adev->late_init_work,
                          amdgpu_device_ip_late_init_func_handler);
 
+       adev->gfx.gfx_off_req_count = 1;
        adev->pm.ac_power = power_supply_is_system_supplied() > 0 ? true : false;
 
        /* Registers mapping */

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index 239bf2a4b3c68be7bfd09510a7196e1967cd8326..1cdb26471a0331ae9e4db1e69b1f6e74df8cda25 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -340,3 +340,39 @@ void amdgpu_gfx_compute_mqd_sw_fini(struct amdgpu_device *adev)
                              &ring->mqd_gpu_addr,
                              &ring->mqd_ptr);
 }
+
+/* amdgpu_gfx_off_ctrl - Handle gfx off feature enable/disable
+ *
+ * @adev: amdgpu_device pointer
+ * @bool enable true: enable gfx off feature, false: disable gfx off feature
+ *
+ * 1. gfx off feature will be enabled by gfx ip after gfx cg gp enabled.
+ * 2. other client can send request to disable gfx off feature, the request should be honored.
+ * 3. other client can cancel their request of disable gfx off feature
+ * 4. other client should not send request to enable gfx off feature before disable gfx off feature.
+ */
+
+void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable)
+{
+       if (!(adev->powerplay.pp_feature & PP_GFXOFF_MASK))
+               return;
+
+       if (!adev->powerplay.pp_funcs->set_powergating_by_smu)
+               return;
+
+       mutex_lock(&adev->gfx.gfx_off_mutex);
+
+       if (!enable)
+               adev->gfx.gfx_off_req_count++;
+       else if (adev->gfx.gfx_off_req_count > 0)
+               adev->gfx.gfx_off_req_count--;
+
+       if (enable && !adev->gfx.gfx_off_state && !adev->gfx.gfx_off_req_count) {
+               if (!amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, true))
+                       adev->gfx.gfx_off_state = true;
+       } else if (!enable && adev->gfx.gfx_off_state) {
+               if (!amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, false))
+                       adev->gfx.gfx_off_state = false;
+       }
+       mutex_unlock(&adev->gfx.gfx_off_mutex);
+}