drm/amdgpu/sdma5: fix mask value of POLL_REGMEM packet for pipe sync
authorXiaojie Yuan <xiaojie.yuan@amd.com>
Wed, 9 Oct 2019 17:01:23 +0000 (01:01 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Sat, 12 Oct 2019 02:32:06 +0000 (21:32 -0500)
sdma will hang once sequence number to be polled reaches 0x1000_0000

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

index fa2f70ce2e2b49bfa5a4c1d116b10a78ddeedb79..f6e81680dd7e8edd03cc2ada50008db924d93692 100644 (file)
@@ -1129,7 +1129,7 @@ static void sdma_v5_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)
        amdgpu_ring_write(ring, addr & 0xfffffffc);
        amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);
        amdgpu_ring_write(ring, seq); /* reference */
-       amdgpu_ring_write(ring, 0xfffffff); /* mask */
+       amdgpu_ring_write(ring, 0xffffffff); /* mask */
        amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |
                          SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(4)); /* retry count, poll interval */
 }