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Sibyte fixes
author
Andrew Isaacson
<adi@broadcom.com>
Thu, 20 Oct 2005 06:54:43 +0000
(23:54 -0700)
committer
Ralf Baechle
<ralf@linux-mips.org>
Sat, 29 Oct 2005 18:32:45 +0000
(19:32 +0100)
Fix typo in cpu_probe_sibyte.
Signed-Off-By: Andy Isaacson <adi@broadcom.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/cpu-probe.c
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diff --git
a/arch/mips/kernel/cpu-probe.c
b/arch/mips/kernel/cpu-probe.c
index 72c580d94e2448b6f2a2e6a434c4cef6b90f3395..f7a841573b84b4fe04f335ee1dc81795e96805e2 100644
(file)
--- a/
arch/mips/kernel/cpu-probe.c
+++ b/
arch/mips/kernel/cpu-probe.c
@@
-612,7
+612,7
@@
static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
* cache code which eventually will be folded into c-r4k.c. Until
* then we pretend it's got it's own cache architecture.
*/
- c->options &= MIPS_CPU_4K_CACHE;
+ c->options &=
~
MIPS_CPU_4K_CACHE;
c->options |= MIPS_CPU_SB1_CACHE;
switch (c->processor_id & 0xff00) {