--- /dev/null
+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+@@ -23,11 +23,17 @@
+ cpu_opp_table: opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+- opp-300000000 {
+- opp-hz = /bits/ 64 <300000000>;
+- opp-microvolt = <950000>;
+- };
+-
++ /* Due to the bug described at the link below, remove the 300 MHz clock to avoid a low
++ * voltage condition that can cause a hang when rebooting the RT3200/E8450.
++ *
++ * https://forum.openwrt.org/t/belkin-rt3200-linksys-e8450-wifi-ax-discussion/94302/1490
++ *
++ * opp-300000000 {
++ * opp-hz = /bits/ 64 <300000000>;
++ * opp-microvolt = <950000>;
++ * };
++ *
++ */
+ opp-437500000 {
+ opp-hz = /bits/ 64 <437500000>;
+ opp-microvolt = <1000000>;