drm/amdgpu: Move out power up/down sdma out of smu
authorRex Zhu <Rex.Zhu@amd.com>
Tue, 25 Sep 2018 11:53:30 +0000 (19:53 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 9 Oct 2018 22:00:38 +0000 (17:00 -0500)
smu only expose interface to other ip blocks.
in order to reduce dependence between smu and other ip blocks

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c

index 12e577c14d1d0a157710b40669a891946b8c455a..c20d413f277cfd9d84001a162997f252cb0369c2 100644 (file)
@@ -1364,6 +1364,9 @@ static int sdma_v4_0_hw_init(void *handle)
        int r;
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
+       if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs->set_powergating_by_smu)
+               amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, false);
+
        sdma_v4_0_init_golden_registers(adev);
 
        r = sdma_v4_0_start(adev);
@@ -1381,6 +1384,9 @@ static int sdma_v4_0_hw_fini(void *handle)
        sdma_v4_0_ctx_switch_enable(adev, false);
        sdma_v4_0_enable(adev, false);
 
+       if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs->set_powergating_by_smu)
+               amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, true);
+
        return 0;
 }
 
index b7a9d0ce59e151d4e708ba57a2a4a65e3a070893..dd18cb710391a1f2caa304f81f487743bc5a2db4 100644 (file)
@@ -1216,6 +1216,7 @@ static const struct pp_hwmgr_func smu10_hwmgr_funcs = {
        .smus_notify_pwe = smu10_smus_notify_pwe,
        .display_clock_voltage_request = smu10_display_clock_voltage_request,
        .powergate_gfx = smu10_gfx_off_control,
+       .powergate_sdma = smu10_powergate_sdma,
 };
 
 int smu10_init_function_pointers(struct pp_hwmgr *hwmgr)
index 6f961dec20887f6cecc7fd82af407d1969bbc3fa..d78d864f7c57566dd2a45d614e24a0af9f048008 100644 (file)
@@ -186,19 +186,6 @@ static int smu10_verify_smc_interface(struct pp_hwmgr *hwmgr)
        return 0;
 }
 
-/* sdma is disabled by default in vbios, need to re-enable in driver */
-static void smu10_smc_enable_sdma(struct pp_hwmgr *hwmgr)
-{
-       smu10_send_msg_to_smc(hwmgr,
-                       PPSMC_MSG_PowerUpSdma);
-}
-
-static void smu10_smc_disable_sdma(struct pp_hwmgr *hwmgr)
-{
-       smu10_send_msg_to_smc(hwmgr,
-                       PPSMC_MSG_PowerDownSdma);
-}
-
 /* vcn is disabled by default in vbios, need to re-enable in driver */
 static void smu10_smc_enable_vcn(struct pp_hwmgr *hwmgr)
 {
@@ -218,7 +205,6 @@ static int smu10_smu_fini(struct pp_hwmgr *hwmgr)
                        (struct smu10_smumgr *)(hwmgr->smu_backend);
 
        if (priv) {
-               smu10_smc_disable_sdma(hwmgr);
                smu10_smc_disable_vcn(hwmgr);
                amdgpu_bo_free_kernel(&priv->smu_tables.entry[SMU10_WMTABLE].handle,
                                        &priv->smu_tables.entry[SMU10_WMTABLE].mc_addr,
@@ -243,7 +229,6 @@ static int smu10_start_smu(struct pp_hwmgr *hwmgr)
 
        if (smu10_verify_smc_interface(hwmgr))
                return -EINVAL;
-       smu10_smc_enable_sdma(hwmgr);
        smu10_smc_enable_vcn(hwmgr);
        return 0;
 }