octeontx2-af: Support for VTAG strip and capture

Added support for PF/VF drivers to configure NIX to
capture and/or strip VLAN tag from ingress packets.

Signed-off-by: Vamsi Attunuru <vamsi.attunuru@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index f8efeaa66dda0de5b17cecd1c0cbec6616db73c2..b60ac9de2235ecb762bf3004b9fce8971f55720a 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -156,7 +156,8 @@ M(NIX_HWCTX_DISABLE,        0x8003, hwctx_disable_req, msg_rsp)             \
 M(NIX_TXSCH_ALLOC,     0x8004, nix_txsch_alloc_req, nix_txsch_alloc_rsp) \
 M(NIX_TXSCH_FREE,      0x8005, nix_txsch_free_req, msg_rsp)            \
 M(NIX_TXSCHQ_CFG,      0x8006, nix_txschq_config, msg_rsp)             \
-M(NIX_STATS_RST,       0x8007, msg_req, msg_rsp)
+M(NIX_STATS_RST,       0x8007, msg_req, msg_rsp)                       \
+M(NIX_VTAG_CFG,        0x8008, nix_vtag_config, msg_rsp)
 
 /* Messages initiated by AF (range 0xC00 - 0xDFF) */
 #define MBOX_UP_CGX_MESSAGES                                           \
@@ -462,4 +463,36 @@ struct nix_txschq_config {
        u64 regval[MAX_REGS_PER_MBOX_MSG];
 };
 
+struct nix_vtag_config {
+       struct mbox_msghdr hdr;
+       u8 vtag_size;
+       /* cfg_type is '0' for tx vlan cfg
+        * cfg_type is '1' for rx vlan cfg
+        */
+       u8 cfg_type;
+       union {
+               /* valid when cfg_type is '0' */
+               struct {
+                       /* tx vlan0 tag(C-VLAN) */
+                       u64 vlan0;
+                       /* tx vlan1 tag(S-VLAN) */
+                       u64 vlan1;
+                       /* insert tx vlan tag */
+                       u8 insert_vlan :1;
+                       /* insert tx double vlan tag */
+                       u8 double_vlan :1;
+               } tx;
+
+               /* valid when cfg_type is '1' */
+               struct {
+                       /* rx vtag type index */
+                       u8 vtag_type;
+                       /* rx vtag strip */
+                       u8 strip_vtag :1;
+                       /* rx vtag capture */
+                       u8 capture_vtag :1;
+               } rx;
+       };
+};
+
 #endif /* MBOX_H */

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index b39400d9179ef88c976fc4fed0af97d1e541affe..1e85e80d28fd4a10ad8951c462d507f2cfb26cca 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -319,6 +319,9 @@ int rvu_mbox_handler_NIX_TXSCHQ_CFG(struct rvu *rvu,
                                    struct msg_rsp *rsp);
 int rvu_mbox_handler_NIX_STATS_RST(struct rvu *rvu, struct msg_req *req,
                                   struct msg_rsp *rsp);
+int rvu_mbox_handler_NIX_VTAG_CFG(struct rvu *rvu,
+                                 struct nix_vtag_config *req,
+                                 struct msg_rsp *rsp);
 
 /* NPC APIs */
 int rvu_npc_init(struct rvu *rvu);

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index 8333283305199154e93e7694f7f815ee899b2b97..7de5417277e6830df8f11d75a72fc057b2326dca 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -1143,6 +1143,65 @@ int rvu_mbox_handler_NIX_TXSCHQ_CFG(struct rvu *rvu,
        return 0;
 }
 
+static int nix_rx_vtag_cfg(struct rvu *rvu, int nixlf, int blkaddr,
+                          struct nix_vtag_config *req)
+{
+       u64 regval = 0;
+
+#define NIX_VTAGTYPE_MAX 0x8ull
+#define NIX_VTAGSIZE_MASK 0x7ull
+#define NIX_VTAGSTRIP_CAP_MASK 0x30ull
+
+       if (req->rx.vtag_type >= NIX_VTAGTYPE_MAX ||
+           req->vtag_size > VTAGSIZE_T8)
+               return -EINVAL;
+
+       regval = rvu_read64(rvu, blkaddr,
+                           NIX_AF_LFX_RX_VTAG_TYPEX(nixlf, req->rx.vtag_type));
+
+       if (req->rx.strip_vtag && req->rx.capture_vtag)
+               regval |= BIT_ULL(4) | BIT_ULL(5);
+       else if (req->rx.strip_vtag)
+               regval |= BIT_ULL(4);
+       else
+               regval &= ~(BIT_ULL(4) | BIT_ULL(5));
+
+       regval &= ~NIX_VTAGSIZE_MASK;
+       regval |= req->vtag_size & NIX_VTAGSIZE_MASK;
+
+       rvu_write64(rvu, blkaddr,
+                   NIX_AF_LFX_RX_VTAG_TYPEX(nixlf, req->rx.vtag_type), regval);
+       return 0;
+}
+
+int rvu_mbox_handler_NIX_VTAG_CFG(struct rvu *rvu,
+                                 struct nix_vtag_config *req,
+                                 struct msg_rsp *rsp)
+{
+       struct rvu_hwinfo *hw = rvu->hw;
+       u16 pcifunc = req->hdr.pcifunc;
+       int blkaddr, nixlf, err;
+
+       blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
+       if (blkaddr < 0)
+               return NIX_AF_ERR_AF_LF_INVALID;
+
+       nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);
+       if (nixlf < 0)
+               return NIX_AF_ERR_AF_LF_INVALID;
+
+       if (req->cfg_type) {
+               err = nix_rx_vtag_cfg(rvu, nixlf, blkaddr, req);
+               if (err)
+                       return NIX_AF_ERR_PARAM;
+       } else {
+               /* TODO: handle tx vtag configuration */
+               return 0;
+       }
+
+       return 0;
+}
+
 static int nix_setup_mce(struct rvu *rvu, int mce, u8 op,
                         u16 pcifunc, int next, bool eol)
 {

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h
index c331b237a26f4353c247a1ba67ec966ff063e4bf..bb2836e18dd00264da2dbaddb3c84cb0334b672a 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h
@@ -879,4 +879,9 @@ struct nix_lso_format {
 #endif
 };
 
+/* NIX VTAG size */
+enum nix_vtag_size {
+       VTAGSIZE_T4   = 0x0,
+       VTAGSIZE_T8   = 0x1,
+};
 #endif /* RVU_STRUCT_H */