Compile and run tested on WAG354Gv1.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
--- /dev/null
+CONFIG_ADM6996_PHY=y
+CONFIG_AR7=y
+CONFIG_AR7_TI=y
+# CONFIG_AR7_TYPE_AC49X is not set
+CONFIG_AR7_TYPE_TI=y
+CONFIG_AR7_WDT=y
+CONFIG_ARCH_BINFMT_ELF_STATE=y
+CONFIG_ARCH_CLOCKSOURCE_DATA=y
+CONFIG_ARCH_DISCARD_MEMBLOCK=y
+CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
+# CONFIG_ARCH_HAS_SG_CHAIN is not set
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
+CONFIG_ARCH_SUPPORTS_UPROBES=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_BOOT_ELF32=y
+CONFIG_CEVT_R4K=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
+CONFIG_CMDLINE_BOOL=y
+# CONFIG_CMDLINE_OVERRIDE is not set
+CONFIG_CPMAC=y
+CONFIG_CPU_GENERIC_DUMP_TLB=y
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_CPU_MIPS32=y
+CONFIG_CPU_MIPS32_R1=y
+CONFIG_CPU_MIPSR1=y
+CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
+CONFIG_CPU_R4K_CACHE_TLB=y
+CONFIG_CPU_R4K_FPU=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_WORKQUEUE=y
+CONFIG_CSRC_R4K=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_ETHERNET_PACKET_MANGLE=y
+CONFIG_FIXED_PHY=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_IO=y
+CONFIG_GENERIC_IRQ_CHIP=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_SCHED_CLOCK=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GPIOLIB=y
+CONFIG_HANDLE_DOMAIN_IRQ=y
+CONFIG_HARDWARE_WATCHPOINTS=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
+# CONFIG_HAVE_ARCH_BITREVERSE is not set
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
+CONFIG_HAVE_CBPF_JIT=y
+CONFIG_HAVE_CC_STACKPROTECTOR=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_HW_RANDOM=y
+CONFIG_HZ_PERIODIC=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IP17XX_PHY=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_MIPS_CPU=y
+CONFIG_IRQ_WORK=y
+CONFIG_KALLSYMS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_MDIO_BOARDINFO=y
+CONFIG_MIPS=y
+CONFIG_MIPS_ASID_BITS=8
+CONFIG_MIPS_ASID_SHIFT=0
+CONFIG_MIPS_CLOCK_VSYSCALL=y
+# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
+CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y
+# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_MIPS_MACHINE is not set
+CONFIG_MODULES_USE_ELF_REL=y
+# CONFIG_MTD_AC49X_PARTS is not set
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MVSWITCH_PHY=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_NO_EXCEPT_FILL=y
+CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
+# CONFIG_NO_IOPORT_MAP is not set
+# CONFIG_OF is not set
+CONFIG_PCI_DRIVERS_LEGACY=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PGTABLE_LEVELS=2
+CONFIG_PHYLIB=y
+# CONFIG_RCU_STALL_COMMON is not set
+# CONFIG_SCHED_INFO is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SERIAL_8250_FSL is not set
+CONFIG_SRCU=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_SWCONFIG=y
+CONFIG_SWPHY=y
+CONFIG_SYSCTL_EXCEPTION_TRACE=y
+CONFIG_SYS_HAS_CPU_MIPS32_R1=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_SYS_SUPPORTS_MIPS16=y
+CONFIG_SYS_SUPPORTS_ZBOOT=y
+CONFIG_SYS_SUPPORTS_ZBOOT_UART16550=y
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_VLYNQ=y
+# CONFIG_VLYNQ_DEBUG is not set
--- /dev/null
+From 443ab715a40881d6c9ba11b027ba154bac904cb0 Mon Sep 17 00:00:00 2001
+From: Oswald Buddenhagen <oswald.buddenhagen@gmx.de>
+Date: Sat, 10 May 2014 23:19:08 +0200
+Subject: [PATCH] MIPS/AR7: ensure that serial ports are properly set up
+
+without UPF_FIXED_TYPE, the data from the PORT_AR7 uart_config entry is
+never copied, resulting in a dead port.
+
+Signed-off-by: Oswald Buddenhagen <oswald.buddenhagen@gmx.de>
+---
+ arch/mips/ar7/platform.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/mips/ar7/platform.c
++++ b/arch/mips/ar7/platform.c
+@@ -576,6 +576,7 @@ static int __init ar7_register_uarts(voi
+ uart_port.type = PORT_AR7;
+ uart_port.uartclk = clk_get_rate(bus_clk) / 2;
+ uart_port.iotype = UPIO_MEM32;
++ uart_port.flags = UPF_FIXED_TYPE;
+ uart_port.regshift = 2;
+
+ uart_port.line = 0;
--- /dev/null
+From ee6c9d41de084b2cefd90e5e0c9f30a35f6d3967 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 29 Oct 2017 15:50:42 +0100
+Subject: [PATCH RFC 3/3] MIPS: AR7: ensure the port type's FCR value is used
+
+Since commit aef9a7bd9b67 ("serial/uart/8250: Add tunable RX interrupt
+trigger I/F of FIFO buffers"), the port's default FCR value isn't used
+in serial8250_do_set_termios anymore, but copied over once in
+serial8250_config_port and then modified as needed.
+
+Unfortunately, serial8250_config_port will never be called if the port
+is shared between kernel and userspace, and the port's flag doesn't have
+UPF_BOOT_AUTOCONF, which would trigger a serial8250_config_port as well.
+
+This causes garbled output from userspace:
+
+[ 5.220000] random: procd urandom read with 49 bits of entropy available
+ers
+ [kee
+
+Fix this by forcing it to be configured on boot, resulting in the
+expected output:
+
+[ 5.250000] random: procd urandom read with 50 bits of entropy available
+Press the [f] key and hit [enter] to enter failsafe mode
+Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level
+
+Fixes: aef9a7bd9b67 ("serial/uart/8250: Add tunable RX interrupt trigger I/F of FIFO buffers")
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+I'm not sure if this is just AR7's issue, or if this points to a general
+issue for UARTs used as kernel console and login console with the "fixed"
+commit.
+
+ arch/mips/ar7/platform.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/mips/ar7/platform.c
++++ b/arch/mips/ar7/platform.c
+@@ -576,7 +576,7 @@ static int __init ar7_register_uarts(voi
+ uart_port.type = PORT_AR7;
+ uart_port.uartclk = clk_get_rate(bus_clk) / 2;
+ uart_port.iotype = UPIO_MEM32;
+- uart_port.flags = UPF_FIXED_TYPE;
++ uart_port.flags = UPF_FIXED_TYPE | UPF_BOOT_AUTOCONF;
+ uart_port.regshift = 2;
+
+ uart_port.line = 0;
--- /dev/null
+From 3a8d54573f9d187779d36d6b45e8e0288b82c31a Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Thu, 26 Oct 2017 23:25:44 +0200
+Subject: [PATCH 1/3] MIPS: AR7: defer registration of GPIO
+
+When called from prom init code, ar7_gpio_init() will fail as it will
+call gpiochip_add() which relies on a working kmalloc() to alloc
+the gpio_desc array and kmalloc is not useable yet at prom init time.
+
+Move ar7_gpio_init() to ar7_register_devices() (a device_initcall)
+where kmalloc works.
+
+Fixes: 14e85c0e69d5 ("gpio: remove gpio_descs global array")
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+Text shamelessy stolen from commit 2ec459f2a77b8.
+
+ arch/mips/ar7/platform.c | 4 ++++
+ arch/mips/ar7/prom.c | 2 --
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/ar7/platform.c
++++ b/arch/mips/ar7/platform.c
+@@ -655,6 +655,10 @@ static int __init ar7_register_devices(v
+ u32 val;
+ int res;
+
++ res = ar7_gpio_init();
++ if (res)
++ pr_warn("unable to register gpios: %d\n", res);
++
+ res = ar7_register_uarts();
+ if (res)
+ pr_err("unable to setup uart(s): %d\n", res);
+--- a/arch/mips/ar7/prom.c
++++ b/arch/mips/ar7/prom.c
+@@ -246,8 +246,6 @@ void __init prom_init(void)
+ ar7_init_cmdline(fw_arg0, (char **)fw_arg1);
+ ar7_init_env((struct env_var *)fw_arg2);
+ console_config();
+-
+- ar7_gpio_init();
+ }
+
+ #define PORT(offset) (KSEG1ADDR(AR7_REGS_UART0 + (offset * 4)))
--- /dev/null
+--- a/arch/mips/include/asm/mach-ar7/spaces.h
++++ b/arch/mips/include/asm/mach-ar7/spaces.h
+@@ -20,6 +20,8 @@
+ #define UNCAC_BASE _AC(0xb4000000, UL) /* 0xa0000000 + PHYS_OFFSET */
+ #define IO_BASE UNCAC_BASE
+
++#define HIGHMEM_START _AC(0x20000000, UL)
++
+ #include <asm/mach-generic/spaces.h>
+
+ #endif /* __ASM_AR7_SPACES_H */
--- /dev/null
+From patchwork Tue Jul 18 10:17:26 2017
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [5/9] MIPS: AR7: allow NULL clock for clk_get_rate
+X-Patchwork-Submitter: Jonas Gorski <jonas.gorski@gmail.com>
+X-Patchwork-Id: 16775
+Message-Id: <20170718101730.2541-6-jonas.gorski@gmail.com>
+To: unlisted-recipients:; (no To-header on input)
+Cc: Ralf Baechle <ralf@linux-mips.org>,
+ Paul Gortmaker <paul.gortmaker@windriver.com>,
+ James Hogan <james.hogan@imgtec.com>,
+ linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
+Date: Tue, 18 Jul 2017 12:17:26 +0200
+From: Jonas Gorski <jonas.gorski@gmail.com>
+List-Id: linux-mips <linux-mips.eddie.linux-mips.org>
+
+Make the behaviour of clk_get_rate consistent with common clk's
+clk_get_rate by accepting NULL clocks as parameter. Some device
+drivers rely on this, and will cause an OOPS otherwise.
+
+Fixes: 780019ddf02f ("MIPS: AR7: Implement clock API")
+Cc: Ralf Baechle <ralf@linux-mips.org>
+Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
+Cc: James Hogan <james.hogan@imgtec.com>
+Cc: linux-mips@linux-mips.org
+Cc: linux-kernel@vger.kernel.org
+Reported-by: Mathias Kresin <dev@kresin.me>
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ arch/mips/ar7/clock.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/arch/mips/ar7/clock.c
++++ b/arch/mips/ar7/clock.c
+@@ -430,6 +430,9 @@ EXPORT_SYMBOL(clk_disable);
+
+ unsigned long clk_get_rate(struct clk *clk)
+ {
++ if (!clk)
++ return 0;
++
+ return clk->rate;
+ }
+ EXPORT_SYMBOL(clk_get_rate);
--- /dev/null
+--- a/drivers/mtd/Makefile
++++ b/drivers/mtd/Makefile
+@@ -12,7 +12,7 @@ obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o
+ obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
+ obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
+ obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
+-obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o
++obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o titanpart.o
+ obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63xxpart.o
+ obj-$(CONFIG_MTD_BCM47XX_PARTS) += bcm47xxpart.o
+ obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o
+--- a/arch/mips/ar7/platform.c
++++ b/arch/mips/ar7/platform.c
+@@ -198,7 +198,7 @@ static struct resource physmap_flash_res
+ .name = "mem",
+ .flags = IORESOURCE_MEM,
+ .start = 0x10000000,
+- .end = 0x107fffff,
++ .end = 0x11ffffff,
+ };
+
+ static const char *ar7_probe_types[] = { "ar7part", NULL };
--- /dev/null
+--- a/drivers/vlynq/vlynq.c
++++ b/drivers/vlynq/vlynq.c
+@@ -119,20 +119,40 @@ static int vlynq_linked(struct vlynq_dev
+ return 0;
+ }
+
++static volatile int vlynq_delay_value_new = 0;
++
++static void vlynq_delay_wait(u32 count)
++{
++ /* Code adopted from original vlynq driver */
++ int i = 0;
++ volatile int *ptr = &vlynq_delay_value_new;
++ *ptr = 0;
++
++ /* We are assuming that the each cycle takes about
++ * 23 assembly instructions. */
++ for(i = 0; i < (count + 23)/23; i++)
++ *ptr = *ptr + 1;
++}
++
+ static void vlynq_reset(struct vlynq_device *dev)
+ {
++ u32 rtm = readl(&dev->local->revision);
++
++ rtm = rtm < 0x00010205 || readl(&dev->local->status) & 0x800 == 0 ?
++ 0 : 0x600000;
++
+ writel(readl(&dev->local->control) | VLYNQ_CTRL_RESET,
+ &dev->local->control);
+
+ /* Wait for the devices to finish resetting */
+- msleep(5);
++ vlynq_delay_wait(0xffffff);
+
+ /* Remove reset bit */
+- writel(readl(&dev->local->control) & ~VLYNQ_CTRL_RESET,
++ writel(readl(&dev->local->control) & ~VLYNQ_CTRL_RESET | rtm,
+ &dev->local->control);
+
+ /* Give some time for the devices to settle */
+- msleep(5);
++ vlynq_delay_wait(0xffffff);
+ }
+
+ static void vlynq_irq_unmask(struct irq_data *d)
+@@ -379,6 +399,61 @@ void vlynq_unregister_driver(struct vlyn
+ }
+ EXPORT_SYMBOL(vlynq_unregister_driver);
+
++enum vlynq_clk_src {
++ vlynq_clk_external,
++ vlynq_clk_local,
++ vlynq_clk_remote,
++ vlynq_clk_invalid,
++};
++
++static int __vlynq_set_clocks(struct vlynq_device *dev,
++ enum vlynq_clk_src clk_dir,
++ int lclk_div, int rclk_div)
++{
++ u32 reg;
++
++ if (clk_dir == vlynq_clk_invalid) {
++ printk(KERN_ERR "%s: attempt to set invalid clocking\n",
++ dev_name(&dev->dev));
++ return -EINVAL;
++ }
++
++ reg = readl(&dev->local->control);
++ if (readl(&dev->local->revision) < 0x00010205) {
++ if (clk_dir & vlynq_clk_local)
++ reg |= VLYNQ_CTRL_CLOCK_INT;
++ else
++ reg &= ~VLYNQ_CTRL_CLOCK_INT;
++ }
++ reg &= ~VLYNQ_CTRL_CLOCK_MASK;
++ reg |= VLYNQ_CTRL_CLOCK_DIV(lclk_div);
++ writel(reg, &dev->local->control);
++
++ if (!vlynq_linked(dev))
++ return -ENODEV;
++
++ printk(KERN_INFO "%s: local VLYNQ protocol rev. is 0x%08x\n",
++ dev_name(&dev->dev), readl(&dev->local->revision));
++ printk(KERN_INFO "%s: remote VLYNQ protocol rev. is 0x%08x\n",
++ dev_name(&dev->dev), readl(&dev->remote->revision));
++
++ reg = readl(&dev->remote->control);
++ if (readl(&dev->remote->revision) < 0x00010205) {
++ if (clk_dir & vlynq_clk_remote)
++ reg |= VLYNQ_CTRL_CLOCK_INT;
++ else
++ reg &= ~VLYNQ_CTRL_CLOCK_INT;
++ }
++ reg &= ~VLYNQ_CTRL_CLOCK_MASK;
++ reg |= VLYNQ_CTRL_CLOCK_DIV(rclk_div);
++ writel(reg, &dev->remote->control);
++
++ if (!vlynq_linked(dev))
++ return -ENODEV;
++
++ return 0;
++}
++
+ /*
+ * A VLYNQ remote device can clock the VLYNQ bus master
+ * using a dedicated clock line. In that case, both the
+@@ -392,29 +467,16 @@ static int __vlynq_try_remote(struct vly
+ int i;
+
+ vlynq_reset(dev);
+- for (i = dev->dev_id ? vlynq_rdiv2 : vlynq_rdiv8; dev->dev_id ?
+- i <= vlynq_rdiv8 : i >= vlynq_rdiv2;
+- dev->dev_id ? i++ : i--) {
++ for (i = 0; i <= 7; i++) {
+
+ if (!vlynq_linked(dev))
+ break;
+
+- writel((readl(&dev->remote->control) &
+- ~VLYNQ_CTRL_CLOCK_MASK) |
+- VLYNQ_CTRL_CLOCK_INT |
+- VLYNQ_CTRL_CLOCK_DIV(i - vlynq_rdiv1),
+- &dev->remote->control);
+- writel((readl(&dev->local->control)
+- & ~(VLYNQ_CTRL_CLOCK_INT |
+- VLYNQ_CTRL_CLOCK_MASK)) |
+- VLYNQ_CTRL_CLOCK_DIV(i - vlynq_rdiv1),
+- &dev->local->control);
+-
+- if (vlynq_linked(dev)) {
+- printk(KERN_DEBUG
+- "%s: using remote clock divisor %d\n",
+- dev_name(&dev->dev), i - vlynq_rdiv1 + 1);
+- dev->divisor = i;
++ if (!__vlynq_set_clocks(dev, vlynq_clk_remote, i, i)) {
++ printk(KERN_INFO
++ "%s: using remote clock divisor %d\n",
++ dev_name(&dev->dev), i + 1);
++ dev->divisor = i + vlynq_rdiv1;
+ return 0;
+ } else {
+ vlynq_reset(dev);
+@@ -433,25 +495,17 @@ static int __vlynq_try_remote(struct vly
+ */
+ static int __vlynq_try_local(struct vlynq_device *dev)
+ {
+- int i;
++ int i, dir = !dev->dev_id;
+
+ vlynq_reset(dev);
+
+- for (i = dev->dev_id ? vlynq_ldiv2 : vlynq_ldiv8; dev->dev_id ?
+- i <= vlynq_ldiv8 : i >= vlynq_ldiv2;
+- dev->dev_id ? i++ : i--) {
+-
+- writel((readl(&dev->local->control) &
+- ~VLYNQ_CTRL_CLOCK_MASK) |
+- VLYNQ_CTRL_CLOCK_INT |
+- VLYNQ_CTRL_CLOCK_DIV(i - vlynq_ldiv1),
+- &dev->local->control);
+-
+- if (vlynq_linked(dev)) {
+- printk(KERN_DEBUG
+- "%s: using local clock divisor %d\n",
+- dev_name(&dev->dev), i - vlynq_ldiv1 + 1);
+- dev->divisor = i;
++ for (i = dir ? 7 : 0; dir ? i >= 0 : i <= 7; dir ? i-- : i++) {
++
++ if (!__vlynq_set_clocks(dev, vlynq_clk_local, i, 0)) {
++ printk(KERN_INFO
++ "%s: using local clock divisor %d\n",
++ dev_name(&dev->dev), i + 1);
++ dev->divisor = i + vlynq_ldiv1;
+ return 0;
+ } else {
+ vlynq_reset(dev);
+@@ -473,18 +527,10 @@ static int __vlynq_try_external(struct v
+ if (!vlynq_linked(dev))
+ return -ENODEV;
+
+- writel((readl(&dev->remote->control) &
+- ~VLYNQ_CTRL_CLOCK_INT),
+- &dev->remote->control);
+-
+- writel((readl(&dev->local->control) &
+- ~VLYNQ_CTRL_CLOCK_INT),
+- &dev->local->control);
+-
+- if (vlynq_linked(dev)) {
+- printk(KERN_DEBUG "%s: using external clock\n",
+- dev_name(&dev->dev));
+- dev->divisor = vlynq_div_external;
++ if (!__vlynq_set_clocks(dev, vlynq_clk_external, 0, 0)) {
++ printk(KERN_INFO "%s: using external clock\n",
++ dev_name(&dev->dev));
++ dev->divisor = vlynq_div_external;
+ return 0;
+ }
+
+@@ -501,24 +547,16 @@ static int __vlynq_enable_device(struct
+ return result;
+
+ switch (dev->divisor) {
+- case vlynq_div_external:
+ case vlynq_div_auto:
+ /* When the device is brought from reset it should have clock
+ * generation negotiated by hardware.
+ * Check which device is generating clocks and perform setup
+ * accordingly */
+- if (vlynq_linked(dev) && readl(&dev->remote->control) &
+- VLYNQ_CTRL_CLOCK_INT) {
+- if (!__vlynq_try_remote(dev) ||
+- !__vlynq_try_local(dev) ||
+- !__vlynq_try_external(dev))
+- return 0;
+- } else {
+- if (!__vlynq_try_external(dev) ||
+- !__vlynq_try_local(dev) ||
+- !__vlynq_try_remote(dev))
+- return 0;
+- }
++ if (!__vlynq_try_remote(dev) || !__vlynq_try_local(dev))
++ return 0;
++ case vlynq_div_external:
++ if (!__vlynq_try_external(dev))
++ return 0;
+ break;
+ case vlynq_ldiv1:
+ case vlynq_ldiv2:
+@@ -528,15 +566,12 @@ static int __vlynq_enable_device(struct
+ case vlynq_ldiv6:
+ case vlynq_ldiv7:
+ case vlynq_ldiv8:
+- writel(VLYNQ_CTRL_CLOCK_INT |
+- VLYNQ_CTRL_CLOCK_DIV(dev->divisor -
+- vlynq_ldiv1), &dev->local->control);
+- writel(0, &dev->remote->control);
+- if (vlynq_linked(dev)) {
+- printk(KERN_DEBUG
+- "%s: using local clock divisor %d\n",
+- dev_name(&dev->dev),
+- dev->divisor - vlynq_ldiv1 + 1);
++ if (!__vlynq_set_clocks(dev, vlynq_clk_local, dev->divisor -
++ vlynq_ldiv1, 0)) {
++ printk(KERN_INFO
++ "%s: using local clock divisor %d\n",
++ dev_name(&dev->dev),
++ dev->divisor - vlynq_ldiv1 + 1);
+ return 0;
+ }
+ break;
+@@ -548,20 +583,17 @@ static int __vlynq_enable_device(struct
+ case vlynq_rdiv6:
+ case vlynq_rdiv7:
+ case vlynq_rdiv8:
+- writel(0, &dev->local->control);
+- writel(VLYNQ_CTRL_CLOCK_INT |
+- VLYNQ_CTRL_CLOCK_DIV(dev->divisor -
+- vlynq_rdiv1), &dev->remote->control);
+- if (vlynq_linked(dev)) {
+- printk(KERN_DEBUG
+- "%s: using remote clock divisor %d\n",
+- dev_name(&dev->dev),
+- dev->divisor - vlynq_rdiv1 + 1);
++ if (!__vlynq_set_clocks(dev, vlynq_clk_remote, 0,
++ dev->divisor - vlynq_rdiv1)) {
++ printk(KERN_INFO
++ "%s: using remote clock divisor %d\n",
++ dev_name(&dev->dev),
++ dev->divisor - vlynq_rdiv1 + 1);
+ return 0;
+ }
+ break;
+ }
+-
++ vlynq_reset(dev);
+ ops->off(dev);
+ return -ENODEV;
+ }
+@@ -732,14 +764,14 @@ static int vlynq_probe(struct platform_d
+ platform_set_drvdata(pdev, dev);
+
+ printk(KERN_INFO "%s: regs 0x%p, irq %d, mem 0x%p\n",
+- dev_name(&dev->dev), (void *)dev->regs_start, dev->irq,
+- (void *)dev->mem_start);
++ dev_name(&dev->dev), (void *)dev->regs_start,
++ dev->irq, (void *)dev->mem_start);
+
+ dev->dev_id = 0;
+ dev->divisor = vlynq_div_auto;
+- result = __vlynq_enable_device(dev);
+- if (result == 0) {
++ if (!__vlynq_enable_device(dev)) {
+ dev->dev_id = readl(&dev->remote->chip);
++ vlynq_reset(dev);
+ ((struct plat_vlynq_ops *)(dev->dev.platform_data))->off(dev);
+ }
+ if (dev->dev_id)
--- /dev/null
+--- a/arch/mips/ar7/memory.c
++++ b/arch/mips/ar7/memory.c
+@@ -66,5 +66,11 @@ void __init prom_meminit(void)
+
+ void __init prom_free_prom_memory(void)
+ {
+- /* Nothing to free */
++ /* adapted from arch/mips/txx9/generic/setup.c */
++ unsigned long saddr = PHYS_OFFSET + PAGE_SIZE;
++ unsigned long eaddr = __pa_symbol(&_text);
++
++ /* free memory between prom-record and kernel _text base */
++ if (saddr < eaddr)
++ free_init_pages("prom memory", saddr, eaddr);
+ }
--- /dev/null
+--- a/arch/mips/ar7/Platform
++++ b/arch/mips/ar7/Platform
+@@ -3,4 +3,9 @@
+ #
+ platform-$(CONFIG_AR7) += ar7/
+ cflags-$(CONFIG_AR7) += -I$(srctree)/arch/mips/include/asm/mach-ar7
+-load-$(CONFIG_AR7) += 0xffffffff94100000
++load-$(CONFIG_AR7_TI) += 0xffffffff94100000
++
++#
++# AudioCodes AC49x
++#
++load-$(CONFIG_AR7_AC49X) += 0xffffffff945ca000
+--- a/arch/mips/ar7/setup.c
++++ b/arch/mips/ar7/setup.c
+@@ -68,6 +68,10 @@ const char *get_system_type(void)
+ return "TI AR7 (TNETV1056)";
+ case TITAN_CHIP_1060:
+ return "TI AR7 (TNETV1060)";
++ case TITAN_CHIP_AC495:
++ return "AudioCodes AC495";
++ case TITAN_CHIP_AC496:
++ return "AudioCodes AC496";
+ }
+ default:
+ return "TI AR7 (unknown)";
+--- a/arch/mips/include/asm/mach-ar7/ar7.h
++++ b/arch/mips/include/asm/mach-ar7/ar7.h
+@@ -92,6 +92,8 @@
+ #define TITAN_CHIP_1055 0x0e
+ #define TITAN_CHIP_1056 0x0d
+ #define TITAN_CHIP_1060 0x07
++#define TITAN_CHIP_AC495 0x00
++#define TITAN_CHIP_AC496 0x02
+
+ /* Interrupts */
+ #define AR7_IRQ_UART0 15
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -160,7 +160,7 @@ config AR7
+ select HAVE_CLK
+ help
+ Support for the Texas Instruments AR7 System-on-a-Chip
+- family: TNETD7100, 7200 and 7300.
++ family: TI TNETD7100, 7200, 7300 and AudioCodes AC49x.
+
+ config ATH25
+ bool "Atheros AR231x/AR531x SoC support"
+@@ -1002,6 +1002,7 @@ config MIPS_PARAVIRT
+ endchoice
+
+ source "arch/mips/alchemy/Kconfig"
++source "arch/mips/ar7/Kconfig"
+ source "arch/mips/ath25/Kconfig"
+ source "arch/mips/ath79/Kconfig"
+ source "arch/mips/bcm47xx/Kconfig"
+--- /dev/null
++++ b/arch/mips/ar7/Kconfig
+@@ -0,0 +1,26 @@
++if AR7
++
++config AR7_TI
++ bool
++
++config AR7_AC49X
++ bool
++
++choice
++ prompt "AR7 SoC family selection"
++ default AR7_TYPE_TI
++ depends on AR7
++ help
++ Select AR7 MIPS SoC implementation.
++
++ config AR7_TYPE_TI
++ bool "Texas Instruments AR7"
++ select AR7_TI
++
++ config AR7_TYPE_AC49X
++ bool "AudioCodes AC49X"
++ select AR7_AC49X
++
++endchoice
++
++endif
--- /dev/null
+--- a/arch/mips/ar7/prom.c
++++ b/arch/mips/ar7/prom.c
+@@ -70,6 +70,7 @@ struct psbl_rec {
+ };
+
+ static const char psp_env_version[] __initconst = "TIENV0.8";
++static const char psp_env_version_ac49x[] __initconst = "MaxENV0.2";
+
+ struct psp_env_chunk {
+ u8 num;
+@@ -186,7 +187,8 @@ static void __init ar7_init_env(struct e
+ struct psbl_rec *psbl = (struct psbl_rec *)(KSEG1ADDR(0x14000300));
+ void *psp_env = (void *)KSEG1ADDR(psbl->env_base);
+
+- if (strcmp(psp_env, psp_env_version) == 0) {
++ if (strcmp(psp_env, psp_env_version) == 0 ||
++ strcmp(psp_env, psp_env_version_ac49x) == 0) {
+ parse_psp_env(psp_env);
+ } else {
+ for (i = 0; i < MAX_ENTRY; i++, env++)
--- /dev/null
+--- a/drivers/mtd/Kconfig
++++ b/drivers/mtd/Kconfig
+@@ -154,6 +154,11 @@ config MTD_OF_PARTS
+ the partition map from the children of the flash node,
+ as described in Documentation/devicetree/bindings/mtd/partition.txt.
+
++config MTD_AC49X_PARTS
++ tristate "AudioCodes AC49X partitioning support"
++ ---help---
++ AudioCodes AC49X partitioning support
++
+ config MTD_AR7_PARTS
+ tristate "TI AR7 partitioning support"
+ ---help---
+--- a/drivers/mtd/Makefile
++++ b/drivers/mtd/Makefile
+@@ -11,6 +11,7 @@ obj-$(CONFIG_MTD_SPLIT) += mtdsplit/
+ obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o
+ obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
+ obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
++obj-$(CONFIG_MTD_AC49X_PARTS) += ac49xpart.o
+ obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
+ obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o titanpart.o
+ obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63xxpart.o
+--- a/arch/mips/ar7/platform.c
++++ b/arch/mips/ar7/platform.c
+@@ -201,7 +201,7 @@ static struct resource physmap_flash_res
+ .end = 0x11ffffff,
+ };
+
+-static const char *ar7_probe_types[] = { "ar7part", NULL };
++static const char *ar7_probe_types[] = { "ac49xpart", "ar7part", NULL };
+
+ static struct physmap_flash_data physmap_flash_data = {
+ .width = 2,
--- /dev/null
+--- a/drivers/mtd/ar7part.c
++++ b/drivers/mtd/ar7part.c
+@@ -30,11 +30,14 @@
+
+ #include <uapi/linux/magic.h>
+
++#include <asm/mach-ar7/prom.h>
++
+ #define AR7_PARTS 4
+ #define ROOT_OFFSET 0xe0000
+
+ #define LOADER_MAGIC1 le32_to_cpu(0xfeedfa42)
+ #define LOADER_MAGIC2 le32_to_cpu(0xfeed1281)
++#define LOADER_MAGIC3 le32_to_cpu(0x434d4d4c)
+
+ struct ar7_bin_rec {
+ unsigned int checksum;
+@@ -42,12 +45,16 @@ struct ar7_bin_rec {
+ unsigned int address;
+ };
+
++int create_titan_partitions(struct mtd_info *master,
++ const struct mtd_partition **pparts,
++ struct mtd_part_parser_data *data);
++
+ static int create_mtd_partitions(struct mtd_info *master,
+ const struct mtd_partition **pparts,
+ struct mtd_part_parser_data *data)
+ {
+ struct ar7_bin_rec header;
+- unsigned int offset;
++ unsigned int offset, mtd_start, mtd_end;
+ size_t len;
+ unsigned int pre_size = master->erasesize, post_size = 0;
+ unsigned int root_offset = ROOT_OFFSET;
+@@ -55,6 +62,16 @@ static int create_mtd_partitions(struct
+ int retries = 10;
+ struct mtd_partition *ar7_parts;
+
++ const char *prom_str = prom_getenv("ProductID");
++ char mtd_name[] = "mtd1";
++ if(prom_str &&
++ (strcmp(prom_str, "CYWL")==0 ||
++ strcmp(prom_str, "CYWM")==0 ||
++ strcmp(prom_str, "CYLM")==0 ||
++ strcmp(prom_str, "CYLL")==0)){
++ return create_titan_partitions(master, pparts, data);
++ }
++
+ ar7_parts = kzalloc(sizeof(*ar7_parts) * AR7_PARTS, GFP_KERNEL);
+ if (!ar7_parts)
+ return -ENOMEM;
+@@ -83,34 +100,39 @@ static int create_mtd_partitions(struct
+
+ pre_size = offset;
+
+- if (!ar7_parts[1].offset) {
+- ar7_parts[1].offset = master->size - master->erasesize;
+- post_size = master->erasesize;
+- }
+-
+ switch (header.checksum) {
+- case LOADER_MAGIC1:
+- while (header.length) {
+- offset += sizeof(header) + header.length;
+- mtd_read(master, offset, sizeof(header), &len,
+- (uint8_t *)&header);
+- }
+- root_offset = offset + sizeof(header) + 4;
+- break;
+ case LOADER_MAGIC2:
++ for (retries = 0; retries <= 9; retries++) {
++ mtd_name[3] = '0' + retries;
++ prom_str = prom_getenv(mtd_name);
++ if (prom_str == NULL)
++ continue;
++ sscanf(prom_str, "%i,%i", &mtd_start, &mtd_end);
++ if (pre_size == (mtd_start & 0x1ffffff)) {
++ ar7_parts[1].offset = mtd_end &= 0x1ffffff;
++ ar7_parts[1].size = post_size = master->size - mtd_end;
++ break;
++ }
++ }
++ case LOADER_MAGIC1:
++ root_offset = (header.checksum == LOADER_MAGIC1) ? 4 : 0;
+ while (header.length) {
+ offset += sizeof(header) + header.length;
+ mtd_read(master, offset, sizeof(header), &len,
+ (uint8_t *)&header);
+ }
+- root_offset = offset + sizeof(header) + 4 + 0xff;
+- root_offset &= ~(uint32_t)0xff;
++ root_offset += offset + sizeof(header);
+ break;
+ default:
+ printk(KERN_WARNING "Unknown magic: %08x\n", header.checksum);
+ break;
+ }
+
++ if (!ar7_parts[1].offset) {
++ post_size = master->erasesize;
++ ar7_parts[1].offset = master->size - post_size;
++ }
++
+ mtd_read(master, root_offset, sizeof(header), &len, (u8 *)&header);
+ if (header.checksum != SQUASHFS_MAGIC) {
+ root_offset += master->erasesize - 1;
+--- a/drivers/mtd/titanpart.c
++++ b/drivers/mtd/titanpart.c
+@@ -148,8 +148,8 @@ static void titan_add_partition(char * e
+
+ }
+ int create_titan_partitions(struct mtd_info *master,
+- struct mtd_partition **pparts,
+- unsigned long origin)
++ const struct mtd_partition **pparts,
++ struct mtd_part_parser_data *data)
+ {
+ struct nsp_img_hdr_head hdr;
+ struct nsp_img_hdr_section_info sect_info;
--- /dev/null
+--- a/arch/mips/ar7/platform.c
++++ b/arch/mips/ar7/platform.c
+@@ -460,31 +460,22 @@ static struct gpio_led fb_fon_leds[] = {
+ },
+ };
+
+-static struct gpio_led gt701_leds[] = {
++static struct gpio_led actiontec_leds[] = {
+ {
+ .name = "inet:green",
+ .gpio = 13,
+- .active_low = 1,
+- },
+- {
+- .name = "usb",
+- .gpio = 12,
+- .active_low = 1,
+ },
+ {
+ .name = "inet:red",
+ .gpio = 9,
+- .active_low = 1,
+ },
+ {
+- .name = "power:red",
++ .name = "power:green",
+ .gpio = 7,
+- .active_low = 1,
+ },
+ {
+- .name = "power:green",
++ .name = "power:red",
+ .gpio = 8,
+- .active_low = 1,
+ .default_trigger = "default-on",
+ },
+ {
+@@ -492,6 +483,44 @@ static struct gpio_led gt701_leds[] = {
+ .gpio = 10,
+ .active_low = 1,
+ },
++ {
++ .name = "wifi",
++ .gpio = 6,
++ .active_low = 1,
++ },
++ {
++ .name = "wifi:red",
++ .gpio = 3,
++ },
++ {
++ .name = "standby",
++ .gpio = 4,
++ },
++ {
++ .name = "wps",
++ .gpio = 16,
++ .active_low = 1,
++ },
++ {
++ .name = "usb",
++ .gpio = 12,
++ .active_low = 1,
++ },
++ {
++ .name = "voip",
++ .gpio = 15,
++ .active_low = 1,
++ },
++ {
++ .name = "line1",
++ .gpio = 23,
++ .active_low = 1,
++ },
++ {
++ .name = "line2",
++ .gpio = 25,
++ .active_low = 1,
++ },
+ };
+
+ static struct gpio_led_platform_data ar7_led_data;
+@@ -535,9 +564,9 @@ static void __init detect_leds(void)
+ } else if (strstr(prid, "CYWM") || strstr(prid, "CYWL")) {
+ ar7_led_data.num_leds = ARRAY_SIZE(titan_leds);
+ ar7_led_data.leds = titan_leds;
+- } else if (strstr(prid, "GT701")) {
+- ar7_led_data.num_leds = ARRAY_SIZE(gt701_leds);
+- ar7_led_data.leds = gt701_leds;
++ } else if (strstr(prid, "GT7") || strstr(prid, "PK5000")) {
++ ar7_led_data.num_leds = ARRAY_SIZE(actiontec_leds);
++ ar7_led_data.leds = actiontec_leds;
+ }
+ }
+
--- /dev/null
+--- a/drivers/net/ethernet/ti/cpmac.c
++++ b/drivers/net/ethernet/ti/cpmac.c
+@@ -1124,6 +1124,8 @@ static int cpmac_probe(struct platform_d
+ goto fail;
+ }
+
++ ar7_device_reset(pdata->reset_bit);
++
+ dev->irq = platform_get_irq_byname(pdev, "irq");
+
+ dev->netdev_ops = &cpmac_netdev_ops;
+@@ -1203,7 +1205,7 @@ int cpmac_init(void)
+ cpmac_mii->write = cpmac_mdio_write;
+ cpmac_mii->reset = cpmac_mdio_reset;
+
+- cpmac_mii->priv = ioremap(AR7_REGS_MDIO, 256);
++ cpmac_mii->priv = ioremap(ar7_is_titan() ? TITAN_REGS_MDIO : AR7_REGS_MDIO, 256);
+
+ if (!cpmac_mii->priv) {
+ pr_err("Can't ioremap mdio registers\n");
+@@ -1214,10 +1216,16 @@ int cpmac_init(void)
+ /* FIXME: unhardcode gpio&reset bits */
+ ar7_gpio_disable(26);
+ ar7_gpio_disable(27);
+- ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
+- ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
++
++ if (!ar7_is_titan()) {
++ ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
++ ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
++ }
+ ar7_device_reset(AR7_RESET_BIT_EPHY);
+
++ if (ar7_is_titan())
++ ar7_device_reset(TITAN_RESET_BIT_EPHY1);
++
+ cpmac_mii->reset(cpmac_mii);
+
+ for (i = 0; i < 300; i++) {
+@@ -1234,7 +1242,11 @@ int cpmac_init(void)
+ mask = 0;
+ }
+
+- cpmac_mii->phy_mask = ~(mask | 0x80000000);
++ if (ar7_is_titan())
++ cpmac_mii->phy_mask = ~(mask | 0x80000000 | 0x40000000);
++ else
++ cpmac_mii->phy_mask = ~(mask | 0x80000000);
++
+ snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "cpmac-1");
+
+ res = mdiobus_register(cpmac_mii);
projects / openwrt / staging / zorun.git / commitdiff