Renumber backport patches starting from 000 to tidy things up.
Also fix patch name format for the mmc backport patch.
Refresh patches affected by this renumber change.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
--- /dev/null
+From 09be1a39e685d8c5edd471fd1cac9a8f8280d2de Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Tue, 8 Nov 2022 22:17:34 +0100
+Subject: [PATCH] clk: qcom: kpss-xcc: register it as clk provider
+
+krait-cc use this driver for the secondary mux. Register it as a clk
+provider to correctly use this clk in other drivers.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Link: https://lore.kernel.org/r/20221108211734.3707-1-ansuelsmth@gmail.com
+---
+ drivers/clk/qcom/kpss-xcc.c | 13 +++++++++----
+ 1 file changed, 9 insertions(+), 4 deletions(-)
+
+--- a/drivers/clk/qcom/kpss-xcc.c
++++ b/drivers/clk/qcom/kpss-xcc.c
+@@ -31,12 +31,13 @@ MODULE_DEVICE_TABLE(of, kpss_xcc_match_t
+
+ static int kpss_xcc_driver_probe(struct platform_device *pdev)
+ {
++ struct device *dev = &pdev->dev;
+ const struct of_device_id *id;
+ void __iomem *base;
+ struct clk_hw *hw;
+ const char *name;
+
+- id = of_match_device(kpss_xcc_match_table, &pdev->dev);
++ id = of_match_device(kpss_xcc_match_table, dev);
+ if (!id)
+ return -ENODEV;
+
+@@ -45,7 +46,7 @@ static int kpss_xcc_driver_probe(struct
+ return PTR_ERR(base);
+
+ if (id->data) {
+- if (of_property_read_string_index(pdev->dev.of_node,
++ if (of_property_read_string_index(dev->of_node,
+ "clock-output-names",
+ 0, &name))
+ return -ENODEV;
+@@ -55,12 +56,16 @@ static int kpss_xcc_driver_probe(struct
+ base += 0x28;
+ }
+
+- hw = devm_clk_hw_register_mux_parent_data_table(&pdev->dev, name, aux_parents,
++ hw = devm_clk_hw_register_mux_parent_data_table(dev, name, aux_parents,
+ ARRAY_SIZE(aux_parents), 0,
+ base, 0, 0x3,
+ 0, aux_parent_map, NULL);
++ if (IS_ERR(hw))
++ return PTR_ERR(hw);
+
+- return PTR_ERR_OR_ZERO(hw);
++ of_clk_add_hw_provider(dev->of_node, of_clk_hw_simple_get, hw);
++
++ return 0;
+ }
+
+ static struct platform_driver kpss_xcc_driver = {
--- /dev/null
+From 3198106a99e73dbc4c02bd5128cec0997c73af82 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Tue, 8 Nov 2022 22:58:27 +0100
+Subject: [PATCH 1/6] clk: qcom: krait-cc: use devm variant for clk notifier
+ register
+
+Use devm variant for clk notifier register and correctly handle free
+resource on driver remove.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Link: https://lore.kernel.org/r/20221108215827.30475-1-ansuelsmth@gmail.com
+---
+ drivers/clk/qcom/krait-cc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -62,7 +62,7 @@ static int krait_notifier_register(struc
+ int ret = 0;
+
+ mux->clk_nb.notifier_call = krait_notifier_cb;
+- ret = clk_notifier_register(clk, &mux->clk_nb);
++ ret = devm_clk_notifier_register(dev, clk, &mux->clk_nb);
+ if (ret)
+ dev_err(dev, "failed to register clock notifier: %d\n", ret);
+
--- /dev/null
+From 8e456411abcbf899c04740b9dbb3dcefcd61c946 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Wed, 9 Nov 2022 01:56:27 +0100
+Subject: [PATCH 2/6] clk: qcom: krait-cc: fix wrong parent order for secondary
+ mux
+
+The secondary mux parent order is swapped.
+This currently doesn't cause problems as the secondary mux is used for idle
+clk and as a safe clk source while reprogramming the hfpll.
+
+Each mux have 2 or more output but he always have a safe source to
+switch while reprogramming the connected pll. We use a clk notifier to
+switch to the correct parent before clk core can apply the correct rate.
+The parent to switch is hardcoded in the mux struct.
+
+For the secondary mux the safe source to use is the qsb parent as it's
+the only fixed clk as the acpus_aux is a pll that can source from pxo or
+from pll8.
+
+The hardcoded safe parent for the secondary mux is set to index 0 that
+in the secondary mux map is set to 2.
+
+But the index 0 is actually acpu_aux in the parent list.
+
+Fix the swapped parents to correctly handle idle frequency and output a
+sane clk_summary report.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Link: https://lore.kernel.org/r/20221109005631.3189-1-ansuelsmth@gmail.com
+---
+ drivers/clk/qcom/krait-cc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -116,8 +116,8 @@ krait_add_sec_mux(struct device *dev, in
+ int ret;
+ struct krait_mux_clk *mux;
+ static const char *sec_mux_list[] = {
+- "acpu_aux",
+ "qsb",
++ "acpu_aux",
+ };
+ struct clk_init_data init = {
+ .parent_names = sec_mux_list,
--- /dev/null
+From 18ae57b1e8abee6c453381470f6e18991d2901a8 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Wed, 9 Nov 2022 01:56:28 +0100
+Subject: [PATCH 3/6] clk: qcom: krait-cc: also enable secondary mux and div
+ clk
+
+clk-krait ignore any rate change if clk is not flagged as enabled.
+Correctly enable the secondary mux and div clk to correctly change rate
+instead of silently ignoring the request.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Link: https://lore.kernel.org/r/20221109005631.3189-2-ansuelsmth@gmail.com
+---
+ drivers/clk/qcom/krait-cc.c | 21 ++++++++++++++++++++-
+ 1 file changed, 20 insertions(+), 1 deletion(-)
+
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -80,6 +80,7 @@ krait_add_div(struct device *dev, int id
+ };
+ const char *p_names[1];
+ struct clk *clk;
++ int cpu;
+
+ div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL);
+ if (!div)
+@@ -103,6 +104,17 @@ krait_add_div(struct device *dev, int id
+ }
+
+ clk = devm_clk_register(dev, &div->hw);
++ if (IS_ERR(clk))
++ goto err;
++
++ /* clk-krait ignore any rate change if mux is not flagged as enabled */
++ if (id < 0)
++ for_each_online_cpu(cpu)
++ clk_prepare_enable(div->hw.clk);
++ else
++ clk_prepare_enable(div->hw.clk);
++
++err:
+ kfree(p_names[0]);
+ kfree(init.name);
+
+@@ -113,7 +125,7 @@ static int
+ krait_add_sec_mux(struct device *dev, int id, const char *s,
+ unsigned int offset, bool unique_aux)
+ {
+- int ret;
++ int cpu, ret;
+ struct krait_mux_clk *mux;
+ static const char *sec_mux_list[] = {
+ "qsb",
+@@ -165,6 +177,13 @@ krait_add_sec_mux(struct device *dev, in
+ if (ret)
+ goto unique_aux;
+
++ /* clk-krait ignore any rate change if mux is not flagged as enabled */
++ if (id < 0)
++ for_each_online_cpu(cpu)
++ clk_prepare_enable(mux->hw.clk);
++ else
++ clk_prepare_enable(mux->hw.clk);
++
+ unique_aux:
+ if (unique_aux)
+ kfree(sec_mux_list[0]);
--- /dev/null
+From e5dc1a4c01510da8438dddfdf4200b79d73990dc Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Wed, 9 Nov 2022 01:56:29 +0100
+Subject: [PATCH 4/6] clk: qcom: krait-cc: handle secondary mux sourcing out of
+ acpu_aux
+
+Some bootloader may leave the system in an even more undefined state
+with the secondary mux of L2 or other cores sourcing out of the acpu_aux
+parent. This results in the clk set to the PXO rate or a PLL8 rate.
+
+The current logic to reset the mux and set them to a defined state only
+handle if the mux are configured to source out of QSB. Change this and
+force a new and defined state if the current clk is lower than the aux
+rate. This way we can handle any wrong configuration where the mux is
+sourcing out of QSB (rate 225MHz, currently set to a virtual rate of 1),
+PXO rate (rate 25MHz) or PLL8 (needs to be configured to run at 384Mhz).
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Link: https://lore.kernel.org/r/20221109005631.3189-3-ansuelsmth@gmail.com
+---
+ drivers/clk/qcom/krait-cc.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -383,8 +383,8 @@ static int krait_cc_probe(struct platfor
+ */
+ cur_rate = clk_get_rate(l2_pri_mux_clk);
+ aux_rate = 384000000;
+- if (cur_rate == 1) {
+- pr_info("L2 @ QSB rate. Forcing new rate.\n");
++ if (cur_rate < aux_rate) {
++ pr_info("L2 @ Undefined rate. Forcing new rate.\n");
+ cur_rate = aux_rate;
+ }
+ clk_set_rate(l2_pri_mux_clk, aux_rate);
+@@ -394,8 +394,8 @@ static int krait_cc_probe(struct platfor
+ for_each_possible_cpu(cpu) {
+ clk = clks[cpu];
+ cur_rate = clk_get_rate(clk);
+- if (cur_rate == 1) {
+- pr_info("CPU%d @ QSB rate. Forcing new rate.\n", cpu);
++ if (cur_rate < aux_rate) {
++ pr_info("CPU%d @ Undefined rate. Forcing new rate.\n", cpu);
+ cur_rate = aux_rate;
+ }
+
--- /dev/null
+From 8ea9fb841a7e528bc8ae79d726ce951dcf7b46e2 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Wed, 9 Nov 2022 01:56:30 +0100
+Subject: [PATCH 5/6] clk: qcom: krait-cc: convert to devm_clk_hw_register
+
+clk_register is now deprecated. Convert the driver to devm_clk_hw_register.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Link: https://lore.kernel.org/r/20221109005631.3189-4-ansuelsmth@gmail.com
+---
+ drivers/clk/qcom/krait-cc.c | 31 +++++++++++++++++++------------
+ 1 file changed, 19 insertions(+), 12 deletions(-)
+
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -79,8 +79,7 @@ krait_add_div(struct device *dev, int id
+ .flags = CLK_SET_RATE_PARENT,
+ };
+ const char *p_names[1];
+- struct clk *clk;
+- int cpu;
++ int cpu, ret;
+
+ div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL);
+ if (!div)
+@@ -103,8 +102,8 @@ krait_add_div(struct device *dev, int id
+ return -ENOMEM;
+ }
+
+- clk = devm_clk_register(dev, &div->hw);
+- if (IS_ERR(clk))
++ ret = devm_clk_hw_register(dev, &div->hw);
++ if (ret)
+ goto err;
+
+ /* clk-krait ignore any rate change if mux is not flagged as enabled */
+@@ -118,7 +117,7 @@ err:
+ kfree(p_names[0]);
+ kfree(init.name);
+
+- return PTR_ERR_OR_ZERO(clk);
++ return ret;
+ }
+
+ static int
+@@ -137,7 +136,6 @@ krait_add_sec_mux(struct device *dev, in
+ .ops = &krait_mux_clk_ops,
+ .flags = CLK_SET_RATE_PARENT,
+ };
+- struct clk *clk;
+
+ mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
+ if (!mux)
+@@ -166,14 +164,16 @@ krait_add_sec_mux(struct device *dev, in
+ if (unique_aux) {
+ sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s);
+ if (!sec_mux_list[0]) {
+- clk = ERR_PTR(-ENOMEM);
++ ret = -ENOMEM;
+ goto err_aux;
+ }
+ }
+
+- clk = devm_clk_register(dev, &mux->hw);
++ ret = devm_clk_hw_register(dev, &mux->hw);
++ if (ret)
++ goto unique_aux;
+
+- ret = krait_notifier_register(dev, clk, mux);
++ ret = krait_notifier_register(dev, mux->hw.clk, mux);
+ if (ret)
+ goto unique_aux;
+
+@@ -189,7 +189,7 @@ unique_aux:
+ kfree(sec_mux_list[0]);
+ err_aux:
+ kfree(init.name);
+- return PTR_ERR_OR_ZERO(clk);
++ return ret;
+ }
+
+ static struct clk *
+@@ -241,11 +241,18 @@ krait_add_pri_mux(struct device *dev, in
+ goto err_p2;
+ }
+
+- clk = devm_clk_register(dev, &mux->hw);
++ ret = devm_clk_hw_register(dev, &mux->hw);
++ if (ret) {
++ clk = ERR_PTR(ret);
++ goto err_p3;
++ }
++
++ clk = mux->hw.clk;
+
+ ret = krait_notifier_register(dev, clk, mux);
+ if (ret)
+- goto err_p3;
++ clk = ERR_PTR(ret);
++
+ err_p3:
+ kfree(p_names[2]);
+ err_p2:
--- /dev/null
+From 56a655e1c41a86445cf2de656649ad93424b2a63 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Wed, 9 Nov 2022 01:56:31 +0100
+Subject: [PATCH 6/6] clk: qcom: krait-cc: convert to parent_data API
+
+Modernize the krait-cc driver to parent-data API and refactor to drop
+any use of parent_names. From Documentation all the required clocks should
+be declared in DTS so fw_name can be correctly used to get the parents
+for all the muxes. .name is also declared to save compatibility with old
+DT.
+
+While at it also drop some hardcoded index and introduce an enum to make
+index values more clear.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Link: https://lore.kernel.org/r/20221109005631.3189-5-ansuelsmth@gmail.com
+---
+ drivers/clk/qcom/krait-cc.c | 202 ++++++++++++++++++++----------------
+ 1 file changed, 112 insertions(+), 90 deletions(-)
+
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -15,6 +15,16 @@
+
+ #include "clk-krait.h"
+
++enum {
++ cpu0_mux = 0,
++ cpu1_mux,
++ cpu2_mux,
++ cpu3_mux,
++ l2_mux,
++
++ clks_max,
++};
++
+ static unsigned int sec_mux_map[] = {
+ 2,
+ 0,
+@@ -69,21 +79,23 @@ static int krait_notifier_register(struc
+ return ret;
+ }
+
+-static int
++static struct clk_hw *
+ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset)
+ {
+ struct krait_div2_clk *div;
++ static struct clk_parent_data p_data[1];
+ struct clk_init_data init = {
+- .num_parents = 1,
++ .num_parents = ARRAY_SIZE(p_data),
+ .ops = &krait_div2_clk_ops,
+ .flags = CLK_SET_RATE_PARENT,
+ };
+- const char *p_names[1];
++ struct clk_hw *clk;
++ char *parent_name;
+ int cpu, ret;
+
+ div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL);
+ if (!div)
+- return -ENOMEM;
++ return ERR_PTR(-ENOMEM);
+
+ div->width = 2;
+ div->shift = 6;
+@@ -93,18 +105,25 @@ krait_add_div(struct device *dev, int id
+
+ init.name = kasprintf(GFP_KERNEL, "hfpll%s_div", s);
+ if (!init.name)
+- return -ENOMEM;
++ return ERR_PTR(-ENOMEM);
+
+- init.parent_names = p_names;
+- p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s);
+- if (!p_names[0]) {
+- kfree(init.name);
+- return -ENOMEM;
++ init.parent_data = p_data;
++ parent_name = kasprintf(GFP_KERNEL, "hfpll%s", s);
++ if (!parent_name) {
++ clk = ERR_PTR(-ENOMEM);
++ goto err_parent_name;
+ }
+
++ p_data[0].fw_name = parent_name;
++ p_data[0].name = parent_name;
++
+ ret = devm_clk_hw_register(dev, &div->hw);
+- if (ret)
+- goto err;
++ if (ret) {
++ clk = ERR_PTR(ret);
++ goto err_clk;
++ }
++
++ clk = &div->hw;
+
+ /* clk-krait ignore any rate change if mux is not flagged as enabled */
+ if (id < 0)
+@@ -113,33 +132,36 @@ krait_add_div(struct device *dev, int id
+ else
+ clk_prepare_enable(div->hw.clk);
+
+-err:
+- kfree(p_names[0]);
++err_clk:
++ kfree(parent_name);
++err_parent_name:
+ kfree(init.name);
+
+- return ret;
++ return clk;
+ }
+
+-static int
++static struct clk_hw *
+ krait_add_sec_mux(struct device *dev, int id, const char *s,
+ unsigned int offset, bool unique_aux)
+ {
+ int cpu, ret;
+ struct krait_mux_clk *mux;
+- static const char *sec_mux_list[] = {
+- "qsb",
+- "acpu_aux",
++ static struct clk_parent_data sec_mux_list[2] = {
++ { .name = "qsb", .fw_name = "qsb" },
++ {},
+ };
+ struct clk_init_data init = {
+- .parent_names = sec_mux_list,
++ .parent_data = sec_mux_list,
+ .num_parents = ARRAY_SIZE(sec_mux_list),
+ .ops = &krait_mux_clk_ops,
+ .flags = CLK_SET_RATE_PARENT,
+ };
++ struct clk_hw *clk;
++ char *parent_name;
+
+ mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
+ if (!mux)
+- return -ENOMEM;
++ return ERR_PTR(-ENOMEM);
+
+ mux->offset = offset;
+ mux->lpl = id >= 0;
+@@ -159,23 +181,33 @@ krait_add_sec_mux(struct device *dev, in
+
+ init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
+ if (!init.name)
+- return -ENOMEM;
++ return ERR_PTR(-ENOMEM);
+
+ if (unique_aux) {
+- sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s);
+- if (!sec_mux_list[0]) {
+- ret = -ENOMEM;
++ parent_name = kasprintf(GFP_KERNEL, "acpu%s_aux", s);
++ if (!parent_name) {
++ clk = ERR_PTR(-ENOMEM);
+ goto err_aux;
+ }
++ sec_mux_list[1].fw_name = parent_name;
++ sec_mux_list[1].name = parent_name;
++ } else {
++ sec_mux_list[1].name = "apu_aux";
+ }
+
+ ret = devm_clk_hw_register(dev, &mux->hw);
+- if (ret)
+- goto unique_aux;
++ if (ret) {
++ clk = ERR_PTR(ret);
++ goto err_clk;
++ }
++
++ clk = &mux->hw;
+
+ ret = krait_notifier_register(dev, mux->hw.clk, mux);
+- if (ret)
+- goto unique_aux;
++ if (ret) {
++ clk = ERR_PTR(ret);
++ goto err_clk;
++ }
+
+ /* clk-krait ignore any rate change if mux is not flagged as enabled */
+ if (id < 0)
+@@ -184,28 +216,29 @@ krait_add_sec_mux(struct device *dev, in
+ else
+ clk_prepare_enable(mux->hw.clk);
+
+-unique_aux:
++err_clk:
+ if (unique_aux)
+- kfree(sec_mux_list[0]);
++ kfree(parent_name);
+ err_aux:
+ kfree(init.name);
+- return ret;
++ return clk;
+ }
+
+-static struct clk *
+-krait_add_pri_mux(struct device *dev, int id, const char *s,
+- unsigned int offset)
++static struct clk_hw *
++krait_add_pri_mux(struct device *dev, struct clk_hw *hfpll_div, struct clk_hw *sec_mux,
++ int id, const char *s, unsigned int offset)
+ {
+ int ret;
+ struct krait_mux_clk *mux;
+- const char *p_names[3];
++ static struct clk_parent_data p_data[3];
+ struct clk_init_data init = {
+- .parent_names = p_names,
+- .num_parents = ARRAY_SIZE(p_names),
++ .parent_data = p_data,
++ .num_parents = ARRAY_SIZE(p_data),
+ .ops = &krait_mux_clk_ops,
+ .flags = CLK_SET_RATE_PARENT,
+ };
+- struct clk *clk;
++ struct clk_hw *clk;
++ char *hfpll_name;
+
+ mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
+ if (!mux)
+@@ -223,55 +256,44 @@ krait_add_pri_mux(struct device *dev, in
+ if (!init.name)
+ return ERR_PTR(-ENOMEM);
+
+- p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s);
+- if (!p_names[0]) {
++ hfpll_name = kasprintf(GFP_KERNEL, "hfpll%s", s);
++ if (!hfpll_name) {
+ clk = ERR_PTR(-ENOMEM);
+- goto err_p0;
++ goto err_hfpll;
+ }
+
+- p_names[1] = kasprintf(GFP_KERNEL, "hfpll%s_div", s);
+- if (!p_names[1]) {
+- clk = ERR_PTR(-ENOMEM);
+- goto err_p1;
+- }
++ p_data[0].fw_name = hfpll_name;
++ p_data[0].name = hfpll_name;
+
+- p_names[2] = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
+- if (!p_names[2]) {
+- clk = ERR_PTR(-ENOMEM);
+- goto err_p2;
+- }
++ p_data[1].hw = hfpll_div;
++ p_data[2].hw = sec_mux;
+
+ ret = devm_clk_hw_register(dev, &mux->hw);
+ if (ret) {
+ clk = ERR_PTR(ret);
+- goto err_p3;
++ goto err_clk;
+ }
+
+- clk = mux->hw.clk;
++ clk = &mux->hw;
+
+- ret = krait_notifier_register(dev, clk, mux);
++ ret = krait_notifier_register(dev, mux->hw.clk, mux);
+ if (ret)
+ clk = ERR_PTR(ret);
+
+-err_p3:
+- kfree(p_names[2]);
+-err_p2:
+- kfree(p_names[1]);
+-err_p1:
+- kfree(p_names[0]);
+-err_p0:
++err_clk:
++ kfree(hfpll_name);
++err_hfpll:
+ kfree(init.name);
+ return clk;
+ }
+
+ /* id < 0 for L2, otherwise id == physical CPU number */
+-static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux)
++static struct clk_hw *krait_add_clks(struct device *dev, int id, bool unique_aux)
+ {
+- int ret;
++ struct clk_hw *hfpll_div, *sec_mux, *pri_mux;
+ unsigned int offset;
+ void *p = NULL;
+ const char *s;
+- struct clk *clk;
+
+ if (id >= 0) {
+ offset = 0x4501 + (0x1000 * id);
+@@ -283,22 +305,23 @@ static struct clk *krait_add_clks(struct
+ s = "_l2";
+ }
+
+- ret = krait_add_div(dev, id, s, offset);
+- if (ret) {
+- clk = ERR_PTR(ret);
++ hfpll_div = krait_add_div(dev, id, s, offset);
++ if (IS_ERR(hfpll_div)) {
++ pri_mux = hfpll_div;
+ goto err;
+ }
+
+- ret = krait_add_sec_mux(dev, id, s, offset, unique_aux);
+- if (ret) {
+- clk = ERR_PTR(ret);
++ sec_mux = krait_add_sec_mux(dev, id, s, offset, unique_aux);
++ if (IS_ERR(sec_mux)) {
++ pri_mux = sec_mux;
+ goto err;
+ }
+
+- clk = krait_add_pri_mux(dev, id, s, offset);
++ pri_mux = krait_add_pri_mux(dev, hfpll_div, sec_mux, id, s, offset);
++
+ err:
+ kfree(p);
+- return clk;
++ return pri_mux;
+ }
+
+ static struct clk *krait_of_get(struct of_phandle_args *clkspec, void *data)
+@@ -306,7 +329,7 @@ static struct clk *krait_of_get(struct o
+ unsigned int idx = clkspec->args[0];
+ struct clk **clks = data;
+
+- if (idx >= 5) {
++ if (idx >= clks_max) {
+ pr_err("%s: invalid clock index %d\n", __func__, idx);
+ return ERR_PTR(-EINVAL);
+ }
+@@ -327,9 +350,8 @@ static int krait_cc_probe(struct platfor
+ const struct of_device_id *id;
+ unsigned long cur_rate, aux_rate;
+ int cpu;
+- struct clk *clk;
+- struct clk **clks;
+- struct clk *l2_pri_mux_clk;
++ struct clk_hw *mux, *l2_pri_mux;
++ struct clk *clk, **clks;
+
+ id = of_match_device(krait_cc_match_table, dev);
+ if (!id)
+@@ -348,21 +370,21 @@ static int krait_cc_probe(struct platfor
+ }
+
+ /* Krait configurations have at most 4 CPUs and one L2 */
+- clks = devm_kcalloc(dev, 5, sizeof(*clks), GFP_KERNEL);
++ clks = devm_kcalloc(dev, clks_max, sizeof(*clks), GFP_KERNEL);
+ if (!clks)
+ return -ENOMEM;
+
+ for_each_possible_cpu(cpu) {
+- clk = krait_add_clks(dev, cpu, id->data);
++ mux = krait_add_clks(dev, cpu, id->data);
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+- clks[cpu] = clk;
++ clks[cpu] = mux->clk;
+ }
+
+- l2_pri_mux_clk = krait_add_clks(dev, -1, id->data);
+- if (IS_ERR(l2_pri_mux_clk))
+- return PTR_ERR(l2_pri_mux_clk);
+- clks[4] = l2_pri_mux_clk;
++ l2_pri_mux = krait_add_clks(dev, -1, id->data);
++ if (IS_ERR(l2_pri_mux))
++ return PTR_ERR(l2_pri_mux);
++ clks[l2_mux] = l2_pri_mux->clk;
+
+ /*
+ * We don't want the CPU or L2 clocks to be turned off at late init
+@@ -372,7 +394,7 @@ static int krait_cc_probe(struct platfor
+ * they take over.
+ */
+ for_each_online_cpu(cpu) {
+- clk_prepare_enable(l2_pri_mux_clk);
++ clk_prepare_enable(clks[l2_mux]);
+ WARN(clk_prepare_enable(clks[cpu]),
+ "Unable to turn on CPU%d clock", cpu);
+ }
+@@ -388,16 +410,16 @@ static int krait_cc_probe(struct platfor
+ * two different rates to force a HFPLL reinit under all
+ * circumstances.
+ */
+- cur_rate = clk_get_rate(l2_pri_mux_clk);
++ cur_rate = clk_get_rate(clks[l2_mux]);
+ aux_rate = 384000000;
+ if (cur_rate < aux_rate) {
+ pr_info("L2 @ Undefined rate. Forcing new rate.\n");
+ cur_rate = aux_rate;
+ }
+- clk_set_rate(l2_pri_mux_clk, aux_rate);
+- clk_set_rate(l2_pri_mux_clk, 2);
+- clk_set_rate(l2_pri_mux_clk, cur_rate);
+- pr_info("L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000);
++ clk_set_rate(clks[l2_mux], aux_rate);
++ clk_set_rate(clks[l2_mux], 2);
++ clk_set_rate(clks[l2_mux], cur_rate);
++ pr_info("L2 @ %lu KHz\n", clk_get_rate(clks[l2_mux]) / 1000);
+ for_each_possible_cpu(cpu) {
+ clk = clks[cpu];
+ cur_rate = clk_get_rate(clk);
--- /dev/null
+From c9713e4ede1e5d044b64fe4d3cbb84223625637f Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Tue, 25 Oct 2022 01:38:17 +0200
+Subject: [PATCH] ARM: dts: qcom: ipq8064: disable mmc-ddr-1_8v for sdcc1
+
+It was reported non working mmc with this option enabled.
+Both mmc for ipq8064 are supplied by a fixed 3.3v regulator so mmc can't
+be run at 1.8v.
+Disable it to restore correct functionality of this SoC feature.
+
+Tested-by: Hendrik Koerner <koerhen@web.de>
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Link: https://lore.kernel.org/r/20221024233817.27410-1-ansuelsmth@gmail.com
+---
+ arch/arm/boot/dts/qcom-ipq8064.dtsi | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+@@ -756,7 +756,6 @@
+ non-removable;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+- mmc-ddr-1_8v;
+ vmmc-supply = <&vsdcc_fixed>;
+ dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
+ dma-names = "tx", "rx";
};
opp_table_l2: opp_table_l2 {
-@@ -1410,6 +1400,16 @@
+@@ -1409,6 +1399,16 @@
#reset-cells = <1>;
};
thermal-zones {
sensor0-thermal {
polling-delay-passive = <0>;
-@@ -1410,6 +1422,13 @@
+@@ -1409,6 +1421,13 @@
operating-points-v2 = <&opp_table_l2>;
};
+++ /dev/null
-From 09be1a39e685d8c5edd471fd1cac9a8f8280d2de Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Tue, 8 Nov 2022 22:17:34 +0100
-Subject: [PATCH] clk: qcom: kpss-xcc: register it as clk provider
-
-krait-cc use this driver for the secondary mux. Register it as a clk
-provider to correctly use this clk in other drivers.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Link: https://lore.kernel.org/r/20221108211734.3707-1-ansuelsmth@gmail.com
----
- drivers/clk/qcom/kpss-xcc.c | 13 +++++++++----
- 1 file changed, 9 insertions(+), 4 deletions(-)
-
---- a/drivers/clk/qcom/kpss-xcc.c
-+++ b/drivers/clk/qcom/kpss-xcc.c
-@@ -31,12 +31,13 @@ MODULE_DEVICE_TABLE(of, kpss_xcc_match_t
-
- static int kpss_xcc_driver_probe(struct platform_device *pdev)
- {
-+ struct device *dev = &pdev->dev;
- const struct of_device_id *id;
- void __iomem *base;
- struct clk_hw *hw;
- const char *name;
-
-- id = of_match_device(kpss_xcc_match_table, &pdev->dev);
-+ id = of_match_device(kpss_xcc_match_table, dev);
- if (!id)
- return -ENODEV;
-
-@@ -45,7 +46,7 @@ static int kpss_xcc_driver_probe(struct
- return PTR_ERR(base);
-
- if (id->data) {
-- if (of_property_read_string_index(pdev->dev.of_node,
-+ if (of_property_read_string_index(dev->of_node,
- "clock-output-names",
- 0, &name))
- return -ENODEV;
-@@ -55,12 +56,16 @@ static int kpss_xcc_driver_probe(struct
- base += 0x28;
- }
-
-- hw = devm_clk_hw_register_mux_parent_data_table(&pdev->dev, name, aux_parents,
-+ hw = devm_clk_hw_register_mux_parent_data_table(dev, name, aux_parents,
- ARRAY_SIZE(aux_parents), 0,
- base, 0, 0x3,
- 0, aux_parent_map, NULL);
-+ if (IS_ERR(hw))
-+ return PTR_ERR(hw);
-
-- return PTR_ERR_OR_ZERO(hw);
-+ of_clk_add_hw_provider(dev->of_node, of_clk_hw_simple_get, hw);
-+
-+ return 0;
- }
-
- static struct platform_driver kpss_xcc_driver = {
+++ /dev/null
-From 3198106a99e73dbc4c02bd5128cec0997c73af82 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Tue, 8 Nov 2022 22:58:27 +0100
-Subject: [PATCH 1/6] clk: qcom: krait-cc: use devm variant for clk notifier
- register
-
-Use devm variant for clk notifier register and correctly handle free
-resource on driver remove.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Link: https://lore.kernel.org/r/20221108215827.30475-1-ansuelsmth@gmail.com
----
- drivers/clk/qcom/krait-cc.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/clk/qcom/krait-cc.c
-+++ b/drivers/clk/qcom/krait-cc.c
-@@ -62,7 +62,7 @@ static int krait_notifier_register(struc
- int ret = 0;
-
- mux->clk_nb.notifier_call = krait_notifier_cb;
-- ret = clk_notifier_register(clk, &mux->clk_nb);
-+ ret = devm_clk_notifier_register(dev, clk, &mux->clk_nb);
- if (ret)
- dev_err(dev, "failed to register clock notifier: %d\n", ret);
-
+++ /dev/null
-From 8e456411abcbf899c04740b9dbb3dcefcd61c946 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Wed, 9 Nov 2022 01:56:27 +0100
-Subject: [PATCH 2/6] clk: qcom: krait-cc: fix wrong parent order for secondary
- mux
-
-The secondary mux parent order is swapped.
-This currently doesn't cause problems as the secondary mux is used for idle
-clk and as a safe clk source while reprogramming the hfpll.
-
-Each mux have 2 or more output but he always have a safe source to
-switch while reprogramming the connected pll. We use a clk notifier to
-switch to the correct parent before clk core can apply the correct rate.
-The parent to switch is hardcoded in the mux struct.
-
-For the secondary mux the safe source to use is the qsb parent as it's
-the only fixed clk as the acpus_aux is a pll that can source from pxo or
-from pll8.
-
-The hardcoded safe parent for the secondary mux is set to index 0 that
-in the secondary mux map is set to 2.
-
-But the index 0 is actually acpu_aux in the parent list.
-
-Fix the swapped parents to correctly handle idle frequency and output a
-sane clk_summary report.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Link: https://lore.kernel.org/r/20221109005631.3189-1-ansuelsmth@gmail.com
----
- drivers/clk/qcom/krait-cc.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/clk/qcom/krait-cc.c
-+++ b/drivers/clk/qcom/krait-cc.c
-@@ -116,8 +116,8 @@ krait_add_sec_mux(struct device *dev, in
- int ret;
- struct krait_mux_clk *mux;
- static const char *sec_mux_list[] = {
-- "acpu_aux",
- "qsb",
-+ "acpu_aux",
- };
- struct clk_init_data init = {
- .parent_names = sec_mux_list,
+++ /dev/null
-From 18ae57b1e8abee6c453381470f6e18991d2901a8 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Wed, 9 Nov 2022 01:56:28 +0100
-Subject: [PATCH 3/6] clk: qcom: krait-cc: also enable secondary mux and div
- clk
-
-clk-krait ignore any rate change if clk is not flagged as enabled.
-Correctly enable the secondary mux and div clk to correctly change rate
-instead of silently ignoring the request.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Link: https://lore.kernel.org/r/20221109005631.3189-2-ansuelsmth@gmail.com
----
- drivers/clk/qcom/krait-cc.c | 21 ++++++++++++++++++++-
- 1 file changed, 20 insertions(+), 1 deletion(-)
-
---- a/drivers/clk/qcom/krait-cc.c
-+++ b/drivers/clk/qcom/krait-cc.c
-@@ -80,6 +80,7 @@ krait_add_div(struct device *dev, int id
- };
- const char *p_names[1];
- struct clk *clk;
-+ int cpu;
-
- div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL);
- if (!div)
-@@ -103,6 +104,17 @@ krait_add_div(struct device *dev, int id
- }
-
- clk = devm_clk_register(dev, &div->hw);
-+ if (IS_ERR(clk))
-+ goto err;
-+
-+ /* clk-krait ignore any rate change if mux is not flagged as enabled */
-+ if (id < 0)
-+ for_each_online_cpu(cpu)
-+ clk_prepare_enable(div->hw.clk);
-+ else
-+ clk_prepare_enable(div->hw.clk);
-+
-+err:
- kfree(p_names[0]);
- kfree(init.name);
-
-@@ -113,7 +125,7 @@ static int
- krait_add_sec_mux(struct device *dev, int id, const char *s,
- unsigned int offset, bool unique_aux)
- {
-- int ret;
-+ int cpu, ret;
- struct krait_mux_clk *mux;
- static const char *sec_mux_list[] = {
- "qsb",
-@@ -165,6 +177,13 @@ krait_add_sec_mux(struct device *dev, in
- if (ret)
- goto unique_aux;
-
-+ /* clk-krait ignore any rate change if mux is not flagged as enabled */
-+ if (id < 0)
-+ for_each_online_cpu(cpu)
-+ clk_prepare_enable(mux->hw.clk);
-+ else
-+ clk_prepare_enable(mux->hw.clk);
-+
- unique_aux:
- if (unique_aux)
- kfree(sec_mux_list[0]);
+++ /dev/null
-From e5dc1a4c01510da8438dddfdf4200b79d73990dc Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Wed, 9 Nov 2022 01:56:29 +0100
-Subject: [PATCH 4/6] clk: qcom: krait-cc: handle secondary mux sourcing out of
- acpu_aux
-
-Some bootloader may leave the system in an even more undefined state
-with the secondary mux of L2 or other cores sourcing out of the acpu_aux
-parent. This results in the clk set to the PXO rate or a PLL8 rate.
-
-The current logic to reset the mux and set them to a defined state only
-handle if the mux are configured to source out of QSB. Change this and
-force a new and defined state if the current clk is lower than the aux
-rate. This way we can handle any wrong configuration where the mux is
-sourcing out of QSB (rate 225MHz, currently set to a virtual rate of 1),
-PXO rate (rate 25MHz) or PLL8 (needs to be configured to run at 384Mhz).
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Link: https://lore.kernel.org/r/20221109005631.3189-3-ansuelsmth@gmail.com
----
- drivers/clk/qcom/krait-cc.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/clk/qcom/krait-cc.c
-+++ b/drivers/clk/qcom/krait-cc.c
-@@ -383,8 +383,8 @@ static int krait_cc_probe(struct platfor
- */
- cur_rate = clk_get_rate(l2_pri_mux_clk);
- aux_rate = 384000000;
-- if (cur_rate == 1) {
-- pr_info("L2 @ QSB rate. Forcing new rate.\n");
-+ if (cur_rate < aux_rate) {
-+ pr_info("L2 @ Undefined rate. Forcing new rate.\n");
- cur_rate = aux_rate;
- }
- clk_set_rate(l2_pri_mux_clk, aux_rate);
-@@ -394,8 +394,8 @@ static int krait_cc_probe(struct platfor
- for_each_possible_cpu(cpu) {
- clk = clks[cpu];
- cur_rate = clk_get_rate(clk);
-- if (cur_rate == 1) {
-- pr_info("CPU%d @ QSB rate. Forcing new rate.\n", cpu);
-+ if (cur_rate < aux_rate) {
-+ pr_info("CPU%d @ Undefined rate. Forcing new rate.\n", cpu);
- cur_rate = aux_rate;
- }
-
+++ /dev/null
-From 8ea9fb841a7e528bc8ae79d726ce951dcf7b46e2 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Wed, 9 Nov 2022 01:56:30 +0100
-Subject: [PATCH 5/6] clk: qcom: krait-cc: convert to devm_clk_hw_register
-
-clk_register is now deprecated. Convert the driver to devm_clk_hw_register.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Link: https://lore.kernel.org/r/20221109005631.3189-4-ansuelsmth@gmail.com
----
- drivers/clk/qcom/krait-cc.c | 31 +++++++++++++++++++------------
- 1 file changed, 19 insertions(+), 12 deletions(-)
-
---- a/drivers/clk/qcom/krait-cc.c
-+++ b/drivers/clk/qcom/krait-cc.c
-@@ -79,8 +79,7 @@ krait_add_div(struct device *dev, int id
- .flags = CLK_SET_RATE_PARENT,
- };
- const char *p_names[1];
-- struct clk *clk;
-- int cpu;
-+ int cpu, ret;
-
- div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL);
- if (!div)
-@@ -103,8 +102,8 @@ krait_add_div(struct device *dev, int id
- return -ENOMEM;
- }
-
-- clk = devm_clk_register(dev, &div->hw);
-- if (IS_ERR(clk))
-+ ret = devm_clk_hw_register(dev, &div->hw);
-+ if (ret)
- goto err;
-
- /* clk-krait ignore any rate change if mux is not flagged as enabled */
-@@ -118,7 +117,7 @@ err:
- kfree(p_names[0]);
- kfree(init.name);
-
-- return PTR_ERR_OR_ZERO(clk);
-+ return ret;
- }
-
- static int
-@@ -137,7 +136,6 @@ krait_add_sec_mux(struct device *dev, in
- .ops = &krait_mux_clk_ops,
- .flags = CLK_SET_RATE_PARENT,
- };
-- struct clk *clk;
-
- mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
- if (!mux)
-@@ -166,14 +164,16 @@ krait_add_sec_mux(struct device *dev, in
- if (unique_aux) {
- sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s);
- if (!sec_mux_list[0]) {
-- clk = ERR_PTR(-ENOMEM);
-+ ret = -ENOMEM;
- goto err_aux;
- }
- }
-
-- clk = devm_clk_register(dev, &mux->hw);
-+ ret = devm_clk_hw_register(dev, &mux->hw);
-+ if (ret)
-+ goto unique_aux;
-
-- ret = krait_notifier_register(dev, clk, mux);
-+ ret = krait_notifier_register(dev, mux->hw.clk, mux);
- if (ret)
- goto unique_aux;
-
-@@ -189,7 +189,7 @@ unique_aux:
- kfree(sec_mux_list[0]);
- err_aux:
- kfree(init.name);
-- return PTR_ERR_OR_ZERO(clk);
-+ return ret;
- }
-
- static struct clk *
-@@ -241,11 +241,18 @@ krait_add_pri_mux(struct device *dev, in
- goto err_p2;
- }
-
-- clk = devm_clk_register(dev, &mux->hw);
-+ ret = devm_clk_hw_register(dev, &mux->hw);
-+ if (ret) {
-+ clk = ERR_PTR(ret);
-+ goto err_p3;
-+ }
-+
-+ clk = mux->hw.clk;
-
- ret = krait_notifier_register(dev, clk, mux);
- if (ret)
-- goto err_p3;
-+ clk = ERR_PTR(ret);
-+
- err_p3:
- kfree(p_names[2]);
- err_p2:
+++ /dev/null
-From 56a655e1c41a86445cf2de656649ad93424b2a63 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Wed, 9 Nov 2022 01:56:31 +0100
-Subject: [PATCH 6/6] clk: qcom: krait-cc: convert to parent_data API
-
-Modernize the krait-cc driver to parent-data API and refactor to drop
-any use of parent_names. From Documentation all the required clocks should
-be declared in DTS so fw_name can be correctly used to get the parents
-for all the muxes. .name is also declared to save compatibility with old
-DT.
-
-While at it also drop some hardcoded index and introduce an enum to make
-index values more clear.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Link: https://lore.kernel.org/r/20221109005631.3189-5-ansuelsmth@gmail.com
----
- drivers/clk/qcom/krait-cc.c | 202 ++++++++++++++++++++----------------
- 1 file changed, 112 insertions(+), 90 deletions(-)
-
---- a/drivers/clk/qcom/krait-cc.c
-+++ b/drivers/clk/qcom/krait-cc.c
-@@ -15,6 +15,16 @@
-
- #include "clk-krait.h"
-
-+enum {
-+ cpu0_mux = 0,
-+ cpu1_mux,
-+ cpu2_mux,
-+ cpu3_mux,
-+ l2_mux,
-+
-+ clks_max,
-+};
-+
- static unsigned int sec_mux_map[] = {
- 2,
- 0,
-@@ -69,21 +79,23 @@ static int krait_notifier_register(struc
- return ret;
- }
-
--static int
-+static struct clk_hw *
- krait_add_div(struct device *dev, int id, const char *s, unsigned int offset)
- {
- struct krait_div2_clk *div;
-+ static struct clk_parent_data p_data[1];
- struct clk_init_data init = {
-- .num_parents = 1,
-+ .num_parents = ARRAY_SIZE(p_data),
- .ops = &krait_div2_clk_ops,
- .flags = CLK_SET_RATE_PARENT,
- };
-- const char *p_names[1];
-+ struct clk_hw *clk;
-+ char *parent_name;
- int cpu, ret;
-
- div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL);
- if (!div)
-- return -ENOMEM;
-+ return ERR_PTR(-ENOMEM);
-
- div->width = 2;
- div->shift = 6;
-@@ -93,18 +105,25 @@ krait_add_div(struct device *dev, int id
-
- init.name = kasprintf(GFP_KERNEL, "hfpll%s_div", s);
- if (!init.name)
-- return -ENOMEM;
-+ return ERR_PTR(-ENOMEM);
-
-- init.parent_names = p_names;
-- p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s);
-- if (!p_names[0]) {
-- kfree(init.name);
-- return -ENOMEM;
-+ init.parent_data = p_data;
-+ parent_name = kasprintf(GFP_KERNEL, "hfpll%s", s);
-+ if (!parent_name) {
-+ clk = ERR_PTR(-ENOMEM);
-+ goto err_parent_name;
- }
-
-+ p_data[0].fw_name = parent_name;
-+ p_data[0].name = parent_name;
-+
- ret = devm_clk_hw_register(dev, &div->hw);
-- if (ret)
-- goto err;
-+ if (ret) {
-+ clk = ERR_PTR(ret);
-+ goto err_clk;
-+ }
-+
-+ clk = &div->hw;
-
- /* clk-krait ignore any rate change if mux is not flagged as enabled */
- if (id < 0)
-@@ -113,33 +132,36 @@ krait_add_div(struct device *dev, int id
- else
- clk_prepare_enable(div->hw.clk);
-
--err:
-- kfree(p_names[0]);
-+err_clk:
-+ kfree(parent_name);
-+err_parent_name:
- kfree(init.name);
-
-- return ret;
-+ return clk;
- }
-
--static int
-+static struct clk_hw *
- krait_add_sec_mux(struct device *dev, int id, const char *s,
- unsigned int offset, bool unique_aux)
- {
- int cpu, ret;
- struct krait_mux_clk *mux;
-- static const char *sec_mux_list[] = {
-- "qsb",
-- "acpu_aux",
-+ static struct clk_parent_data sec_mux_list[2] = {
-+ { .name = "qsb", .fw_name = "qsb" },
-+ {},
- };
- struct clk_init_data init = {
-- .parent_names = sec_mux_list,
-+ .parent_data = sec_mux_list,
- .num_parents = ARRAY_SIZE(sec_mux_list),
- .ops = &krait_mux_clk_ops,
- .flags = CLK_SET_RATE_PARENT,
- };
-+ struct clk_hw *clk;
-+ char *parent_name;
-
- mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
- if (!mux)
-- return -ENOMEM;
-+ return ERR_PTR(-ENOMEM);
-
- mux->offset = offset;
- mux->lpl = id >= 0;
-@@ -159,23 +181,33 @@ krait_add_sec_mux(struct device *dev, in
-
- init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
- if (!init.name)
-- return -ENOMEM;
-+ return ERR_PTR(-ENOMEM);
-
- if (unique_aux) {
-- sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s);
-- if (!sec_mux_list[0]) {
-- ret = -ENOMEM;
-+ parent_name = kasprintf(GFP_KERNEL, "acpu%s_aux", s);
-+ if (!parent_name) {
-+ clk = ERR_PTR(-ENOMEM);
- goto err_aux;
- }
-+ sec_mux_list[1].fw_name = parent_name;
-+ sec_mux_list[1].name = parent_name;
-+ } else {
-+ sec_mux_list[1].name = "apu_aux";
- }
-
- ret = devm_clk_hw_register(dev, &mux->hw);
-- if (ret)
-- goto unique_aux;
-+ if (ret) {
-+ clk = ERR_PTR(ret);
-+ goto err_clk;
-+ }
-+
-+ clk = &mux->hw;
-
- ret = krait_notifier_register(dev, mux->hw.clk, mux);
-- if (ret)
-- goto unique_aux;
-+ if (ret) {
-+ clk = ERR_PTR(ret);
-+ goto err_clk;
-+ }
-
- /* clk-krait ignore any rate change if mux is not flagged as enabled */
- if (id < 0)
-@@ -184,28 +216,29 @@ krait_add_sec_mux(struct device *dev, in
- else
- clk_prepare_enable(mux->hw.clk);
-
--unique_aux:
-+err_clk:
- if (unique_aux)
-- kfree(sec_mux_list[0]);
-+ kfree(parent_name);
- err_aux:
- kfree(init.name);
-- return ret;
-+ return clk;
- }
-
--static struct clk *
--krait_add_pri_mux(struct device *dev, int id, const char *s,
-- unsigned int offset)
-+static struct clk_hw *
-+krait_add_pri_mux(struct device *dev, struct clk_hw *hfpll_div, struct clk_hw *sec_mux,
-+ int id, const char *s, unsigned int offset)
- {
- int ret;
- struct krait_mux_clk *mux;
-- const char *p_names[3];
-+ static struct clk_parent_data p_data[3];
- struct clk_init_data init = {
-- .parent_names = p_names,
-- .num_parents = ARRAY_SIZE(p_names),
-+ .parent_data = p_data,
-+ .num_parents = ARRAY_SIZE(p_data),
- .ops = &krait_mux_clk_ops,
- .flags = CLK_SET_RATE_PARENT,
- };
-- struct clk *clk;
-+ struct clk_hw *clk;
-+ char *hfpll_name;
-
- mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
- if (!mux)
-@@ -223,55 +256,44 @@ krait_add_pri_mux(struct device *dev, in
- if (!init.name)
- return ERR_PTR(-ENOMEM);
-
-- p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s);
-- if (!p_names[0]) {
-+ hfpll_name = kasprintf(GFP_KERNEL, "hfpll%s", s);
-+ if (!hfpll_name) {
- clk = ERR_PTR(-ENOMEM);
-- goto err_p0;
-+ goto err_hfpll;
- }
-
-- p_names[1] = kasprintf(GFP_KERNEL, "hfpll%s_div", s);
-- if (!p_names[1]) {
-- clk = ERR_PTR(-ENOMEM);
-- goto err_p1;
-- }
-+ p_data[0].fw_name = hfpll_name;
-+ p_data[0].name = hfpll_name;
-
-- p_names[2] = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
-- if (!p_names[2]) {
-- clk = ERR_PTR(-ENOMEM);
-- goto err_p2;
-- }
-+ p_data[1].hw = hfpll_div;
-+ p_data[2].hw = sec_mux;
-
- ret = devm_clk_hw_register(dev, &mux->hw);
- if (ret) {
- clk = ERR_PTR(ret);
-- goto err_p3;
-+ goto err_clk;
- }
-
-- clk = mux->hw.clk;
-+ clk = &mux->hw;
-
-- ret = krait_notifier_register(dev, clk, mux);
-+ ret = krait_notifier_register(dev, mux->hw.clk, mux);
- if (ret)
- clk = ERR_PTR(ret);
-
--err_p3:
-- kfree(p_names[2]);
--err_p2:
-- kfree(p_names[1]);
--err_p1:
-- kfree(p_names[0]);
--err_p0:
-+err_clk:
-+ kfree(hfpll_name);
-+err_hfpll:
- kfree(init.name);
- return clk;
- }
-
- /* id < 0 for L2, otherwise id == physical CPU number */
--static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux)
-+static struct clk_hw *krait_add_clks(struct device *dev, int id, bool unique_aux)
- {
-- int ret;
-+ struct clk_hw *hfpll_div, *sec_mux, *pri_mux;
- unsigned int offset;
- void *p = NULL;
- const char *s;
-- struct clk *clk;
-
- if (id >= 0) {
- offset = 0x4501 + (0x1000 * id);
-@@ -283,22 +305,23 @@ static struct clk *krait_add_clks(struct
- s = "_l2";
- }
-
-- ret = krait_add_div(dev, id, s, offset);
-- if (ret) {
-- clk = ERR_PTR(ret);
-+ hfpll_div = krait_add_div(dev, id, s, offset);
-+ if (IS_ERR(hfpll_div)) {
-+ pri_mux = hfpll_div;
- goto err;
- }
-
-- ret = krait_add_sec_mux(dev, id, s, offset, unique_aux);
-- if (ret) {
-- clk = ERR_PTR(ret);
-+ sec_mux = krait_add_sec_mux(dev, id, s, offset, unique_aux);
-+ if (IS_ERR(sec_mux)) {
-+ pri_mux = sec_mux;
- goto err;
- }
-
-- clk = krait_add_pri_mux(dev, id, s, offset);
-+ pri_mux = krait_add_pri_mux(dev, hfpll_div, sec_mux, id, s, offset);
-+
- err:
- kfree(p);
-- return clk;
-+ return pri_mux;
- }
-
- static struct clk *krait_of_get(struct of_phandle_args *clkspec, void *data)
-@@ -306,7 +329,7 @@ static struct clk *krait_of_get(struct o
- unsigned int idx = clkspec->args[0];
- struct clk **clks = data;
-
-- if (idx >= 5) {
-+ if (idx >= clks_max) {
- pr_err("%s: invalid clock index %d\n", __func__, idx);
- return ERR_PTR(-EINVAL);
- }
-@@ -327,9 +350,8 @@ static int krait_cc_probe(struct platfor
- const struct of_device_id *id;
- unsigned long cur_rate, aux_rate;
- int cpu;
-- struct clk *clk;
-- struct clk **clks;
-- struct clk *l2_pri_mux_clk;
-+ struct clk_hw *mux, *l2_pri_mux;
-+ struct clk *clk, **clks;
-
- id = of_match_device(krait_cc_match_table, dev);
- if (!id)
-@@ -348,21 +370,21 @@ static int krait_cc_probe(struct platfor
- }
-
- /* Krait configurations have at most 4 CPUs and one L2 */
-- clks = devm_kcalloc(dev, 5, sizeof(*clks), GFP_KERNEL);
-+ clks = devm_kcalloc(dev, clks_max, sizeof(*clks), GFP_KERNEL);
- if (!clks)
- return -ENOMEM;
-
- for_each_possible_cpu(cpu) {
-- clk = krait_add_clks(dev, cpu, id->data);
-+ mux = krait_add_clks(dev, cpu, id->data);
- if (IS_ERR(clk))
- return PTR_ERR(clk);
-- clks[cpu] = clk;
-+ clks[cpu] = mux->clk;
- }
-
-- l2_pri_mux_clk = krait_add_clks(dev, -1, id->data);
-- if (IS_ERR(l2_pri_mux_clk))
-- return PTR_ERR(l2_pri_mux_clk);
-- clks[4] = l2_pri_mux_clk;
-+ l2_pri_mux = krait_add_clks(dev, -1, id->data);
-+ if (IS_ERR(l2_pri_mux))
-+ return PTR_ERR(l2_pri_mux);
-+ clks[l2_mux] = l2_pri_mux->clk;
-
- /*
- * We don't want the CPU or L2 clocks to be turned off at late init
-@@ -372,7 +394,7 @@ static int krait_cc_probe(struct platfor
- * they take over.
- */
- for_each_online_cpu(cpu) {
-- clk_prepare_enable(l2_pri_mux_clk);
-+ clk_prepare_enable(clks[l2_mux]);
- WARN(clk_prepare_enable(clks[cpu]),
- "Unable to turn on CPU%d clock", cpu);
- }
-@@ -388,16 +410,16 @@ static int krait_cc_probe(struct platfor
- * two different rates to force a HFPLL reinit under all
- * circumstances.
- */
-- cur_rate = clk_get_rate(l2_pri_mux_clk);
-+ cur_rate = clk_get_rate(clks[l2_mux]);
- aux_rate = 384000000;
- if (cur_rate < aux_rate) {
- pr_info("L2 @ Undefined rate. Forcing new rate.\n");
- cur_rate = aux_rate;
- }
-- clk_set_rate(l2_pri_mux_clk, aux_rate);
-- clk_set_rate(l2_pri_mux_clk, 2);
-- clk_set_rate(l2_pri_mux_clk, cur_rate);
-- pr_info("L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000);
-+ clk_set_rate(clks[l2_mux], aux_rate);
-+ clk_set_rate(clks[l2_mux], 2);
-+ clk_set_rate(clks[l2_mux], cur_rate);
-+ pr_info("L2 @ %lu KHz\n", clk_get_rate(clks[l2_mux]) / 1000);
- for_each_possible_cpu(cpu) {
- clk = clks[cpu];
- cur_rate = clk_get_rate(clk);
+++ /dev/null
-From c9713e4ede1e5d044b64fe4d3cbb84223625637f Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Tue, 25 Oct 2022 01:38:17 +0200
-Subject: [PATCH] ARM: dts: qcom: ipq8064: disable mmc-ddr-1_8v for sdcc1
-
-It was reported non working mmc with this option enabled.
-Both mmc for ipq8064 are supplied by a fixed 3.3v regulator so mmc can't
-be run at 1.8v.
-Disable it to restore correct functionality of this SoC feature.
-
-Tested-by: Hendrik Koerner <koerhen@web.de>
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Link: https://lore.kernel.org/r/20221024233817.27410-1-ansuelsmth@gmail.com
----
- arch/arm/boot/dts/qcom-ipq8064.dtsi | 1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-@@ -932,7 +932,6 @@
- non-removable;
- cap-sd-highspeed;
- cap-mmc-highspeed;
-- mmc-ddr-1_8v;
- vmmc-supply = <&vsdcc_fixed>;
- dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
- dma-names = "tx", "rx";
projects / openwrt / staging / jow.git / commitdiff