cpus: denver: reset power state to 'C1' on boot

Denver CPUs expect the power state field to be reset to 'C1'
during boot. This patch updates the reset handler to reset the
ACTLR_.PMSTATE field to 'C1' state during CPU boot.

Change-Id: I7cb629627a4dd1a30ec5cbb3a5e90055244fe30c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

diff --git a/include/lib/cpus/aarch64/denver.h b/include/lib/cpus/aarch64/denver.h
index d8c4d2e7907575fce577f812f6f2db80a08717a8..f145fbb590faccac6626556020030af46ca0d5e9 100644 (file)
--- a/include/lib/cpus/aarch64/denver.h
+++ b/include/lib/cpus/aarch64/denver.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -20,6 +20,12 @@
 /* CPU state ids - implementation defined */
 #define DENVER_CPU_STATE_POWER_DOWN    U(0x3)
 
+/* Core power management states */
+#define DENVER_CPU_PMSTATE_C1          U(0x1)
+#define DENVER_CPU_PMSTATE_C6          U(0x6)
+#define DENVER_CPU_PMSTATE_C7          U(0x7)
+#define DENVER_CPU_PMSTATE_MASK                U(0xF)
+
 #ifndef __ASSEMBLY__
 
 /* Disable Dynamic Code Optimisation */

diff --git a/lib/cpus/aarch64/denver.S b/lib/cpus/aarch64/denver.S
index caf74d7b9c4f0faafc1a6d16042c35b508974b94..c873f2e3ee67d440930d750d934754c70f007f12 100644 (file)
--- a/lib/cpus/aarch64/denver.S
+++ b/lib/cpus/aarch64/denver.S
@@ -236,6 +236,15 @@ func denver_reset_func
        msr     vbar_el3, x0
 #endif
 
+       /* ----------------------------------------------------
+        * Reset ACTLR.PMSTATE to C1 state
+        * ----------------------------------------------------
+        */
+       mrs     x0, actlr_el1
+       bic     x0, x0, #DENVER_CPU_PMSTATE_MASK
+       orr     x0, x0, #DENVER_CPU_PMSTATE_C1
+       msr     actlr_el1, x0
+
        /* ----------------------------------------------------
         * Enable dynamic code optimizer (DCO)
         * ----------------------------------------------------