AXS10x: add spi flash support
authorEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Fri, 8 Jun 2018 15:52:14 +0000 (18:52 +0300)
committerAlexey Brodkin <abrodkin@synopsys.com>
Tue, 31 Jul 2018 04:49:47 +0000 (07:49 +0300)
AXS10x boards have n25q512 spi flash IC, so add corresponding
nodes to device tree and enaple corresponding options in
defconfig.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
arch/arc/dts/axs10x_mb.dtsi
configs/axs101_defconfig
configs/axs103_defconfig

index 3855a34dc20a905d049de511084657b6493a079a..dfc03810ca0d75e46f9ca0849a25a61183cc3503 100644 (file)
@@ -4,6 +4,10 @@
  */
 
 / {
+       aliases {
+               spi0 = &spi0;
+       };
+
        axs10x_mb@e0000000 {
                compatible = "simple-bus";
                #address-cells = <1>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                };
+
+               spi0: spi@0 {
+                       compatible = "snps,dw-apb-ssi";
+                       reg = <0x0 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       spi-max-frequency = <4000000>;
+                       clocks = <&apbclk>;
+                       clock-names = "spi_clk";
+                       cs-gpio = <&cs_gpio 0>;
+                       spi_flash@0 {
+                               compatible = "spi-flash";
+                               reg = <0>;
+                               spi-max-frequency = <4000000>;
+                       };
+               };
+
+               cs_gpio: gpio@11218 {
+                       compatible = "snps,creg-gpio";
+                       reg = <0x11218 0x4>;
+                       gpio-controller;
+                       #gpio-cells = <1>;
+                       gpio-bank-name = "axs-spi-cs";
+                       gpio-count = <1>;
+                       gpio-first-shift = <0>;
+                       gpio-bit-per-line = <2>;
+                       gpio-activate-val = <1>;
+                       gpio-deactivate-val = <3>;
+                       gpio-default-val = <1>;
+               };
        };
 };
index d056719e14eb1be464636236f4cf87741558b19e..a981398cb51a7fb640d2a035d61645a801bea481 100644 (file)
@@ -15,6 +15,8 @@ CONFIG_SYS_PROMPT="AXS# "
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y
@@ -30,8 +32,15 @@ CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
+CONFIG_DM_GPIO=y
+CONFIG_HSDK_CREG_GPIO=y
 CONFIG_MMC=y
 CONFIG_MMC_DW=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_MTD=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
@@ -39,6 +48,9 @@ CONFIG_DM_SERIAL=y
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_DESIGNWARE_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
index f0fccf4d9f8b4cd357a5a72c85f6e9de2d042947..e524e6a9c67f361e087503d8936979484a6568a1 100644 (file)
@@ -15,6 +15,8 @@ CONFIG_SYS_PROMPT="AXS# "
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y
@@ -30,8 +32,15 @@ CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
+CONFIG_DM_GPIO=y
+CONFIG_HSDK_CREG_GPIO=y
 CONFIG_MMC=y
 CONFIG_MMC_DW=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_MTD=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
@@ -39,6 +48,9 @@ CONFIG_DM_SERIAL=y
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_DESIGNWARE_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_OHCI_HCD=y