drm/nouveau/fifo/gk104-: fix parsing of mmu fault data
authorBen Skeggs <bskeggs@redhat.com>
Thu, 13 Jun 2019 04:23:04 +0000 (14:23 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 23 Aug 2019 02:55:32 +0000 (12:55 +1000)
Pascal was particularly incorrect, as the register changed to be more in the
same format as the MMU fault buffers are.

Shouldn't have impacted much more than confusing MMU fault log messages.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk110.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk208.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk20a.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm200.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm20b.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp100.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp10b.c

index ac9abcc1470ae400d57868cad346b605290c1852..5d4b695cab8e5840e3e81d4890b72ab2457ddefc 100644 (file)
@@ -646,31 +646,6 @@ gk104_fifo_intr_dropped_fault(struct gk104_fifo *fifo)
        nvkm_error(subdev, "DROPPED_MMU_FAULT %08x\n", stat);
 }
 
-static void
-gk104_fifo_intr_fault(struct gk104_fifo *fifo, int unit)
-{
-       struct nvkm_subdev *subdev = &fifo->base.engine.subdev;
-       struct nvkm_device *device = subdev->device;
-       u32 inst = nvkm_rd32(device, 0x002800 + (unit * 0x10));
-       u32 valo = nvkm_rd32(device, 0x002804 + (unit * 0x10));
-       u32 vahi = nvkm_rd32(device, 0x002808 + (unit * 0x10));
-       u32 type = nvkm_rd32(device, 0x00280c + (unit * 0x10));
-       struct nvkm_fault_data info;
-
-       info.inst   =  (u64)inst << 12;
-       info.addr   = ((u64)vahi << 32) | valo;
-       info.time   = 0;
-       info.engine = unit;
-       info.valid  = 1;
-       info.gpc    = (type & 0x1f000000) >> 24;
-       info.client = (type & 0x00001f00) >> 8;
-       info.access = (type & 0x00000080) >> 7;
-       info.hub    = (type & 0x00000040) >> 6;
-       info.reason = (type & 0x0000001f);
-
-       nvkm_fifo_fault(&fifo->base, &info);
-}
-
 static const struct nvkm_bitfield gk104_fifo_pbdma_intr_0[] = {
        { 0x00000001, "MEMREQ" },
        { 0x00000002, "MEMACK_TIMEOUT" },
@@ -849,7 +824,7 @@ gk104_fifo_intr(struct nvkm_fifo *base)
                u32 mask = nvkm_rd32(device, 0x00259c);
                while (mask) {
                        u32 unit = __ffs(mask);
-                       gk104_fifo_intr_fault(fifo, unit);
+                       fifo->func->intr.fault(&fifo->base, unit);
                        nvkm_wr32(device, 0x00259c, (1 << unit));
                        mask &= ~(1 << unit);
                }
@@ -1204,6 +1179,7 @@ gk104_fifo_fault_gpcclient[] = {
 
 static const struct gk104_fifo_func
 gk104_fifo = {
+       .intr.fault = gf100_fifo_intr_fault,
        .pbdma = &gk104_fifo_pbdma,
        .fault.access = gk104_fifo_fault_access,
        .fault.engine = gk104_fifo_fault_engine,
index c33f4593cbc688c73e4ad79751795f6281cffdc7..6407a4a174cf7d6f52b8d20b4393fc01b8fa686a 100644 (file)
@@ -45,6 +45,10 @@ struct gk104_fifo {
 };
 
 struct gk104_fifo_func {
+       struct {
+               void (*fault)(struct nvkm_fifo *, int unit);
+       } intr;
+
        const struct gk104_fifo_pbdma_func {
                int (*nr)(struct gk104_fifo *);
                void (*init)(struct gk104_fifo *);
@@ -110,12 +114,14 @@ void gk110_fifo_runlist_cgrp(struct nvkm_fifo_cgrp *,
 extern const struct gk104_fifo_pbdma_func gk208_fifo_pbdma;
 void gk208_fifo_pbdma_init_timeout(struct gk104_fifo *);
 
+void gm107_fifo_intr_fault(struct nvkm_fifo *, int);
 extern const struct nvkm_enum gm107_fifo_fault_engine[];
 extern const struct gk104_fifo_runlist_func gm107_fifo_runlist;
 
 extern const struct gk104_fifo_pbdma_func gm200_fifo_pbdma;
 int gm200_fifo_pbdma_nr(struct gk104_fifo *);
 
+void gp100_fifo_intr_fault(struct nvkm_fifo *, int);
 extern const struct nvkm_enum gp100_fifo_fault_engine[];
 
 extern const struct nvkm_enum gv100_fifo_fault_access[];
index 8adfa6b182cbab9b703bee09a9bdb89014fa7656..f820969e4405df8908298bcef62d2a928f74b1c5 100644 (file)
@@ -48,6 +48,7 @@ gk110_fifo_runlist = {
 
 static const struct gk104_fifo_func
 gk110_fifo = {
+       .intr.fault = gf100_fifo_intr_fault,
        .pbdma = &gk104_fifo_pbdma,
        .fault.access = gk104_fifo_fault_access,
        .fault.engine = gk104_fifo_fault_engine,
index 9553fb4af601f033e37b6bdc8878bf9fa6e9f727..2f54787b5fd0b4285d021514f41ab0541b5e2225 100644 (file)
@@ -45,6 +45,7 @@ gk208_fifo_pbdma = {
 
 static const struct gk104_fifo_func
 gk208_fifo = {
+       .intr.fault = gf100_fifo_intr_fault,
        .pbdma = &gk208_fifo_pbdma,
        .fault.access = gk104_fifo_fault_access,
        .fault.engine = gk104_fifo_fault_engine,
index a4c6ac3cd6c70a1e8d5cef24e01ea33f5c30b871..a814c4e0ed3e5ebff69518833d54dc6a92407394 100644 (file)
@@ -26,6 +26,7 @@
 
 static const struct gk104_fifo_func
 gk20a_fifo = {
+       .intr.fault = gf100_fifo_intr_fault,
        .pbdma = &gk208_fifo_pbdma,
        .fault.access = gk104_fifo_fault_access,
        .fault.engine = gk104_fifo_fault_engine,
index acf230764cb0bb966e915d6826e8ddeb4561f2e0..c2a2e4572f6cb1a54d6f8ccd673f08dc1e813ce3 100644 (file)
@@ -25,6 +25,7 @@
 #include "changk104.h"
 
 #include <core/gpuobj.h>
+#include <subdev/fault.h>
 
 #include <nvif/class.h>
 
@@ -67,8 +68,33 @@ gm107_fifo_fault_engine[] = {
        {}
 };
 
+void
+gm107_fifo_intr_fault(struct nvkm_fifo *fifo, int unit)
+{
+       struct nvkm_device *device = fifo->engine.subdev.device;
+       u32 inst = nvkm_rd32(device, 0x002800 + (unit * 0x10));
+       u32 valo = nvkm_rd32(device, 0x002804 + (unit * 0x10));
+       u32 vahi = nvkm_rd32(device, 0x002808 + (unit * 0x10));
+       u32 type = nvkm_rd32(device, 0x00280c + (unit * 0x10));
+       struct nvkm_fault_data info;
+
+       info.inst   =  (u64)inst << 12;
+       info.addr   = ((u64)vahi << 32) | valo;
+       info.time   = 0;
+       info.engine = unit;
+       info.valid  = 1;
+       info.gpc    = (type & 0x1f000000) >> 24;
+       info.client = (type & 0x00003f00) >> 8;
+       info.access = (type & 0x00000080) >> 7;
+       info.hub    = (type & 0x00000040) >> 6;
+       info.reason = (type & 0x0000000f);
+
+       nvkm_fifo_fault(fifo, &info);
+}
+
 static const struct gk104_fifo_func
 gm107_fifo = {
+       .intr.fault = gm107_fifo_intr_fault,
        .pbdma = &gk208_fifo_pbdma,
        .fault.access = gk104_fifo_fault_access,
        .fault.engine = gm107_fifo_fault_engine,
index b96c1c5d6577f0a12a1494077fef43d76ba23cfe..b8cfe3b28c4fd5302a682b41bd6314667d39df93 100644 (file)
@@ -42,6 +42,7 @@ gm200_fifo_pbdma = {
 
 static const struct gk104_fifo_func
 gm200_fifo = {
+       .intr.fault = gm107_fifo_intr_fault,
        .pbdma = &gm200_fifo_pbdma,
        .fault.access = gk104_fifo_fault_access,
        .fault.engine = gm107_fifo_fault_engine,
index a49539b9e4ec328f24d7d3b1e4aa798b19ae92c2..70b4feebc1faca571b0db72e3bcc4844439a16cc 100644 (file)
@@ -26,6 +26,7 @@
 
 static const struct gk104_fifo_func
 gm20b_fifo = {
+       .intr.fault = gm107_fifo_intr_fault,
        .pbdma = &gm200_fifo_pbdma,
        .fault.access = gk104_fifo_fault_access,
        .fault.engine = gm107_fifo_fault_engine,
index 54377e0f6a88fb1957beca80c28e062dab08009c..2c7a0176b3c840a13a3e50742cb460d1f0bd58f8 100644 (file)
@@ -24,6 +24,8 @@
 #include "gk104.h"
 #include "changk104.h"
 
+#include <subdev/fault.h>
+
 #include <nvif/class.h>
 
 const struct nvkm_enum
@@ -50,8 +52,33 @@ gp100_fifo_fault_engine[] = {
        {}
 };
 
+void
+gp100_fifo_intr_fault(struct nvkm_fifo *fifo, int unit)
+{
+       struct nvkm_device *device = fifo->engine.subdev.device;
+       u32 inst = nvkm_rd32(device, 0x002800 + (unit * 0x10));
+       u32 valo = nvkm_rd32(device, 0x002804 + (unit * 0x10));
+       u32 vahi = nvkm_rd32(device, 0x002808 + (unit * 0x10));
+       u32 type = nvkm_rd32(device, 0x00280c + (unit * 0x10));
+       struct nvkm_fault_data info;
+
+       info.inst   =  (u64)inst << 12;
+       info.addr   = ((u64)vahi << 32) | valo;
+       info.time   = 0;
+       info.engine = unit;
+       info.valid  = 1;
+       info.gpc    = (type & 0x1f000000) >> 24;
+       info.hub    = (type & 0x00100000) >> 20;
+       info.access = (type & 0x00070000) >> 16;
+       info.client = (type & 0x00007f00) >> 8;
+       info.reason = (type & 0x0000001f);
+
+       nvkm_fifo_fault(fifo, &info);
+}
+
 static const struct gk104_fifo_func
 gp100_fifo = {
+       .intr.fault = gp100_fifo_intr_fault,
        .pbdma = &gm200_fifo_pbdma,
        .fault.access = gk104_fifo_fault_access,
        .fault.engine = gp100_fifo_fault_engine,
index 778ba7e46fb36f1d10ea48d9c651df2a2bd7520a..8c65ad4feedbeb0bbf1bb5c44369a415672c5267 100644 (file)
@@ -26,6 +26,7 @@
 
 static const struct gk104_fifo_func
 gp10b_fifo = {
+       .intr.fault = gp100_fifo_intr_fault,
        .pbdma = &gm200_fifo_pbdma,
        .fault.access = gk104_fifo_fault_access,
        .fault.engine = gp100_fifo_fault_engine,