edma_netdev[i]->max_mtu = 9000;
edma_netdev[i]->features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM
| NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_SG |
- NETIF_F_TSO | NETIF_F_GRO;
+ NETIF_F_TSO | NETIF_F_GRO | NETIF_F_HW_VLAN_CTAG_TX;
edma_netdev[i]->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
NETIF_F_HW_VLAN_CTAG_RX
| NETIF_F_SG | NETIF_F_TSO | NETIF_F_GRO;
edma_netdev[i]->wanted_features = NETIF_F_HW_CSUM | NETIF_F_SG |
NETIF_F_TSO | NETIF_F_GRO;
- if (of_property_read_bool(np, "qcom,single-phy") && edma_cinfo->num_gmac == 1)
- edma_netdev[i]->features |= NETIF_F_HW_VLAN_CTAG_TX;
-
#ifdef CONFIG_RFS_ACCEL
- edma_netdev[i]->features |= NETIF_F_NTUPLE;
- edma_netdev[i]->hw_features |= NETIF_F_NTUPLE;
- edma_netdev[i]->vlan_features |= NETIF_F_NTUPLE;
- edma_netdev[i]->wanted_features |= NETIF_F_NTUPLE;
- if (of_property_read_bool(np, "qcom,single-phy") && edma_cinfo->num_gmac == 1) {
- edma_netdev[i]->features |= NETIF_F_RXHASH;
- edma_netdev[i]->hw_features |= NETIF_F_RXHASH;
- edma_netdev[i]->vlan_features |= NETIF_F_RXHASH;
- edma_netdev[i]->wanted_features |= NETIF_F_RXHASH;
- }
+ edma_netdev[i]->features |= NETIF_F_NTUPLE | NETIF_F_RXHASH;
+ edma_netdev[i]->hw_features |= NETIF_F_NTUPLE | NETIF_F_RXHASH;
+ edma_netdev[i]->vlan_features |= NETIF_F_NTUPLE | NETIF_F_RXHASH;
+ edma_netdev[i]->wanted_features |= NETIF_F_NTUPLE | NETIF_F_RXHASH;
#endif
edma_set_ethtool_ops(edma_netdev[i]);
ar40xx_rmw(priv, AR40XX_REG_PORT_STATUS(port),
AR40XX_PORT_AUTO_LINK_EN, 0);
- /* CPU port is setting headers to limit output ports */
- if (port == 0)
- ar40xx_write(priv, AR40XX_REG_PORT_HEADER(port), 0x8);
- else
- ar40xx_write(priv, AR40XX_REG_PORT_HEADER(port), 0);
+ ar40xx_write(priv, AR40XX_REG_PORT_HEADER(port), 0);
ar40xx_write(priv, AR40XX_REG_PORT_VLAN0(port), 0);
t = (AR40XX_PORT0_FC_THRESH_ON_DFLT << 16) |
AR40XX_PORT0_FC_THRESH_OFF_DFLT;
ar40xx_write(priv, AR40XX_REG_PORT_FLOWCTRL_THRESH(0), t);
-
- /* set service tag to 802.1q */
- t = ETH_P_8021Q | AR40XX_ESS_SERVICE_TAG_STAG;
- ar40xx_write(priv, AR40XX_ESS_SERVICE_TAG, t);
}
static void
u32 pvid = priv->vlan_id[priv->pvid[port]];
if (priv->vlan) {
- if (priv->vlan_tagged & BIT(port))
- egress = AR40XX_PORT_VLAN1_OUT_MODE_TAG;
- else
- egress = AR40XX_PORT_VLAN1_OUT_MODE_UNMOD;
+ egress = AR40XX_PORT_VLAN1_OUT_MODE_UNMOD;
ingress = AR40XX_IN_SECURE;
} else {
t |= pvid << AR40XX_PORT_VLAN0_DEF_CVID_S;
ar40xx_write(priv, AR40XX_REG_PORT_VLAN0(port), t);
- t = egress << AR40XX_PORT_VLAN1_OUT_MODE_S;
-
- /* set CPU port to core port */
- if (port == 0)
- t |= AR40XX_PORT_VLAN1_CORE_PORT;
-
- if (priv->vlan_tagged & BIT(port))
- t |= AR40XX_PORT_VLAN1_PORT_VLAN_PROP;
- else
- t |= AR40XX_PORT_VLAN1_PORT_TLS_MODE;
+ t = AR40XX_PORT_VLAN1_PORT_VLAN_PROP;
+ t |= egress << AR40XX_PORT_VLAN1_OUT_MODE_S;
ar40xx_write(priv, AR40XX_REG_PORT_VLAN1(port), t);