The upstream mtk-sd driver did not perform specific timing
optimization for MT762x series SoC, hence the SDHC peripheral
of some boards cannot run at too high frequency. Reduce the
maximum clock frequency to fix the mmc read/write error.
Closes: https://github.com/openwrt/openwrt/issues/17364
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Link: https://github.com/openwrt/openwrt/pull/17375
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit
de0c143742517d401c4730137f092be8fb7e882a)
interrupt-parent = <&intc>;
interrupts = <14>;
- max-frequency = <48000000>;
+ max-frequency = <24000000>;
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&sdhci_pins>;
};
};
-&sdhci {
- max-frequency = <24000000>;
-};
-
&wmac {
pinctrl-names = "default", "pa_gpio";
pinctrl-0 = <&pa_pins>;
interrupt-parent = <&intc>;
interrupts = <14>;
- max-frequency = <48000000>;
+ max-frequency = <24000000>;
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&sdxc_pins>;