dt-bindings: power: Add r8a774c0 SYSC power domain definitions
authorFabrizio Castro <fabrizio.castro@bp.renesas.com>
Mon, 10 Sep 2018 14:41:26 +0000 (15:41 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Fri, 14 Sep 2018 13:28:41 +0000 (15:28 +0200)
This patch adds power domain indices for RZ/G2E.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
include/dt-bindings/power/r8a774c0-sysc.h [new file with mode: 0644]

diff --git a/include/dt-bindings/power/r8a774c0-sysc.h b/include/dt-bindings/power/r8a774c0-sysc.h
new file mode 100644 (file)
index 0000000..9922d4c
--- /dev/null
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A774C0_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A774C0_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A774C0_PD_CA53_CPU0          5
+#define R8A774C0_PD_CA53_CPU1          6
+#define R8A774C0_PD_A3VC               14
+#define R8A774C0_PD_3DG_A              17
+#define R8A774C0_PD_3DG_B              18
+#define R8A774C0_PD_CA53_SCU           21
+#define R8A774C0_PD_A2VC1              26
+
+/* Always-on power area */
+#define R8A774C0_PD_ALWAYS_ON          32
+
+#endif /* __DT_BINDINGS_POWER_R8A774C0_SYSC_H__ */