The gpio register mappings are different among blackfin processors.
Signed-off-by: Steven Miao <realmz6@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
SEXTRA := start.o
SOBJS := interrupt.o cache.o
COBJS-y += cpu.o
-COBJS-$(CONFIG_ADI_GPIO1) += gpio.o
+COBJS-y += gpio.o
COBJS-y += interrupts.o
COBJS-$(CONFIG_JTAG_CONSOLE) += jtag-console.o
COBJS-y += os_log.o
#include <asm/gpio.h>
#include <asm/portmux.h>
+#ifdef CONFIG_ADI_GPIO1
#if ANOMALY_05000311 || ANOMALY_05000323
enum {
AWA_data = SYSCR,
continue;
}
}
+#else
+struct gpio_port_t * const gpio_array[] = {
+ (struct gpio_port_t *)PORTA_FER,
+ (struct gpio_port_t *)PORTB_FER,
+ (struct gpio_port_t *)PORTC_FER,
+ (struct gpio_port_t *)PORTD_FER,
+ (struct gpio_port_t *)PORTE_FER,
+ (struct gpio_port_t *)PORTF_FER,
+ (struct gpio_port_t *)PORTG_FER,
+#if defined(CONFIG_BF54x)
+ (struct gpio_port_t *)PORTH_FER,
+ (struct gpio_port_t *)PORTI_FER,
+ (struct gpio_port_t *)PORTJ_FER,
+#endif
+};
+#endif
#define __ARCH_BLACKFIN_GPIO_H__
#include <asm-generic/gpio.h>
+#include <asm/portmux.h>
#define gpio_bank(x) ((x) >> 4)
#define gpio_bit(x) (1<<((x) & 0xF))
unsigned short dummy16;
unsigned short inen;
};
+#else
+extern struct gpio_port_t * const gpio_array[];
#endif
#ifdef ADI_SPECIAL_GPIO_BANKS
#include <common.h>
#include <asm/errno.h>
#include <asm/gpio.h>
-#include <asm/portmux.h>
-
-static struct gpio_port_t * const gpio_array[] = {
- (struct gpio_port_t *)PORTA_FER,
- (struct gpio_port_t *)PORTB_FER,
- (struct gpio_port_t *)PORTC_FER,
- (struct gpio_port_t *)PORTD_FER,
- (struct gpio_port_t *)PORTE_FER,
- (struct gpio_port_t *)PORTF_FER,
- (struct gpio_port_t *)PORTG_FER,
-#if defined(CONFIG_BF54x)
- (struct gpio_port_t *)PORTH_FER,
- (struct gpio_port_t *)PORTI_FER,
- (struct gpio_port_t *)PORTJ_FER,
-#endif
-};
#define RESOURCE_LABEL_SIZE 16
else
gpio_array[gpio_bank(gpio)]->port_fer_set = gpio_bit(gpio);
#endif
- SSYNC();
}
inline void portmux_setup(unsigned short per)