-LINUX_VERSION-5.15 = .60
-LINUX_KERNEL_HASH-5.15.60 = 2d9545f7c96faffd8407522011b9533adefd1360118494dfb6c862f2f15e237a
+LINUX_VERSION-5.15 = .62
+LINUX_KERNEL_HASH-5.15.62 = 06817cde8e57cdb6dbf20eaa5122fee110024f6e8b783799c98cb65dc753f141
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1740,7 +1740,7 @@ static irqreturn_t vc4_cec_irq_handler(i
+@@ -1748,7 +1748,7 @@ static irqreturn_t vc4_cec_irq_handler(i
return ret;
}
{
struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
/* clock period in microseconds */
-@@ -1753,38 +1753,53 @@ static int vc4_hdmi_cec_adap_enable(stru
+@@ -1761,38 +1761,53 @@ static int vc4_hdmi_cec_adap_enable(stru
val |= ((4700 / usecs) << VC4_HDMI_CEC_CNT_TO_4700_US_SHIFT) |
((4500 / usecs) << VC4_HDMI_CEC_CNT_TO_4500_US_SHIFT);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1745,8 +1745,14 @@ static int vc4_hdmi_cec_enable(struct ce
+@@ -1753,8 +1753,14 @@ static int vc4_hdmi_cec_enable(struct ce
struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
/* clock period in microseconds */
const u32 usecs = 1000000 / CEC_CLOCK_FREQ;
val &= ~(VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET |
VC4_HDMI_CEC_CNT_TO_4700_US_MASK |
VC4_HDMI_CEC_CNT_TO_4500_US_MASK);
-@@ -1789,6 +1795,8 @@ static int vc4_hdmi_cec_disable(struct c
+@@ -1797,6 +1803,8 @@ static int vc4_hdmi_cec_disable(struct c
HDMI_WRITE(HDMI_CEC_CNTRL_5, HDMI_READ(HDMI_CEC_CNTRL_5) |
VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET);
#include "vc4_hdmi.h"
#define VC4_HDMI_PACKET_STRIDE 0x24
-@@ -412,6 +414,8 @@ static inline u32 vc4_hdmi_read(struct v
+@@ -415,6 +417,8 @@ static inline u32 vc4_hdmi_read(struct v
const struct vc4_hdmi_variant *variant = hdmi->variant;
void __iomem *base;
if (reg >= variant->num_registers) {
dev_warn(&hdmi->pdev->dev,
"Invalid register ID %u\n", reg);
-@@ -438,6 +442,8 @@ static inline void vc4_hdmi_write(struct
+@@ -441,6 +445,8 @@ static inline void vc4_hdmi_write(struct
const struct vc4_hdmi_variant *variant = hdmi->variant;
void __iomem *base;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -176,8 +176,6 @@ vc4_hdmi_connector_detect(struct drm_con
- if (vc4_hdmi->hpd_gpio &&
- gpiod_get_value_cansleep(vc4_hdmi->hpd_gpio)) {
- connected = true;
+@@ -179,8 +179,6 @@ vc4_hdmi_connector_detect(struct drm_con
+ if (vc4_hdmi->hpd_gpio) {
+ if (gpiod_get_value_cansleep(vc4_hdmi->hpd_gpio))
+ connected = true;
- } else if (drm_probe_ddc(vc4_hdmi->ddc)) {
- connected = true;
} else if (HDMI_READ(HDMI_HOTPLUG) & VC4_HDMI_HOTPLUG_CONNECTED) {
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -2378,7 +2378,7 @@ static const struct vc4_hdmi_variant bcm
+@@ -2386,7 +2386,7 @@ static const struct vc4_hdmi_variant bcm
.encoder_type = VC4_ENCODER_TYPE_HDMI0,
.debugfs_name = "hdmi0_regs",
.card_name = "vc4-hdmi-0",
+++ /dev/null
-From b460aee2dab3419842e24e7039a52d613b19a6e8 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime@cerno.tech>
-Date: Mon, 25 Oct 2021 17:28:55 +0200
-Subject: [PATCH] drm/vc4: hdmi: Fix HPD GPIO detection
-
-Prior to commit 6800234ceee0 ("drm/vc4: hdmi: Convert to gpiod"), in the
-detect hook, if we had an HPD GPIO we would only rely on it and return
-whatever state it was in.
-
-However, that commit changed that by mistake to only consider the case
-where we have a GPIO and it returns a logical high, and would fall back
-to the other methods otherwise.
-
-Since we can read the EDIDs when the HPD signal is low on some displays,
-we changed the detection status from disconnected to connected, and we
-would ignore an HPD pulse.
-
-Fixes: 6800234ceee0 ("drm/vc4: hdmi: Convert to gpiod")
-Signed-off-by: Maxime Ripard <maxime@cerno.tech>
-Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Link: https://lore.kernel.org/r/20211025152903.1088803-3-maxime@cerno.tech
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -173,9 +173,9 @@ vc4_hdmi_connector_detect(struct drm_con
-
- WARN_ON(pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev));
-
-- if (vc4_hdmi->hpd_gpio &&
-- gpiod_get_value_cansleep(vc4_hdmi->hpd_gpio)) {
-- connected = true;
-+ if (vc4_hdmi->hpd_gpio) {
-+ if (gpiod_get_value_cansleep(vc4_hdmi->hpd_gpio))
-+ connected = true;
- } else if (HDMI_READ(HDMI_HOTPLUG) & VC4_HDMI_HOTPLUG_CONNECTED) {
- connected = true;
- }
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -119,6 +119,10 @@ static int vc4_hdmi_debugfs_regs(struct
+@@ -122,6 +122,10 @@ static int vc4_hdmi_debugfs_regs(struct
static void vc4_hdmi_reset(struct vc4_hdmi *vc4_hdmi)
{
HDMI_WRITE(HDMI_M_CTL, VC4_HD_M_SW_RST);
udelay(1);
HDMI_WRITE(HDMI_M_CTL, 0);
-@@ -130,24 +134,36 @@ static void vc4_hdmi_reset(struct vc4_hd
+@@ -133,24 +137,36 @@ static void vc4_hdmi_reset(struct vc4_hd
VC4_HDMI_SW_RESET_FORMAT_DETECT);
HDMI_WRITE(HDMI_SW_RESET_CONTROL, 0);
value = HDMI_READ(HDMI_CEC_CNTRL_1);
value &= ~VC4_HDMI_CEC_DIV_CLK_CNT_MASK;
-@@ -155,9 +171,11 @@ static void vc4_hdmi_cec_update_clk_div(
+@@ -158,9 +174,11 @@ static void vc4_hdmi_cec_update_clk_div(
* Set the clock divider: the hsm_clock rate and this divider
* setting will give a 40 kHz CEC clock.
*/
}
#else
static void vc4_hdmi_cec_update_clk_div(struct vc4_hdmi *vc4_hdmi) {}
-@@ -176,8 +194,16 @@ vc4_hdmi_connector_detect(struct drm_con
+@@ -179,8 +197,16 @@ vc4_hdmi_connector_detect(struct drm_con
if (vc4_hdmi->hpd_gpio) {
if (gpiod_get_value_cansleep(vc4_hdmi->hpd_gpio))
connected = true;
}
if (connected) {
-@@ -371,9 +397,12 @@ static int vc4_hdmi_stop_packet(struct d
+@@ -374,9 +400,12 @@ static int vc4_hdmi_stop_packet(struct d
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
u32 packet_id = type - 0x80;
if (!poll)
return 0;
-@@ -393,6 +422,7 @@ static void vc4_hdmi_write_infoframe(str
+@@ -396,6 +425,7 @@ static void vc4_hdmi_write_infoframe(str
void __iomem *base = __vc4_hdmi_get_field_base(vc4_hdmi,
ram_packet_start->reg);
uint8_t buffer[VC4_HDMI_PACKET_STRIDE];
ssize_t len, i;
int ret;
-@@ -410,6 +440,8 @@ static void vc4_hdmi_write_infoframe(str
+@@ -413,6 +443,8 @@ static void vc4_hdmi_write_infoframe(str
return;
}
for (i = 0; i < len; i += 7) {
writel(buffer[i + 0] << 0 |
buffer[i + 1] << 8 |
-@@ -427,6 +459,9 @@ static void vc4_hdmi_write_infoframe(str
+@@ -430,6 +462,9 @@ static void vc4_hdmi_write_infoframe(str
HDMI_WRITE(HDMI_RAM_PACKET_CONFIG,
HDMI_READ(HDMI_RAM_PACKET_CONFIG) | BIT(packet_id));
ret = wait_for((HDMI_READ(HDMI_RAM_PACKET_STATUS) &
BIT(packet_id)), 100);
if (ret)
-@@ -546,6 +581,7 @@ static void vc4_hdmi_enable_scrambling(s
+@@ -549,6 +584,7 @@ static void vc4_hdmi_enable_scrambling(s
{
struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
if (!vc4_hdmi_supports_scrambling(encoder, mode))
return;
-@@ -556,8 +592,10 @@ static void vc4_hdmi_enable_scrambling(s
+@@ -559,8 +595,10 @@ static void vc4_hdmi_enable_scrambling(s
drm_scdc_set_high_tmds_clock_ratio(vc4_hdmi->ddc, true);
drm_scdc_set_scrambling(vc4_hdmi->ddc, true);
queue_delayed_work(system_wq, &vc4_hdmi->scrambling_work,
msecs_to_jiffies(SCRAMBLING_POLLING_DELAY_MS));
-@@ -567,6 +605,7 @@ static void vc4_hdmi_disable_scrambling(
+@@ -570,6 +608,7 @@ static void vc4_hdmi_disable_scrambling(
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
struct drm_crtc *crtc = encoder->crtc;
/*
* At boot, encoder->crtc will be NULL. Since we don't know the
-@@ -582,8 +621,10 @@ static void vc4_hdmi_disable_scrambling(
+@@ -585,8 +624,10 @@ static void vc4_hdmi_disable_scrambling(
if (delayed_work_pending(&vc4_hdmi->scrambling_work))
cancel_delayed_work_sync(&vc4_hdmi->scrambling_work);
drm_scdc_set_scrambling(vc4_hdmi->ddc, false);
drm_scdc_set_high_tmds_clock_ratio(vc4_hdmi->ddc, false);
-@@ -609,15 +650,23 @@ static void vc4_hdmi_encoder_post_crtc_d
+@@ -612,15 +653,23 @@ static void vc4_hdmi_encoder_post_crtc_d
struct drm_atomic_state *state)
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
vc4_hdmi_disable_scrambling(encoder);
}
-@@ -625,10 +674,13 @@ static void vc4_hdmi_encoder_post_crtc_p
+@@ -628,10 +677,13 @@ static void vc4_hdmi_encoder_post_crtc_p
struct drm_atomic_state *state)
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
if (vc4_hdmi->variant->phy_disable)
vc4_hdmi->variant->phy_disable(vc4_hdmi);
-@@ -647,8 +699,11 @@ static void vc4_hdmi_encoder_disable(str
+@@ -650,8 +702,11 @@ static void vc4_hdmi_encoder_disable(str
static void vc4_hdmi_csc_setup(struct vc4_hdmi *vc4_hdmi, bool enable)
{
csc_ctl = VC4_SET_FIELD(VC4_HD_CSC_CTL_ORDER_BGR,
VC4_HD_CSC_CTL_ORDER);
-@@ -678,14 +733,19 @@ static void vc4_hdmi_csc_setup(struct vc
+@@ -681,14 +736,19 @@ static void vc4_hdmi_csc_setup(struct vc
/* The RGB order applies even when CSC is disabled. */
HDMI_WRITE(HDMI_CSC_CTL, csc_ctl);
if (enable) {
/* CEA VICs other than #1 requre limited range RGB
* output unless overridden by an AVI infoframe.
-@@ -717,6 +777,8 @@ static void vc5_hdmi_csc_setup(struct vc
+@@ -720,6 +780,8 @@ static void vc5_hdmi_csc_setup(struct vc
}
HDMI_WRITE(HDMI_CSC_CTL, csc_ctl);
}
static void vc4_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
-@@ -740,6 +802,9 @@ static void vc4_hdmi_set_timings(struct
- mode->crtc_vsync_end -
- interlaced,
+@@ -743,6 +805,9 @@ static void vc4_hdmi_set_timings(struct
+ VC4_SET_FIELD(mode->crtc_vtotal -
+ mode->crtc_vsync_end,
VC4_HDMI_VERTB_VBP));
+ unsigned long flags;
+
HDMI_WRITE(HDMI_HORZA,
(vsync_pos ? VC4_HDMI_HORZA_VPOS : 0) |
-@@ -763,6 +828,8 @@ static void vc4_hdmi_set_timings(struct
+@@ -766,6 +831,8 @@ static void vc4_hdmi_set_timings(struct
HDMI_WRITE(HDMI_VERTB0, vertb_even);
HDMI_WRITE(HDMI_VERTB1, vertb);
}
static void vc5_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
-@@ -786,10 +853,13 @@ static void vc5_hdmi_set_timings(struct
- mode->crtc_vsync_end -
- interlaced,
+@@ -789,10 +856,13 @@ static void vc5_hdmi_set_timings(struct
+ VC4_SET_FIELD(mode->crtc_vtotal -
+ mode->crtc_vsync_end - interlaced,
VC4_HDMI_VERTB_VBP));
+ unsigned long flags;
unsigned char gcp;
HDMI_WRITE(HDMI_VEC_INTERFACE_XBAR, 0x354021);
HDMI_WRITE(HDMI_HORZA,
(vsync_pos ? VC5_HDMI_HORZA_VPOS : 0) |
-@@ -848,13 +918,18 @@ static void vc5_hdmi_set_timings(struct
- HDMI_WRITE(HDMI_GCP_CONFIG, reg);
+@@ -856,13 +926,18 @@ static void vc5_hdmi_set_timings(struct
+ HDMI_WRITE(HDMI_MISC_CONTROL, reg);
HDMI_WRITE(HDMI_CLOCK_STOP, 0);
+
drift = HDMI_READ(HDMI_FIFO_CTL);
drift &= VC4_HDMI_FIFO_VALID_WRITE_MASK;
-@@ -862,12 +937,20 @@ static void vc4_hdmi_recenter_fifo(struc
+@@ -870,12 +945,20 @@ static void vc4_hdmi_recenter_fifo(struc
drift & ~VC4_HDMI_FIFO_CTL_RECENTER);
HDMI_WRITE(HDMI_FIFO_CTL,
drift | VC4_HDMI_FIFO_CTL_RECENTER);
ret = wait_for(HDMI_READ(HDMI_FIFO_CTL) &
VC4_HDMI_FIFO_CTL_RECENTER_DONE, 1);
WARN_ONCE(ret, "Timeout waiting for "
-@@ -901,6 +984,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -909,6 +992,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
unsigned long pixel_rate = vc4_conn_state->pixel_rate;
unsigned long bvb_rate, hsm_rate;
int ret;
/*
-@@ -969,11 +1053,15 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -977,11 +1061,15 @@ static void vc4_hdmi_encoder_pre_crtc_co
if (vc4_hdmi->variant->phy_init)
vc4_hdmi->variant->phy_init(vc4_hdmi, vc4_conn_state);
if (vc4_hdmi->variant->set_timings)
vc4_hdmi->variant->set_timings(vc4_hdmi, conn_state, mode);
-@@ -993,6 +1081,7 @@ static void vc4_hdmi_encoder_pre_crtc_en
+@@ -1001,6 +1089,7 @@ static void vc4_hdmi_encoder_pre_crtc_en
struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
if (vc4_encoder->hdmi_monitor &&
drm_default_rgb_quant_range(mode) == HDMI_QUANTIZATION_RANGE_LIMITED) {
-@@ -1007,7 +1096,9 @@ static void vc4_hdmi_encoder_pre_crtc_en
+@@ -1015,7 +1104,9 @@ static void vc4_hdmi_encoder_pre_crtc_en
vc4_encoder->limited_rgb_range = false;
}
}
static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder,
-@@ -1018,8 +1109,11 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1026,8 +1117,11 @@ static void vc4_hdmi_encoder_post_crtc_e
struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
bool vsync_pos = mode->flags & DRM_MODE_FLAG_PVSYNC;
HDMI_WRITE(HDMI_VID_CTL,
VC4_HD_VID_CTL_ENABLE |
VC4_HD_VID_CTL_CLRRGB |
-@@ -1036,6 +1130,8 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1044,6 +1138,8 @@ static void vc4_hdmi_encoder_post_crtc_e
HDMI_READ(HDMI_SCHEDULER_CONTROL) |
VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI);
ret = wait_for(HDMI_READ(HDMI_SCHEDULER_CONTROL) &
VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE, 1000);
WARN_ONCE(ret, "Timeout waiting for "
-@@ -1048,6 +1144,8 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1056,6 +1152,8 @@ static void vc4_hdmi_encoder_post_crtc_e
HDMI_READ(HDMI_SCHEDULER_CONTROL) &
~VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI);
ret = wait_for(!(HDMI_READ(HDMI_SCHEDULER_CONTROL) &
VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE), 1000);
WARN_ONCE(ret, "Timeout waiting for "
-@@ -1055,6 +1153,8 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1063,6 +1161,8 @@ static void vc4_hdmi_encoder_post_crtc_e
}
if (vc4_encoder->hdmi_monitor) {
WARN_ON(!(HDMI_READ(HDMI_SCHEDULER_CONTROL) &
VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE));
HDMI_WRITE(HDMI_SCHEDULER_CONTROL,
-@@ -1064,6 +1164,8 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1072,6 +1172,8 @@ static void vc4_hdmi_encoder_post_crtc_e
HDMI_WRITE(HDMI_RAM_PACKET_CONFIG,
VC4_HDMI_RAM_PACKET_ENABLE);
vc4_hdmi_set_infoframes(encoder);
}
-@@ -1187,6 +1289,7 @@ static void vc4_hdmi_audio_set_mai_clock
+@@ -1195,6 +1297,7 @@ static void vc4_hdmi_audio_set_mai_clock
unsigned int samplerate)
{
u32 hsm_clock = clk_get_rate(vc4_hdmi->audio_clock);
unsigned long n, m;
rational_best_approximation(hsm_clock, samplerate,
-@@ -1196,9 +1299,11 @@ static void vc4_hdmi_audio_set_mai_clock
+@@ -1204,9 +1307,11 @@ static void vc4_hdmi_audio_set_mai_clock
VC4_HD_MAI_SMP_M_SHIFT) + 1,
&n, &m);
}
static void vc4_hdmi_set_n_cts(struct vc4_hdmi *vc4_hdmi, unsigned int samplerate)
-@@ -1209,6 +1314,8 @@ static void vc4_hdmi_set_n_cts(struct vc
+@@ -1217,6 +1322,8 @@ static void vc4_hdmi_set_n_cts(struct vc
u32 n, cts;
u64 tmp;
n = 128 * samplerate / 1000;
tmp = (u64)(mode->clock * 1000) * n;
do_div(tmp, 128 * samplerate);
-@@ -1238,6 +1345,7 @@ static int vc4_hdmi_audio_startup(struct
+@@ -1246,6 +1353,7 @@ static int vc4_hdmi_audio_startup(struct
{
struct vc4_hdmi *vc4_hdmi = dev_get_drvdata(dev);
struct drm_encoder *encoder = &vc4_hdmi->encoder.base.base;
/*
* If the HDMI encoder hasn't probed, or the encoder is
-@@ -1249,12 +1357,14 @@ static int vc4_hdmi_audio_startup(struct
+@@ -1257,12 +1365,14 @@ static int vc4_hdmi_audio_startup(struct
vc4_hdmi->audio.streaming = true;
if (vc4_hdmi->variant->phy_rng_enable)
vc4_hdmi->variant->phy_rng_enable(vc4_hdmi);
-@@ -1266,6 +1376,7 @@ static void vc4_hdmi_audio_reset(struct
+@@ -1274,6 +1384,7 @@ static void vc4_hdmi_audio_reset(struct
{
struct drm_encoder *encoder = &vc4_hdmi->encoder.base.base;
struct device *dev = &vc4_hdmi->pdev->dev;
int ret;
vc4_hdmi->audio.streaming = false;
-@@ -1273,20 +1384,29 @@ static void vc4_hdmi_audio_reset(struct
+@@ -1281,20 +1392,29 @@ static void vc4_hdmi_audio_reset(struct
if (ret)
dev_err(dev, "Failed to stop audio infoframe: %d\n", ret);
if (vc4_hdmi->variant->phy_rng_disable)
vc4_hdmi->variant->phy_rng_disable(vc4_hdmi);
-@@ -1341,6 +1461,7 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1349,6 +1469,7 @@ static int vc4_hdmi_audio_prepare(struct
struct drm_encoder *encoder = &vc4_hdmi->encoder.base.base;
unsigned int sample_rate = params->sample_rate;
unsigned int channels = params->channels;
u32 audio_packet_config, channel_mask;
u32 channel_map;
u32 mai_audio_format;
-@@ -1349,14 +1470,15 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1357,14 +1478,15 @@ static int vc4_hdmi_audio_prepare(struct
dev_dbg(dev, "%s: %u Hz, %d bit, %d channels\n", __func__,
sample_rate, params->sample_width, channels);
mai_sample_rate = sample_rate_to_mai_fmt(sample_rate);
if (params->iec.status[0] & IEC958_AES0_NONAUDIO &&
params->channels == 8)
-@@ -1394,8 +1516,11 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1402,8 +1524,11 @@ static int vc4_hdmi_audio_prepare(struct
channel_map = vc4_hdmi->variant->channel_map(vc4_hdmi, channel_mask);
HDMI_WRITE(HDMI_MAI_CHANNEL_MAP, channel_map);
HDMI_WRITE(HDMI_AUDIO_PACKET_CONFIG, audio_packet_config);
memcpy(&vc4_hdmi->audio.infoframe, ¶ms->cea, sizeof(params->cea));
vc4_hdmi_set_audio_infoframe(encoder);
-@@ -1669,6 +1794,8 @@ static void vc4_cec_read_msg(struct vc4_
+@@ -1677,6 +1802,8 @@ static void vc4_cec_read_msg(struct vc4_
struct cec_msg *msg = &vc4_hdmi->cec_rx_msg;
unsigned int i;
msg->len = 1 + ((cntrl1 & VC4_HDMI_CEC_REC_WRD_CNT_MASK) >>
VC4_HDMI_CEC_REC_WRD_CNT_SHIFT);
-@@ -1687,11 +1814,12 @@ static void vc4_cec_read_msg(struct vc4_
+@@ -1695,11 +1822,12 @@ static void vc4_cec_read_msg(struct vc4_
}
}
cntrl1 = HDMI_READ(HDMI_CEC_CNTRL_1);
vc4_hdmi->cec_tx_ok = cntrl1 & VC4_HDMI_CEC_TX_STATUS_GOOD;
cntrl1 &= ~VC4_HDMI_CEC_START_XMIT_BEGIN;
-@@ -1700,11 +1828,24 @@ static irqreturn_t vc4_cec_irq_handler_t
+@@ -1708,11 +1836,24 @@ static irqreturn_t vc4_cec_irq_handler_t
return IRQ_WAKE_THREAD;
}
vc4_hdmi->cec_rx_msg.len = 0;
cntrl1 = HDMI_READ(HDMI_CEC_CNTRL_1);
vc4_cec_read_msg(vc4_hdmi, cntrl1);
-@@ -1717,6 +1858,18 @@ static irqreturn_t vc4_cec_irq_handler_r
+@@ -1725,6 +1866,18 @@ static irqreturn_t vc4_cec_irq_handler_r
return IRQ_WAKE_THREAD;
}
static irqreturn_t vc4_cec_irq_handler(int irq, void *priv)
{
struct vc4_hdmi *vc4_hdmi = priv;
-@@ -1727,14 +1880,17 @@ static irqreturn_t vc4_cec_irq_handler(i
+@@ -1735,14 +1888,17 @@ static irqreturn_t vc4_cec_irq_handler(i
if (!(stat & VC4_HDMI_CPU_CEC))
return IRQ_NONE;
return ret;
}
-@@ -1743,6 +1899,7 @@ static int vc4_hdmi_cec_enable(struct ce
+@@ -1751,6 +1907,7 @@ static int vc4_hdmi_cec_enable(struct ce
struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
/* clock period in microseconds */
const u32 usecs = 1000000 / CEC_CLOCK_FREQ;
u32 val;
int ret;
-@@ -1750,6 +1907,8 @@ static int vc4_hdmi_cec_enable(struct ce
+@@ -1758,6 +1915,8 @@ static int vc4_hdmi_cec_enable(struct ce
if (ret)
return ret;
val = HDMI_READ(HDMI_CEC_CNTRL_5);
val &= ~(VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET |
VC4_HDMI_CEC_CNT_TO_4700_US_MASK |
-@@ -1780,12 +1939,17 @@ static int vc4_hdmi_cec_enable(struct ce
+@@ -1788,12 +1947,17 @@ static int vc4_hdmi_cec_enable(struct ce
if (!vc4_hdmi->variant->external_irq_controller)
HDMI_WRITE(HDMI_CEC_CPU_MASK_CLEAR, VC4_HDMI_CPU_CEC);
if (!vc4_hdmi->variant->external_irq_controller)
HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, VC4_HDMI_CPU_CEC);
-@@ -1793,6 +1957,8 @@ static int vc4_hdmi_cec_disable(struct c
+@@ -1801,6 +1965,8 @@ static int vc4_hdmi_cec_disable(struct c
HDMI_WRITE(HDMI_CEC_CNTRL_5, HDMI_READ(HDMI_CEC_CNTRL_5) |
VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET);
pm_runtime_put(&vc4_hdmi->pdev->dev);
return 0;
-@@ -1809,10 +1975,14 @@ static int vc4_hdmi_cec_adap_enable(stru
+@@ -1817,10 +1983,14 @@ static int vc4_hdmi_cec_adap_enable(stru
static int vc4_hdmi_cec_adap_log_addr(struct cec_adapter *adap, u8 log_addr)
{
struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
return 0;
}
-@@ -1821,6 +1991,7 @@ static int vc4_hdmi_cec_adap_transmit(st
+@@ -1829,6 +1999,7 @@ static int vc4_hdmi_cec_adap_transmit(st
{
struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
struct drm_device *dev = vc4_hdmi->connector.dev;
u32 val;
unsigned int i;
-@@ -1829,6 +2000,8 @@ static int vc4_hdmi_cec_adap_transmit(st
+@@ -1837,6 +2008,8 @@ static int vc4_hdmi_cec_adap_transmit(st
return -ENOMEM;
}
for (i = 0; i < msg->len; i += 4)
HDMI_WRITE(HDMI_CEC_TX_DATA_1 + (i >> 2),
(msg->msg[i]) |
-@@ -1844,6 +2017,9 @@ static int vc4_hdmi_cec_adap_transmit(st
+@@ -1852,6 +2025,9 @@ static int vc4_hdmi_cec_adap_transmit(st
val |= VC4_HDMI_CEC_START_XMIT_BEGIN;
HDMI_WRITE(HDMI_CEC_CNTRL_1, val);
return 0;
}
-@@ -1858,6 +2034,7 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -1866,6 +2042,7 @@ static int vc4_hdmi_cec_init(struct vc4_
struct cec_connector_info conn_info;
struct platform_device *pdev = vc4_hdmi->pdev;
struct device *dev = &pdev->dev;
u32 value;
int ret;
-@@ -1877,10 +2054,12 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -1885,10 +2062,12 @@ static int vc4_hdmi_cec_init(struct vc4_
cec_fill_conn_info_from_drm(&conn_info, &vc4_hdmi->connector);
cec_s_conn_info(vc4_hdmi->cec_adap, &conn_info);
vc4_hdmi_cec_update_clk_div(vc4_hdmi);
-@@ -1899,7 +2078,9 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -1907,7 +2086,9 @@ static int vc4_hdmi_cec_init(struct vc4_
if (ret)
goto err_remove_cec_rx_handler;
} else {
ret = request_threaded_irq(platform_get_irq(pdev, 0),
vc4_cec_irq_handler,
-@@ -2169,6 +2350,7 @@ static int vc4_hdmi_bind(struct device *
+@@ -2177,6 +2358,7 @@ static int vc4_hdmi_bind(struct device *
vc4_hdmi = devm_kzalloc(dev, sizeof(*vc4_hdmi), GFP_KERNEL);
if (!vc4_hdmi)
return -ENOMEM;
}
--- a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
-@@ -442,6 +442,8 @@ static inline void vc4_hdmi_write(struct
+@@ -445,6 +445,8 @@ static inline void vc4_hdmi_write(struct
const struct vc4_hdmi_variant *variant = hdmi->variant;
void __iomem *base;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -189,6 +189,8 @@ vc4_hdmi_connector_detect(struct drm_con
+@@ -192,6 +192,8 @@ vc4_hdmi_connector_detect(struct drm_con
struct vc4_hdmi *vc4_hdmi = connector_to_vc4_hdmi(connector);
bool connected = false;
WARN_ON(pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev));
if (vc4_hdmi->hpd_gpio) {
-@@ -219,11 +221,13 @@ vc4_hdmi_connector_detect(struct drm_con
+@@ -222,11 +224,13 @@ vc4_hdmi_connector_detect(struct drm_con
vc4_hdmi_enable_scrambling(&vc4_hdmi->encoder.base.base);
pm_runtime_put(&vc4_hdmi->pdev->dev);
return connector_status_disconnected;
}
-@@ -240,10 +244,14 @@ static int vc4_hdmi_connector_get_modes(
+@@ -243,10 +247,14 @@ static int vc4_hdmi_connector_get_modes(
int ret = 0;
struct edid *edid;
vc4_encoder->hdmi_monitor = drm_detect_hdmi_monitor(edid);
-@@ -263,6 +271,9 @@ static int vc4_hdmi_connector_get_modes(
+@@ -266,6 +274,9 @@ static int vc4_hdmi_connector_get_modes(
}
}
return ret;
}
-@@ -479,6 +490,8 @@ static void vc4_hdmi_set_avi_infoframe(s
+@@ -482,6 +493,8 @@ static void vc4_hdmi_set_avi_infoframe(s
union hdmi_infoframe frame;
int ret;
ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
connector, mode);
if (ret < 0) {
-@@ -530,6 +543,8 @@ static void vc4_hdmi_set_hdr_infoframe(s
+@@ -533,6 +546,8 @@ static void vc4_hdmi_set_hdr_infoframe(s
struct drm_connector_state *conn_state = connector->state;
union hdmi_infoframe frame;
if (!vc4_hdmi->variant->supports_hdr)
return;
-@@ -546,6 +561,8 @@ static void vc4_hdmi_set_infoframes(stru
+@@ -549,6 +564,8 @@ static void vc4_hdmi_set_infoframes(stru
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
vc4_hdmi_set_avi_infoframe(encoder);
vc4_hdmi_set_spd_infoframe(encoder);
/*
-@@ -565,6 +582,8 @@ static bool vc4_hdmi_supports_scrambling
+@@ -568,6 +585,8 @@ static bool vc4_hdmi_supports_scrambling
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
struct drm_display_info *display = &vc4_hdmi->connector.display_info;
if (!vc4_encoder->hdmi_monitor)
return false;
-@@ -583,6 +602,8 @@ static void vc4_hdmi_enable_scrambling(s
+@@ -586,6 +605,8 @@ static void vc4_hdmi_enable_scrambling(s
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
unsigned long flags;
if (!vc4_hdmi_supports_scrambling(encoder, mode))
return;
-@@ -652,6 +673,8 @@ static void vc4_hdmi_encoder_post_crtc_d
+@@ -655,6 +676,8 @@ static void vc4_hdmi_encoder_post_crtc_d
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
unsigned long flags;
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
HDMI_WRITE(HDMI_RAM_PACKET_CONFIG, 0);
-@@ -668,6 +691,8 @@ static void vc4_hdmi_encoder_post_crtc_d
+@@ -671,6 +694,8 @@ static void vc4_hdmi_encoder_post_crtc_d
spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
vc4_hdmi_disable_scrambling(encoder);
}
static void vc4_hdmi_encoder_post_crtc_powerdown(struct drm_encoder *encoder,
-@@ -677,6 +702,8 @@ static void vc4_hdmi_encoder_post_crtc_p
+@@ -680,6 +705,8 @@ static void vc4_hdmi_encoder_post_crtc_p
unsigned long flags;
int ret;
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
HDMI_WRITE(HDMI_VID_CTL,
HDMI_READ(HDMI_VID_CTL) | VC4_HD_VID_CTL_BLANKPIX);
-@@ -691,6 +718,8 @@ static void vc4_hdmi_encoder_post_crtc_p
+@@ -694,6 +721,8 @@ static void vc4_hdmi_encoder_post_crtc_p
ret = pm_runtime_put(&vc4_hdmi->pdev->dev);
if (ret < 0)
DRM_ERROR("Failed to release power domain: %d\n", ret);
}
static void vc4_hdmi_encoder_disable(struct drm_encoder *encoder)
-@@ -987,6 +1016,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -995,6 +1024,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
unsigned long flags;
int ret;
/*
* As stated in RPi's vc4 firmware "HDMI state machine (HSM) clock must
* be faster than pixel clock, infinitesimally faster, tested in
-@@ -1007,13 +1038,13 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -1015,13 +1046,13 @@ static void vc4_hdmi_encoder_pre_crtc_co
ret = clk_set_min_rate(vc4_hdmi->hsm_clock, hsm_rate);
if (ret) {
DRM_ERROR("Failed to set HSM clock rate: %d\n", ret);
}
ret = clk_set_rate(vc4_hdmi->pixel_clock, pixel_rate);
-@@ -1065,13 +1096,16 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -1073,13 +1104,16 @@ static void vc4_hdmi_encoder_pre_crtc_co
if (vc4_hdmi->variant->set_timings)
vc4_hdmi->variant->set_timings(vc4_hdmi, conn_state, mode);
return;
}
-@@ -1083,6 +1117,8 @@ static void vc4_hdmi_encoder_pre_crtc_en
+@@ -1091,6 +1125,8 @@ static void vc4_hdmi_encoder_pre_crtc_en
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
unsigned long flags;
if (vc4_encoder->hdmi_monitor &&
drm_default_rgb_quant_range(mode) == HDMI_QUANTIZATION_RANGE_LIMITED) {
if (vc4_hdmi->variant->csc_setup)
-@@ -1099,6 +1135,8 @@ static void vc4_hdmi_encoder_pre_crtc_en
+@@ -1107,6 +1143,8 @@ static void vc4_hdmi_encoder_pre_crtc_en
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
HDMI_WRITE(HDMI_FIFO_CTL, VC4_HDMI_FIFO_CTL_MASTER_SLAVE_N);
spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
}
static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder,
-@@ -1112,6 +1150,8 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1120,6 +1158,8 @@ static void vc4_hdmi_encoder_post_crtc_e
unsigned long flags;
int ret;
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
HDMI_WRITE(HDMI_VID_CTL,
-@@ -1171,6 +1211,8 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1179,6 +1219,8 @@ static void vc4_hdmi_encoder_post_crtc_e
vc4_hdmi_recenter_fifo(vc4_hdmi);
vc4_hdmi_enable_scrambling(encoder);
}
static void vc4_hdmi_encoder_enable(struct drm_encoder *encoder)
-@@ -1314,6 +1356,7 @@ static void vc4_hdmi_set_n_cts(struct vc
+@@ -1322,6 +1364,7 @@ static void vc4_hdmi_set_n_cts(struct vc
u32 n, cts;
u64 tmp;
lockdep_assert_held(&vc4_hdmi->hw_lock);
n = 128 * samplerate / 1000;
-@@ -1347,13 +1390,17 @@ static int vc4_hdmi_audio_startup(struct
+@@ -1355,13 +1398,17 @@ static int vc4_hdmi_audio_startup(struct
struct drm_encoder *encoder = &vc4_hdmi->encoder.base.base;
unsigned long flags;
vc4_hdmi->audio.streaming = true;
-@@ -1369,6 +1416,8 @@ static int vc4_hdmi_audio_startup(struct
+@@ -1377,6 +1424,8 @@ static int vc4_hdmi_audio_startup(struct
if (vc4_hdmi->variant->phy_rng_enable)
vc4_hdmi->variant->phy_rng_enable(vc4_hdmi);
return 0;
}
-@@ -1379,6 +1428,8 @@ static void vc4_hdmi_audio_reset(struct
+@@ -1387,6 +1436,8 @@ static void vc4_hdmi_audio_reset(struct
unsigned long flags;
int ret;
vc4_hdmi->audio.streaming = false;
ret = vc4_hdmi_stop_packet(encoder, HDMI_INFOFRAME_TYPE_AUDIO, false);
if (ret)
-@@ -1398,6 +1449,8 @@ static void vc4_hdmi_audio_shutdown(stru
+@@ -1406,6 +1457,8 @@ static void vc4_hdmi_audio_shutdown(stru
struct vc4_hdmi *vc4_hdmi = dev_get_drvdata(dev);
unsigned long flags;
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
HDMI_WRITE(HDMI_MAI_CTL,
-@@ -1412,6 +1465,8 @@ static void vc4_hdmi_audio_shutdown(stru
+@@ -1420,6 +1473,8 @@ static void vc4_hdmi_audio_shutdown(stru
vc4_hdmi->audio.streaming = false;
vc4_hdmi_audio_reset(vc4_hdmi);
}
static int sample_rate_to_mai_fmt(int samplerate)
-@@ -1470,6 +1525,8 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1478,6 +1533,8 @@ static int vc4_hdmi_audio_prepare(struct
dev_dbg(dev, "%s: %u Hz, %d bit, %d channels\n", __func__,
sample_rate, params->sample_width, channels);
vc4_hdmi_audio_set_mai_clock(vc4_hdmi, sample_rate);
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
-@@ -1524,6 +1581,8 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1532,6 +1589,8 @@ static int vc4_hdmi_audio_prepare(struct
memcpy(&vc4_hdmi->audio.infoframe, ¶ms->cea, sizeof(params->cea));
vc4_hdmi_set_audio_infoframe(encoder);
return 0;
}
-@@ -1566,7 +1625,9 @@ static int vc4_hdmi_audio_get_eld(struct
+@@ -1574,7 +1633,9 @@ static int vc4_hdmi_audio_get_eld(struct
struct vc4_hdmi *vc4_hdmi = dev_get_drvdata(dev);
struct drm_connector *connector = &vc4_hdmi->connector;
return 0;
}
-@@ -1903,6 +1964,17 @@ static int vc4_hdmi_cec_enable(struct ce
+@@ -1911,6 +1972,17 @@ static int vc4_hdmi_cec_enable(struct ce
u32 val;
int ret;
ret = pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev);
if (ret)
return ret;
-@@ -1949,6 +2021,17 @@ static int vc4_hdmi_cec_disable(struct c
+@@ -1957,6 +2029,17 @@ static int vc4_hdmi_cec_disable(struct c
struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
unsigned long flags;
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
if (!vc4_hdmi->variant->external_irq_controller)
-@@ -1977,6 +2060,17 @@ static int vc4_hdmi_cec_adap_log_addr(st
+@@ -1985,6 +2068,17 @@ static int vc4_hdmi_cec_adap_log_addr(st
struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
unsigned long flags;
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
HDMI_WRITE(HDMI_CEC_CNTRL_1,
(HDMI_READ(HDMI_CEC_CNTRL_1) & ~VC4_HDMI_CEC_ADDR_MASK) |
-@@ -1995,6 +2089,17 @@ static int vc4_hdmi_cec_adap_transmit(st
+@@ -2003,6 +2097,17 @@ static int vc4_hdmi_cec_adap_transmit(st
u32 val;
unsigned int i;
if (msg->len > 16) {
drm_err(dev, "Attempting to transmit too much data (%d)\n", msg->len);
return -ENOMEM;
-@@ -2350,6 +2455,7 @@ static int vc4_hdmi_bind(struct device *
+@@ -2358,6 +2463,7 @@ static int vc4_hdmi_bind(struct device *
vc4_hdmi = devm_kzalloc(dev, sizeof(*vc4_hdmi), GFP_KERNEL);
if (!vc4_hdmi)
return -ENOMEM;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -485,8 +485,7 @@ static void vc4_hdmi_set_avi_infoframe(s
+@@ -488,8 +488,7 @@ static void vc4_hdmi_set_avi_infoframe(s
struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
struct drm_connector *connector = &vc4_hdmi->connector;
struct drm_connector_state *cstate = connector->state;
union hdmi_infoframe frame;
int ret;
-@@ -598,8 +597,8 @@ static bool vc4_hdmi_supports_scrambling
+@@ -601,8 +600,8 @@ static bool vc4_hdmi_supports_scrambling
static void vc4_hdmi_enable_scrambling(struct drm_encoder *encoder)
{
unsigned long flags;
lockdep_assert_held(&vc4_hdmi->mutex);
-@@ -625,18 +624,21 @@ static void vc4_hdmi_enable_scrambling(s
+@@ -628,18 +627,21 @@ static void vc4_hdmi_enable_scrambling(s
static void vc4_hdmi_disable_scrambling(struct drm_encoder *encoder)
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
return;
if (delayed_work_pending(&vc4_hdmi->scrambling_work))
-@@ -1009,8 +1011,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -1017,8 +1019,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
vc4_hdmi_encoder_get_connector_state(encoder, state);
struct vc4_hdmi_connector_state *vc4_conn_state =
conn_state_to_vc4_hdmi_conn_state(conn_state);
unsigned long pixel_rate = vc4_conn_state->pixel_rate;
unsigned long bvb_rate, hsm_rate;
unsigned long flags;
-@@ -1112,9 +1114,9 @@ out:
+@@ -1120,9 +1122,9 @@ out:
static void vc4_hdmi_encoder_pre_crtc_enable(struct drm_encoder *encoder,
struct drm_atomic_state *state)
{
unsigned long flags;
mutex_lock(&vc4_hdmi->mutex);
-@@ -1142,8 +1144,8 @@ static void vc4_hdmi_encoder_pre_crtc_en
+@@ -1150,8 +1152,8 @@ static void vc4_hdmi_encoder_pre_crtc_en
static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder,
struct drm_atomic_state *state)
{
struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
bool vsync_pos = mode->flags & DRM_MODE_FLAG_PVSYNC;
-@@ -1219,6 +1221,19 @@ static void vc4_hdmi_encoder_enable(stru
+@@ -1227,6 +1229,19 @@ static void vc4_hdmi_encoder_enable(stru
{
}
#define WIFI_2_4GHz_CH1_MIN_FREQ 2400000000ULL
#define WIFI_2_4GHz_CH1_MAX_FREQ 2422000000ULL
-@@ -1297,6 +1312,7 @@ vc4_hdmi_encoder_mode_valid(struct drm_e
+@@ -1305,6 +1320,7 @@ vc4_hdmi_encoder_mode_valid(struct drm_e
static const struct drm_encoder_helper_funcs vc4_hdmi_encoder_helper_funcs = {
.atomic_check = vc4_hdmi_encoder_atomic_check,
.mode_valid = vc4_hdmi_encoder_mode_valid,
.disable = vc4_hdmi_encoder_disable,
.enable = vc4_hdmi_encoder_enable,
-@@ -1350,9 +1366,7 @@ static void vc4_hdmi_audio_set_mai_clock
+@@ -1358,9 +1374,7 @@ static void vc4_hdmi_audio_set_mai_clock
static void vc4_hdmi_set_n_cts(struct vc4_hdmi *vc4_hdmi, unsigned int samplerate)
{
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1398,20 +1398,36 @@ static inline struct vc4_hdmi *dai_to_hd
+@@ -1406,20 +1406,36 @@ static inline struct vc4_hdmi *dai_to_hd
return snd_soc_card_get_drvdata(card);
}
mutex_unlock(&vc4_hdmi->mutex);
return -ENODEV;
}
-@@ -1541,6 +1557,11 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1549,6 +1565,11 @@ static int vc4_hdmi_audio_prepare(struct
mutex_lock(&vc4_hdmi->mutex);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -726,6 +726,11 @@ static void vc4_hdmi_encoder_post_crtc_p
+@@ -729,6 +729,11 @@ static void vc4_hdmi_encoder_post_crtc_p
static void vc4_hdmi_encoder_disable(struct drm_encoder *encoder)
{
}
static void vc4_hdmi_csc_setup(struct vc4_hdmi *vc4_hdmi, bool enable)
-@@ -1219,6 +1224,11 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1227,6 +1232,11 @@ static void vc4_hdmi_encoder_post_crtc_e
static void vc4_hdmi_encoder_enable(struct drm_encoder *encoder)
{
}
static void vc4_hdmi_encoder_atomic_mode_set(struct drm_encoder *encoder,
-@@ -1400,14 +1410,12 @@ static inline struct vc4_hdmi *dai_to_hd
+@@ -1408,14 +1418,12 @@ static inline struct vc4_hdmi *dai_to_hd
static bool vc4_hdmi_audio_can_stream(struct vc4_hdmi *vc4_hdmi)
{
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -617,6 +617,8 @@ static void vc4_hdmi_enable_scrambling(s
+@@ -620,6 +620,8 @@ static void vc4_hdmi_enable_scrambling(s
VC5_HDMI_SCRAMBLER_CTL_ENABLE);
spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
queue_delayed_work(system_wq, &vc4_hdmi->scrambling_work,
msecs_to_jiffies(SCRAMBLING_POLLING_DELAY_MS));
}
-@@ -624,22 +626,14 @@ static void vc4_hdmi_enable_scrambling(s
+@@ -627,22 +629,14 @@ static void vc4_hdmi_enable_scrambling(s
static void vc4_hdmi_disable_scrambling(struct drm_encoder *encoder)
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
if (delayed_work_pending(&vc4_hdmi->scrambling_work))
cancel_delayed_work_sync(&vc4_hdmi->scrambling_work);
-@@ -2513,6 +2507,14 @@ static int vc4_hdmi_bind(struct device *
+@@ -2521,6 +2515,14 @@ static int vc4_hdmi_bind(struct device *
vc4_hdmi->pdev = pdev;
vc4_hdmi->variant = variant;
struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
const struct vc4_pv_data *pv_data = vc4_crtc_to_vc4_pv_data(vc4_crtc);
-@@ -599,7 +598,7 @@ static void vc4_crtc_atomic_enable(struc
+@@ -601,7 +600,7 @@ static void vc4_crtc_atomic_enable(struc
if (vc4_encoder->pre_crtc_configure)
vc4_encoder->pre_crtc_configure(encoder, state);
return NULL;
}
-@@ -552,8 +540,7 @@ static void vc4_crtc_atomic_disable(stru
+@@ -554,8 +542,7 @@ static void vc4_crtc_atomic_disable(stru
struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state,
crtc);
struct vc4_crtc_state *old_vc4_state = to_vc4_crtc_state(old_state);
struct drm_device *dev = crtc->dev;
require_hvs_enabled(dev);
-@@ -580,10 +567,11 @@ static void vc4_crtc_atomic_disable(stru
+@@ -582,10 +569,11 @@ static void vc4_crtc_atomic_disable(stru
static void vc4_crtc_atomic_enable(struct drm_crtc *crtc,
struct drm_atomic_state *state)
{
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -543,6 +543,9 @@ static void vc4_crtc_atomic_disable(stru
+@@ -545,6 +545,9 @@ static void vc4_crtc_atomic_disable(stru
struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc, old_state);
struct drm_device *dev = crtc->dev;
require_hvs_enabled(dev);
/* Disable vblank irq handling before crtc is disabled. */
-@@ -574,6 +577,9 @@ static void vc4_crtc_atomic_enable(struc
+@@ -576,6 +579,9 @@ static void vc4_crtc_atomic_enable(struc
struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc, new_state);
struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
*/
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -529,11 +529,6 @@ static void vc4_plane_calc_load(struct d
+@@ -525,11 +525,6 @@ static void vc4_plane_calc_load(struct d
struct vc4_plane_state *vc4_state;
struct drm_crtc_state *crtc_state;
unsigned int vscale_factor;
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -661,12 +661,27 @@ static int vc4_crtc_atomic_check(struct
+@@ -663,12 +663,27 @@ static int vc4_crtc_atomic_check(struct
struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state);
struct drm_connector *conn;
struct drm_connector_state *conn_state;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1793,10 +1793,11 @@ static void vc4_hdmi_audio_exit(struct v
+@@ -1801,10 +1801,11 @@ static void vc4_hdmi_audio_exit(struct v
static irqreturn_t vc4_hdmi_hpd_irq_thread(int irq, void *priv)
{
struct vc4_hdmi *vc4_hdmi = priv;
--- a/drivers/gpu/drm/vc4/vc4_drv.c
+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -253,15 +253,15 @@ static int vc4_drm_bind(struct device *d
+@@ -272,15 +272,15 @@ static int vc4_drm_bind(struct device *d
if (ret)
return ret;
#include "uapi/drm/vc4_drm.h"
#include "vc4_drv.h"
-@@ -217,6 +219,7 @@ static void vc4_match_add_drivers(struct
+@@ -226,6 +228,7 @@ static const struct of_device_id vc4_dma
static int vc4_drm_bind(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct drm_device *drm;
struct vc4_dev *vc4;
struct device_node *node;
-@@ -253,10 +256,29 @@ static int vc4_drm_bind(struct device *d
+@@ -272,10 +275,29 @@ static int vc4_drm_bind(struct device *d
if (ret)
return ret;
--- a/drivers/net/usb/smsc95xx.c
+++ b/drivers/net/usb/smsc95xx.c
-@@ -67,6 +67,10 @@ static bool turbo_mode = true;
+@@ -76,6 +76,10 @@ static bool turbo_mode = true;
module_param(turbo_mode, bool, 0644);
MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index,
u32 *data, int in_pm)
{
-@@ -1838,7 +1842,8 @@ static int smsc95xx_rx_fixup(struct usbn
+@@ -1860,7 +1864,8 @@ static int smsc95xx_rx_fixup(struct usbn
if (dev->net->features & NETIF_F_RXCSUM)
smsc95xx_rx_csum_offload(skb);
skb_trim(skb, skb->len - 4); /* remove fcs */
return 1;
}
-@@ -1856,7 +1861,8 @@ static int smsc95xx_rx_fixup(struct usbn
+@@ -1878,7 +1883,8 @@ static int smsc95xx_rx_fixup(struct usbn
if (dev->net->features & NETIF_F_RXCSUM)
smsc95xx_rx_csum_offload(ax_skb);
skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
--- a/drivers/net/usb/smsc95xx.c
+++ b/drivers/net/usb/smsc95xx.c
-@@ -71,6 +71,10 @@ static bool truesize_mode = false;
+@@ -80,6 +80,10 @@ static bool truesize_mode = false;
module_param(truesize_mode, bool, 0644);
MODULE_PARM_DESC(truesize_mode, "Report larger truesize value");
static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index,
u32 *data, int in_pm)
{
-@@ -917,13 +921,13 @@ static int smsc95xx_reset(struct usbnet
+@@ -932,13 +936,13 @@ static int smsc95xx_reset(struct usbnet
if (!turbo_mode) {
burst_cap = 0;
--- a/drivers/net/usb/smsc95xx.c
+++ b/drivers/net/usb/smsc95xx.c
-@@ -50,6 +50,7 @@
+@@ -52,6 +52,7 @@
#define SUSPEND_SUSPEND3 (0x08)
#define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \
SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3)
+#define MAC_ADDR_LEN (6)
- struct smsc95xx_priv {
- u32 mac_cr;
-@@ -75,6 +76,10 @@ static int packetsize = 2560;
+ #define SMSC95XX_NR_IRQS (1) /* raise to 12 for GPIOs */
+ #define PHY_HWIRQ (SMSC95XX_NR_IRQS - 1)
+@@ -84,6 +85,10 @@ static int packetsize = 2560;
module_param(packetsize, int, 0644);
MODULE_PARM_DESC(packetsize, "Override the RX URB packet size");
static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index,
u32 *data, int in_pm)
{
-@@ -773,6 +778,53 @@ static int smsc95xx_ioctl(struct net_dev
+@@ -788,6 +793,53 @@ static int smsc95xx_ioctl(struct net_dev
return phy_mii_ioctl(netdev->phydev, rq, cmd);
}
static void smsc95xx_init_mac_address(struct usbnet *dev)
{
/* maybe the boot loader passed the MAC address in devicetree */
-@@ -795,6 +847,10 @@ static void smsc95xx_init_mac_address(st
+@@ -810,6 +862,10 @@ static void smsc95xx_init_mac_address(st
}
}
--- a/arch/arm64/kernel/armv8_deprecated.c
+++ b/arch/arm64/kernel/armv8_deprecated.c
-@@ -182,10 +182,15 @@ static void __init register_insn_emulati
+@@ -183,10 +183,15 @@ static void __init register_insn_emulati
switch (ops->status) {
case INSN_DEPRECATED:
--- a/drivers/usb/core/hcd.c
+++ b/drivers/usb/core/hcd.c
-@@ -1969,6 +1969,16 @@ reset:
+@@ -1972,6 +1972,16 @@ reset:
return ret;
}
extern int usb_driver_set_configuration(struct usb_device *udev, int config);
--- a/include/linux/usb/hcd.h
+++ b/include/linux/usb/hcd.h
-@@ -384,6 +384,11 @@ struct hc_driver {
+@@ -385,6 +385,11 @@ struct hc_driver {
* or bandwidth constraints.
*/
void (*reset_bandwidth)(struct usb_hcd *, struct usb_device *);
/* Returns the hardware-chosen device address */
int (*address_device)(struct usb_hcd *, struct usb_device *udev);
/* prepares the hardware to send commands to the device */
-@@ -448,6 +453,8 @@ extern void usb_hcd_unmap_urb_setup_for_
+@@ -449,6 +454,8 @@ extern void usb_hcd_unmap_urb_setup_for_
extern void usb_hcd_unmap_urb_for_dma(struct usb_hcd *, struct urb *);
extern void usb_hcd_flush_endpoint(struct usb_device *udev,
struct usb_host_endpoint *ep);
#define USB_VENDOR_ID_BELKIN 0x050d
#define USB_DEVICE_ID_FLIP_KVM 0x3201
-@@ -1306,6 +1309,9 @@
+@@ -1307,6 +1310,9 @@
#define USB_VENDOR_ID_XAT 0x2505
#define USB_DEVICE_ID_XAT_CSR 0x0220
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
-@@ -3469,6 +3469,7 @@ static int __spi_validate_bits_per_word(
+@@ -3478,6 +3478,7 @@ static int __spi_validate_bits_per_word(
*/
int spi_setup(struct spi_device *spi)
{
unsigned bad_bits, ugly_bits;
int status;
-@@ -3490,6 +3491,14 @@ int spi_setup(struct spi_device *spi)
+@@ -3499,6 +3500,14 @@ int spi_setup(struct spi_device *spi)
(SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL)))
return -EINVAL;
+++ /dev/null
-From d7bcb557c33523fdb3f51ac8e088cd809031ea3a Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Tue, 19 May 2020 14:54:28 +0100
-Subject: [PATCH] drm/vc4: Adopt the dma configuration from the HVS or
- V3D component
-
-vc4_drv isn't necessarily under the /soc node in DT as it is a
-virtual device, but it is the one that does the allocations.
-The DMA addresses are consumed by primarily the HVS or V3D, and
-those require VideoCore cache alias address mapping, and so will be
-under /soc.
-
-During probe find the a suitable device node for HVS or V3D,
-and adopt the DMA configuration of that node.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_drv.c | 18 ++++++++++++++++++
- 1 file changed, 18 insertions(+)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.c
-+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -216,6 +216,14 @@ static void vc4_match_add_drivers(struct
- }
- }
-
-+const struct of_device_id vc4_dma_range_matches[] = {
-+ { .compatible = "brcm,bcm2835-hvs" },
-+ { .compatible = "brcm,bcm2835-v3d" },
-+ { .compatible = "brcm,cygnus-v3d" },
-+ { .compatible = "brcm,vc4-v3d" },
-+ {}
-+};
-+
- static int vc4_drm_bind(struct device *dev)
- {
- struct platform_device *pdev = to_platform_device(dev);
-@@ -234,6 +242,16 @@ static int vc4_drm_bind(struct device *d
- vc4_drm_driver.driver_features &= ~DRIVER_RENDER;
- of_node_put(node);
-
-+ node = of_find_matching_node_and_match(NULL, vc4_dma_range_matches,
-+ NULL);
-+ if (node) {
-+ ret = of_dma_configure(dev, node, true);
-+ of_node_put(node);
-+
-+ if (ret)
-+ return ret;
-+ }
-+
- vc4 = devm_drm_dev_alloc(dev, &vc4_drm_driver, struct vc4_dev, base);
- if (IS_ERR(vc4))
- return PTR_ERR(vc4);
};
static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)
-@@ -762,47 +769,90 @@ static int vc4_plane_mode_set(struct drm
+@@ -758,47 +765,90 @@ static int vc4_plane_mode_set(struct drm
case DRM_FORMAT_MOD_BROADCOM_SAND128:
case DRM_FORMAT_MOD_BROADCOM_SAND256: {
uint32_t param = fourcc_mod_broadcom_param(fb->modifier);
}
pitch0 = VC4_SET_FIELD(param, SCALER_TILE_HEIGHT);
-@@ -955,7 +1005,8 @@ static int vc4_plane_mode_set(struct drm
+@@ -951,7 +1001,8 @@ static int vc4_plane_mode_set(struct drm
/* Pitch word 1/2 */
for (i = 1; i < num_planes; i++) {
vc4_dlist_write(vc4_state,
VC4_SET_FIELD(fb->pitches[i],
SCALER_SRC_PITCH));
-@@ -1315,6 +1366,13 @@ static bool vc4_format_mod_supported(str
+@@ -1311,6 +1362,13 @@ static bool vc4_format_mod_supported(str
default:
return false;
}
case DRM_FORMAT_RGBX1010102:
case DRM_FORMAT_BGRX1010102:
case DRM_FORMAT_RGBA1010102:
-@@ -1347,8 +1405,11 @@ struct drm_plane *vc4_plane_init(struct
+@@ -1343,8 +1401,11 @@ struct drm_plane *vc4_plane_init(struct
struct drm_plane *plane = NULL;
struct vc4_plane *vc4_plane;
u32 formats[ARRAY_SIZE(hvs_formats)];
static const uint64_t modifiers[] = {
DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED,
DRM_FORMAT_MOD_BROADCOM_SAND128,
-@@ -1363,13 +1424,17 @@ struct drm_plane *vc4_plane_init(struct
+@@ -1359,13 +1420,17 @@ struct drm_plane *vc4_plane_init(struct
if (!vc4_plane)
return ERR_PTR(-ENOMEM);
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -623,6 +623,51 @@ static int vc4_plane_allocate_lbm(struct
+@@ -619,6 +619,51 @@ static int vc4_plane_allocate_lbm(struct
return 0;
}
/* Writes out a full display list for an active plane to the plane's
* private dlist state.
*/
-@@ -1017,9 +1062,20 @@ static int vc4_plane_mode_set(struct drm
+@@ -1013,9 +1058,20 @@ static int vc4_plane_mode_set(struct drm
/* Colorspace conversion words */
if (vc4_state->is_yuv) {
}
vc4_state->lbm_offset = 0;
-@@ -1448,6 +1504,15 @@ struct drm_plane *vc4_plane_init(struct
+@@ -1444,6 +1500,15 @@ struct drm_plane *vc4_plane_init(struct
DRM_MODE_REFLECT_X |
DRM_MODE_REFLECT_Y);
--- a/drivers/gpu/drm/vc4/vc4_drv.c
+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -218,6 +218,7 @@ static void vc4_match_add_drivers(struct
+@@ -227,6 +227,7 @@ static const struct of_device_id vc4_dma
const struct of_device_id vc4_dma_range_matches[] = {
{ .compatible = "brcm,bcm2835-hvs" },
+++ /dev/null
-From 96ddf993aa82e33e910110929816b6c83720dc99 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Wed, 31 Jul 2019 17:36:34 +0100
-Subject: [PATCH] drm/vc4: A present but empty dmas disables audio
-
-Overlays are unable to remove properties in the base DTB, but they
-can overwrite them. Allow a present but empty 'dmas' property
-to also disable the HDMI audio interface.
-
-See: https://github.com/raspberrypi/linux/issues/2489
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1693,10 +1693,12 @@ static int vc4_hdmi_audio_init(struct vc
- const __be32 *addr;
- int index;
- int ret;
-+ int len;
-
-- if (!of_find_property(dev->of_node, "dmas", NULL)) {
-+ if (!of_find_property(dev->of_node, "dmas", &len) ||
-+ len == 0) {
- dev_warn(dev,
-- "'dmas' DT property is missing, no HDMI audio\n");
-+ "'dmas' DT property is missing or empty, no HDMI audio\n");
- return 0;
- }
-
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -113,6 +113,12 @@ static int vc4_hdmi_debugfs_regs(struct
+@@ -116,6 +116,12 @@ static int vc4_hdmi_debugfs_regs(struct
drm_print_regset32(&p, &vc4_hdmi->hdmi_regset);
drm_print_regset32(&p, &vc4_hdmi->hd_regset);
return 0;
}
-@@ -2362,6 +2368,7 @@ static int vc5_hdmi_init_resources(struc
+@@ -2368,6 +2374,7 @@ static int vc5_hdmi_init_resources(struc
struct platform_device *pdev = vc4_hdmi->pdev;
struct device *dev = &pdev->dev;
struct resource *res;
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi");
if (!res)
-@@ -2458,6 +2465,38 @@ static int vc5_hdmi_init_resources(struc
+@@ -2464,6 +2471,38 @@ static int vc5_hdmi_init_resources(struc
return PTR_ERR(vc4_hdmi->reset);
}
--- a/drivers/gpu/drm/vc4/vc4_drv.c
+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -218,6 +218,7 @@ static void vc4_match_add_drivers(struct
+@@ -227,6 +227,7 @@ static const struct of_device_id vc4_dma
const struct of_device_id vc4_dma_range_matches[] = {
{ .compatible = "brcm,bcm2835-hvs" },
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -399,6 +399,7 @@ static int vc4_hdmi_connector_init(struc
+@@ -402,6 +402,7 @@ static int vc4_hdmi_connector_init(struc
connector->interlace_allowed = 1;
connector->doublescan_allowed = 0;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -437,9 +437,11 @@ static void vc4_hdmi_write_infoframe(str
+@@ -440,9 +440,11 @@ static void vc4_hdmi_write_infoframe(str
const struct vc4_hdmi_register *ram_packet_start =
&vc4_hdmi->variant->registers[HDMI_RAM_PACKET_START];
u32 packet_reg = ram_packet_start->offset + VC4_HDMI_PACKET_STRIDE * packet_id;
unsigned long flags;
ssize_t len, i;
int ret;
-@@ -475,6 +477,13 @@ static void vc4_hdmi_write_infoframe(str
+@@ -478,6 +480,13 @@ static void vc4_hdmi_write_infoframe(str
packet_reg += 4;
}
+++ /dev/null
-From bf7f969a35078e4a26ca2beb562593bcbf636afa Mon Sep 17 00:00:00 2001
-From: Dom Cobley <popcornmix@gmail.com>
-Date: Sun, 24 Jan 2021 15:44:10 +0000
-Subject: [PATCH] vc4/drm: Avoid full hdmi audio fifo writes
-
-We are getting occasional VC4_HD_MAI_CTL_ERRORF in
-HDMI_MAI_CTL which seem to correspond with audio dropouts.
-
-Reduce the threshold where we deassert DREQ to avoid the fifo overfilling
-
-Signed-off-by: Dom Cobley <popcornmix@gmail.com>
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1613,10 +1613,10 @@ static int vc4_hdmi_audio_prepare(struct
-
- /* Set the MAI threshold */
- HDMI_WRITE(HDMI_MAI_THR,
-- VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICHIGH) |
-- VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) |
-- VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQHIGH) |
-- VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQLOW));
-+ VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_PANICHIGH) |
-+ VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_PANICLOW) |
-+ VC4_SET_FIELD(0x06, VC4_HD_MAI_THR_DREQHIGH) |
-+ VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_DREQLOW));
-
- HDMI_WRITE(HDMI_MAI_CONFIG,
- VC4_HDMI_MAI_CONFIG_BIT_REVERSE |
+++ /dev/null
-From 4b3401ec801e12a8ce5b20fa0410c60dfc792660 Mon Sep 17 00:00:00 2001
-From: Dom Cobley <popcornmix@gmail.com>
-Date: Mon, 15 Mar 2021 13:28:06 +0000
-Subject: [PATCH] vc4/drm: vc4_plane: Remove subpixel positioning check
-
-There is little harm in ignoring fractional coordinates
-(they just get truncated).
-
-Without this:
-modetest -M vc4 -F tiles,gradient -s 32:1920x1080-60 -P89@74:1920x1080*.1.1@XR24
-
-is rejected. We have the same issue in Kodi when trying to
-use zoom options on video.
-
-Note: even if all coordinates are fully integer. e.g.
-src:[0,0,1920,1080] dest:[-10,-10,1940,1100]
-
-it will still get rejected as drm_atomic_helper_check_plane_state
-uses drm_rect_clip_scaled which transforms this to fractional src coords
-
-Signed-off-by: Dom Cobley <popcornmix@gmail.com>
----
- drivers/gpu/drm/vc4/vc4_plane.c | 21 ++++++++-------------
- 1 file changed, 8 insertions(+), 13 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_plane.c
-+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -339,7 +339,6 @@ static int vc4_plane_setup_clipping_and_
- struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
- struct drm_framebuffer *fb = state->fb;
- struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
-- u32 subpixel_src_mask = (1 << 16) - 1;
- int num_planes = fb->format->num_planes;
- struct drm_crtc_state *crtc_state;
- u32 h_subsample = fb->format->hsub;
-@@ -361,18 +360,14 @@ static int vc4_plane_setup_clipping_and_
- for (i = 0; i < num_planes; i++)
- vc4_state->offsets[i] = bo->paddr + fb->offsets[i];
-
-- /* We don't support subpixel source positioning for scaling. */
-- if ((state->src.x1 & subpixel_src_mask) ||
-- (state->src.x2 & subpixel_src_mask) ||
-- (state->src.y1 & subpixel_src_mask) ||
-- (state->src.y2 & subpixel_src_mask)) {
-- return -EINVAL;
-- }
--
-- vc4_state->src_x = state->src.x1 >> 16;
-- vc4_state->src_y = state->src.y1 >> 16;
-- vc4_state->src_w[0] = (state->src.x2 - state->src.x1) >> 16;
-- vc4_state->src_h[0] = (state->src.y2 - state->src.y1) >> 16;
-+ /* We don't support subpixel source positioning for scaling,
-+ * but fractional coordinates can be generated by clipping
-+ * so just round for now
-+ */
-+ vc4_state->src_x = DIV_ROUND_CLOSEST(state->src.x1, 1<<16);
-+ vc4_state->src_y = DIV_ROUND_CLOSEST(state->src.y1, 1<<16);
-+ vc4_state->src_w[0] = DIV_ROUND_CLOSEST(state->src.x2, 1<<16) - vc4_state->src_x;
-+ vc4_state->src_h[0] = DIV_ROUND_CLOSEST(state->src.y2, 1<<16) - vc4_state->src_y;
-
- vc4_state->crtc_x = state->dst.x1;
- vc4_state->crtc_y = state->dst.y1;
+++ /dev/null
-From 9c30e99003913737a6c897b9aa72d87cb82c58cb Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Thu, 11 Feb 2021 18:37:04 +0000
-Subject: [PATCH] drm/vc4: Correct pixel order for DSI0
-
-For slightly unknown reasons, dsi0 takes a different pixel format
-to dsi1, and that has to be set in the pixel valve.
-
-Amend the setup accordingly.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -317,7 +317,8 @@ static void vc4_crtc_config_pv(struct dr
- u32 pixel_rep = (mode->flags & DRM_MODE_FLAG_DBLCLK) ? 2 : 1;
- bool is_dsi = (vc4_encoder->type == VC4_ENCODER_TYPE_DSI0 ||
- vc4_encoder->type == VC4_ENCODER_TYPE_DSI1);
-- u32 format = is_dsi ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24;
-+ bool is_dsi1 = vc4_encoder->type == VC4_ENCODER_TYPE_DSI1;
-+ u32 format = is_dsi1 ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24;
- u8 ppc = pv_data->pixels_per_clock;
- bool debug_dump_regs = false;
-
+++ /dev/null
-From 9c1e7822d347b766bf3392c8b37fe5004e1bbaaf Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Mon, 8 Feb 2021 11:22:01 +0000
-Subject: [PATCH] drm/vc4: Register dsi0 as the correct vc4 encoder
- type
-
-vc4_dsi was registering both dsi0 and dsi1 as VC4_ENCODER_TYPE_DSI1
-which seemed to work OK for a single DSI display, but fails
-if there are two DSI displays connected.
-
-Update to register the correct type.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_dsi.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_dsi.c
-+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
-@@ -1510,7 +1510,8 @@ static int vc4_dsi_bind(struct device *d
- return -ENOMEM;
-
- INIT_LIST_HEAD(&dsi->bridge_chain);
-- vc4_dsi_encoder->base.type = VC4_ENCODER_TYPE_DSI1;
-+ vc4_dsi_encoder->base.type = dsi->variant->port ?
-+ VC4_ENCODER_TYPE_DSI1 : VC4_ENCODER_TYPE_DSI0;
- vc4_dsi_encoder->dsi = dsi;
- dsi->encoder = &vc4_dsi_encoder->base.base;
-
+++ /dev/null
-From 8f32ff08609bb5e7fd4fb38fe7518891e0e22f45 Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Wed, 10 Feb 2021 18:46:22 +0000
-Subject: [PATCH] drm/vc4: Fix dsi0 interrupt support.
-
-DSI0 seemingly had very little or no testing as a load of
-the register mappings were incorrect/missing, so host
-transfers always timed out due to enabling/checking incorrect
-bits in the interrupt enable and status registers.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_dsi.c | 111 ++++++++++++++++++++++++++--------
- 1 file changed, 85 insertions(+), 26 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_dsi.c
-+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
-@@ -181,8 +181,50 @@
-
- #define DSI0_TXPKT_PIX_FIFO 0x20 /* AKA PIX_FIFO */
-
--#define DSI0_INT_STAT 0x24
--#define DSI0_INT_EN 0x28
-+#define DSI0_INT_STAT 0x24
-+#define DSI0_INT_EN 0x28
-+# define DSI0_INT_FIFO_ERR BIT(25)
-+# define DSI0_INT_CMDC_DONE_MASK VC4_MASK(24, 23)
-+# define DSI0_INT_CMDC_DONE_SHIFT 23
-+# define DSI0_INT_CMDC_DONE_NO_REPEAT 1
-+# define DSI0_INT_CMDC_DONE_REPEAT 3
-+# define DSI0_INT_PHY_DIR_RTF BIT(22)
-+# define DSI0_INT_PHY_D1_ULPS BIT(21)
-+# define DSI0_INT_PHY_D1_STOP BIT(20)
-+# define DSI0_INT_PHY_RXLPDT BIT(19)
-+# define DSI0_INT_PHY_RXTRIG BIT(18)
-+# define DSI0_INT_PHY_D0_ULPS BIT(17)
-+# define DSI0_INT_PHY_D0_LPDT BIT(16)
-+# define DSI0_INT_PHY_D0_FTR BIT(15)
-+# define DSI0_INT_PHY_D0_STOP BIT(14)
-+/* Signaled when the clock lane enters the given state. */
-+# define DSI0_INT_PHY_CLK_ULPS BIT(13)
-+# define DSI0_INT_PHY_CLK_HS BIT(12)
-+# define DSI0_INT_PHY_CLK_FTR BIT(11)
-+/* Signaled on timeouts */
-+# define DSI0_INT_PR_TO BIT(10)
-+# define DSI0_INT_TA_TO BIT(9)
-+# define DSI0_INT_LPRX_TO BIT(8)
-+# define DSI0_INT_HSTX_TO BIT(7)
-+/* Contention on a line when trying to drive the line low */
-+# define DSI0_INT_ERR_CONT_LP1 BIT(6)
-+# define DSI0_INT_ERR_CONT_LP0 BIT(5)
-+/* Control error: incorrect line state sequence on data lane 0. */
-+# define DSI0_INT_ERR_CONTROL BIT(4)
-+# define DSI0_INT_ERR_SYNC_ESC BIT(3)
-+# define DSI0_INT_RX2_PKT BIT(2)
-+# define DSI0_INT_RX1_PKT BIT(1)
-+# define DSI0_INT_CMD_PKT BIT(0)
-+
-+#define DSI0_INTERRUPTS_ALWAYS_ENABLED (DSI0_INT_ERR_SYNC_ESC | \
-+ DSI0_INT_ERR_CONTROL | \
-+ DSI0_INT_ERR_CONT_LP0 | \
-+ DSI0_INT_ERR_CONT_LP1 | \
-+ DSI0_INT_HSTX_TO | \
-+ DSI0_INT_LPRX_TO | \
-+ DSI0_INT_TA_TO | \
-+ DSI0_INT_PR_TO)
-+
- # define DSI1_INT_PHY_D3_ULPS BIT(30)
- # define DSI1_INT_PHY_D3_STOP BIT(29)
- # define DSI1_INT_PHY_D2_ULPS BIT(28)
-@@ -894,6 +936,9 @@ static void vc4_dsi_encoder_enable(struc
-
- DSI_PORT_WRITE(PHY_AFEC0, afec0);
-
-+ /* AFEC reset hold time */
-+ mdelay(1);
-+
- DSI_PORT_WRITE(PHY_AFEC1,
- VC4_SET_FIELD(6, DSI0_PHY_AFEC1_IDR_DLANE1) |
- VC4_SET_FIELD(6, DSI0_PHY_AFEC1_IDR_DLANE0) |
-@@ -1060,12 +1105,9 @@ static void vc4_dsi_encoder_enable(struc
- DSI_PORT_WRITE(CTRL, DSI_PORT_READ(CTRL) | DSI1_CTRL_EN);
-
- /* Bring AFE out of reset. */
-- if (dsi->variant->port == 0) {
-- } else {
-- DSI_PORT_WRITE(PHY_AFEC0,
-- DSI_PORT_READ(PHY_AFEC0) &
-- ~DSI1_PHY_AFEC0_RESET);
-- }
-+ DSI_PORT_WRITE(PHY_AFEC0,
-+ DSI_PORT_READ(PHY_AFEC0) &
-+ ~DSI_PORT_BIT(PHY_AFEC0_RESET));
-
- vc4_dsi_ulps(dsi, false);
-
-@@ -1184,13 +1226,28 @@ static ssize_t vc4_dsi_host_transfer(str
- /* Enable the appropriate interrupt for the transfer completion. */
- dsi->xfer_result = 0;
- reinit_completion(&dsi->xfer_completion);
-- DSI_PORT_WRITE(INT_STAT, DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF);
-- if (msg->rx_len) {
-- DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
-- DSI1_INT_PHY_DIR_RTF));
-+ if (dsi->variant->port == 0) {
-+ DSI_PORT_WRITE(INT_STAT,
-+ DSI0_INT_CMDC_DONE_MASK | DSI1_INT_PHY_DIR_RTF);
-+ if (msg->rx_len) {
-+ DSI_PORT_WRITE(INT_EN, (DSI0_INTERRUPTS_ALWAYS_ENABLED |
-+ DSI0_INT_PHY_DIR_RTF));
-+ } else {
-+ DSI_PORT_WRITE(INT_EN,
-+ (DSI0_INTERRUPTS_ALWAYS_ENABLED |
-+ VC4_SET_FIELD(DSI0_INT_CMDC_DONE_NO_REPEAT,
-+ DSI0_INT_CMDC_DONE)));
-+ }
- } else {
-- DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
-- DSI1_INT_TXPKT1_DONE));
-+ DSI_PORT_WRITE(INT_STAT,
-+ DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF);
-+ if (msg->rx_len) {
-+ DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
-+ DSI1_INT_PHY_DIR_RTF));
-+ } else {
-+ DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
-+ DSI1_INT_TXPKT1_DONE));
-+ }
- }
-
- /* Send the packet. */
-@@ -1207,7 +1264,7 @@ static ssize_t vc4_dsi_host_transfer(str
- ret = dsi->xfer_result;
- }
-
-- DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED);
-+ DSI_PORT_WRITE(INT_EN, DSI_PORT_BIT(INTERRUPTS_ALWAYS_ENABLED));
-
- if (ret)
- goto reset_fifo_and_return;
-@@ -1253,7 +1310,7 @@ reset_fifo_and_return:
- DSI_PORT_BIT(CTRL_RESET_FIFOS));
-
- DSI_PORT_WRITE(TXPKT1C, 0);
-- DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED);
-+ DSI_PORT_WRITE(INT_EN, DSI_PORT_BIT(INTERRUPTS_ALWAYS_ENABLED));
- return ret;
- }
-
-@@ -1390,26 +1447,28 @@ static irqreturn_t vc4_dsi_irq_handler(i
- DSI_PORT_WRITE(INT_STAT, stat);
-
- dsi_handle_error(dsi, &ret, stat,
-- DSI1_INT_ERR_SYNC_ESC, "LPDT sync");
-+ DSI_PORT_BIT(INT_ERR_SYNC_ESC), "LPDT sync");
- dsi_handle_error(dsi, &ret, stat,
-- DSI1_INT_ERR_CONTROL, "data lane 0 sequence");
-+ DSI_PORT_BIT(INT_ERR_CONTROL), "data lane 0 sequence");
- dsi_handle_error(dsi, &ret, stat,
-- DSI1_INT_ERR_CONT_LP0, "LP0 contention");
-+ DSI_PORT_BIT(INT_ERR_CONT_LP0), "LP0 contention");
- dsi_handle_error(dsi, &ret, stat,
-- DSI1_INT_ERR_CONT_LP1, "LP1 contention");
-+ DSI_PORT_BIT(INT_ERR_CONT_LP1), "LP1 contention");
- dsi_handle_error(dsi, &ret, stat,
-- DSI1_INT_HSTX_TO, "HSTX timeout");
-+ DSI_PORT_BIT(INT_HSTX_TO), "HSTX timeout");
- dsi_handle_error(dsi, &ret, stat,
-- DSI1_INT_LPRX_TO, "LPRX timeout");
-+ DSI_PORT_BIT(INT_LPRX_TO), "LPRX timeout");
- dsi_handle_error(dsi, &ret, stat,
-- DSI1_INT_TA_TO, "turnaround timeout");
-+ DSI_PORT_BIT(INT_TA_TO), "turnaround timeout");
- dsi_handle_error(dsi, &ret, stat,
-- DSI1_INT_PR_TO, "peripheral reset timeout");
-+ DSI_PORT_BIT(INT_PR_TO), "peripheral reset timeout");
-
-- if (stat & (DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF)) {
-+ if (stat & ((dsi->variant->port ? DSI1_INT_TXPKT1_DONE :
-+ DSI0_INT_CMDC_DONE_MASK) |
-+ DSI_PORT_BIT(INT_PHY_DIR_RTF))) {
- complete(&dsi->xfer_completion);
- ret = IRQ_HANDLED;
-- } else if (stat & DSI1_INT_HSTX_TO) {
-+ } else if (stat & DSI_PORT_BIT(INT_HSTX_TO)) {
- complete(&dsi->xfer_completion);
- dsi->xfer_result = -ETIMEDOUT;
- ret = IRQ_HANDLED;
+++ /dev/null
-From d58e0cb66d35de123f2219f4609f733e7a11a45d Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Thu, 15 Apr 2021 16:18:16 +0100
-Subject: [PATCH] drm/vc4: Add correct stop condition to
- vc4_dsi_encoder_disable iteration
-
-vc4_dsi_encoder_disable is partially an open coded version of
-drm_bridge_chain_disable, but it missed a termination condition
-in the loop for ->disable which meant that no post_disable
-calls were made.
-
-Add in the termination clause.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_dsi.c | 3 +++
- 1 file changed, 3 insertions(+)
-
---- a/drivers/gpu/drm/vc4/vc4_dsi.c
-+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
-@@ -803,6 +803,9 @@ static void vc4_dsi_encoder_disable(stru
- list_for_each_entry_reverse(iter, &dsi->bridge_chain, chain_node) {
- if (iter->funcs->disable)
- iter->funcs->disable(iter);
-+
-+ if (iter == dsi->bridge)
-+ break;
- }
-
- vc4_dsi_ulps(dsi, true);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1003,30 +1003,15 @@ static void vc4_hdmi_recenter_fifo(struc
+@@ -1011,30 +1011,15 @@ static void vc4_hdmi_recenter_fifo(struc
"VC4_HDMI_FIFO_CTL_RECENTER_DONE");
}
+++ /dev/null
-From 66caecfcf414d8e5153a0725195413db3c992dae Mon Sep 17 00:00:00 2001
-From: kFYatek <4499762+kFYatek@users.noreply.github.com>
-Date: Wed, 23 Jun 2021 01:11:26 +0200
-Subject: [PATCH] drm/vc4: Fix timings for interlaced modes
-
-Increase the number of post-sync blanking lines on odd fields instead of
-decreasing it on even fields. This makes the total number of lines
-properly match the modelines.
-
-Additionally fix the value of PV_VCONTROL_ODD_DELAY, which did not take
-pixels_per_clock into account, causing some displays to invert the
-fields when driven by bcm2711.
-
-Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 7 ++++---
- drivers/gpu/drm/vc4/vc4_hdmi.c | 12 ++++++------
- 2 files changed, 10 insertions(+), 9 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -344,7 +344,8 @@ static void vc4_crtc_config_pv(struct dr
- PV_HORZB_HACTIVE));
-
- CRTC_WRITE(PV_VERTA,
-- VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end,
-+ VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end +
-+ interlace,
- PV_VERTA_VBP) |
- VC4_SET_FIELD(mode->crtc_vsync_end - mode->crtc_vsync_start,
- PV_VERTA_VSYNC));
-@@ -356,7 +357,7 @@ static void vc4_crtc_config_pv(struct dr
- if (interlace) {
- CRTC_WRITE(PV_VERTA_EVEN,
- VC4_SET_FIELD(mode->crtc_vtotal -
-- mode->crtc_vsync_end - 1,
-+ mode->crtc_vsync_end,
- PV_VERTA_VBP) |
- VC4_SET_FIELD(mode->crtc_vsync_end -
- mode->crtc_vsync_start,
-@@ -376,7 +377,7 @@ static void vc4_crtc_config_pv(struct dr
- PV_VCONTROL_CONTINUOUS |
- (is_dsi ? PV_VCONTROL_DSI : 0) |
- PV_VCONTROL_INTERLACE |
-- VC4_SET_FIELD(mode->htotal * pixel_rep / 2,
-+ VC4_SET_FIELD(mode->htotal * pixel_rep / (2 * ppc),
- PV_VCONTROL_ODD_DELAY));
- CRTC_WRITE(PV_VSYNCD_EVEN, 0);
- } else {
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -841,12 +841,12 @@ static void vc4_hdmi_set_timings(struct
- VC4_HDMI_VERTA_VFP) |
- VC4_SET_FIELD(mode->crtc_vdisplay, VC4_HDMI_VERTA_VAL));
- u32 vertb = (VC4_SET_FIELD(0, VC4_HDMI_VERTB_VSPO) |
-- VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end,
-+ VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end +
-+ interlaced,
- VC4_HDMI_VERTB_VBP));
- u32 vertb_even = (VC4_SET_FIELD(0, VC4_HDMI_VERTB_VSPO) |
- VC4_SET_FIELD(mode->crtc_vtotal -
-- mode->crtc_vsync_end -
-- interlaced,
-+ mode->crtc_vsync_end,
- VC4_HDMI_VERTB_VBP));
- unsigned long flags;
-
-@@ -892,12 +892,12 @@ static void vc5_hdmi_set_timings(struct
- VC5_HDMI_VERTA_VFP) |
- VC4_SET_FIELD(mode->crtc_vdisplay, VC5_HDMI_VERTA_VAL));
- u32 vertb = (VC4_SET_FIELD(0, VC5_HDMI_VERTB_VSPO) |
-- VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end,
-+ VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end +
-+ interlaced,
- VC4_HDMI_VERTB_VBP));
- u32 vertb_even = (VC4_SET_FIELD(0, VC5_HDMI_VERTB_VSPO) |
- VC4_SET_FIELD(mode->crtc_vtotal -
-- mode->crtc_vsync_end -
-- interlaced,
-+ mode->crtc_vsync_end,
- VC4_HDMI_VERTB_VBP));
- unsigned long flags;
- unsigned char gcp;
+++ /dev/null
-From 6847ea09ea00a9c56d33b4cbaf971c20a08e92f7 Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Mon, 12 Jul 2021 12:27:59 +0100
-Subject: [PATCH] drm/vc4: Fix margin calculations for the right/bottom
- edges
-
-The calculations clipped the right/bottom edge of the clipped
-range based on the left/top margins.
-
-Fixes: 666e73587f90 ("drm/vc4: Take margin setup into account when updating planes")
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_plane.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_plane.c
-+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -310,16 +310,16 @@ static int vc4_plane_margins_adj(struct
- adjhdisplay,
- crtc_state->mode.hdisplay);
- vc4_pstate->crtc_x += left;
-- if (vc4_pstate->crtc_x > crtc_state->mode.hdisplay - left)
-- vc4_pstate->crtc_x = crtc_state->mode.hdisplay - left;
-+ if (vc4_pstate->crtc_x > crtc_state->mode.hdisplay - right)
-+ vc4_pstate->crtc_x = crtc_state->mode.hdisplay - right;
-
- adjvdisplay = crtc_state->mode.vdisplay - (top + bottom);
- vc4_pstate->crtc_y = DIV_ROUND_CLOSEST(vc4_pstate->crtc_y *
- adjvdisplay,
- crtc_state->mode.vdisplay);
- vc4_pstate->crtc_y += top;
-- if (vc4_pstate->crtc_y > crtc_state->mode.vdisplay - top)
-- vc4_pstate->crtc_y = crtc_state->mode.vdisplay - top;
-+ if (vc4_pstate->crtc_y > crtc_state->mode.vdisplay - bottom)
-+ vc4_pstate->crtc_y = crtc_state->mode.vdisplay - bottom;
-
- vc4_pstate->crtc_w = DIV_ROUND_CLOSEST(vc4_pstate->crtc_w *
- adjhdisplay,
minor->debugfs_root, &vc4->load_tracker_enabled);
--- a/drivers/gpu/drm/vc4/vc4_drv.c
+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -226,6 +226,18 @@ const struct of_device_id vc4_dma_range_
+@@ -235,6 +235,18 @@ const struct of_device_id vc4_dma_range_
{}
};
static int vc4_drm_bind(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
-@@ -289,7 +301,7 @@ static int vc4_drm_bind(struct device *d
+@@ -308,7 +320,7 @@ static int vc4_drm_bind(struct device *d
if (ret)
return ret;
ret = rpi_firmware_property(firmware,
RPI_FIRMWARE_NOTIFY_DISPLAY_DONE,
NULL, 0);
-@@ -303,16 +315,20 @@ static int vc4_drm_bind(struct device *d
+@@ -322,16 +334,20 @@ static int vc4_drm_bind(struct device *d
if (ret)
return ret;
ret = drm_dev_register(drm, 0);
if (ret < 0)
-@@ -359,6 +375,7 @@ static struct platform_driver *const com
+@@ -378,6 +394,7 @@ static struct platform_driver *const com
&vc4_dsi_driver,
&vc4_txp_driver,
&vc4_crtc_driver,
--- a/sound/usb/quirks.c
+++ b/sound/usb/quirks.c
-@@ -1921,6 +1921,8 @@ static const struct usb_audio_quirk_flag
+@@ -1923,6 +1923,8 @@ static const struct usb_audio_quirk_flag
QUIRK_FLAG_GENERIC_IMPLICIT_FB),
DEVICE_FLG(0x2b53, 0x0031, /* Fiero SC-01 (firmware v1.1.0) */
QUIRK_FLAG_GENERIC_IMPLICIT_FB),
+++ /dev/null
-From 671b5b9af51bd5296d4fe76155b3ba75c99000b9 Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Mon, 13 Sep 2021 17:30:18 +0100
-Subject: [PATCH] drm/vc4: Reset HDMI MISC_CONTROL register.
-
-The HDMI block can repeat pixels for double clocked modes,
-and the firmware is now configuring the block to do this as
-the PV is doing it incorrectly when at 2pixels/clock.
-If the kernel doesn't reset it then we end up with strange
-modes.
-
-Reset MISC_CONTROL.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 8 ++++++++
- drivers/gpu/drm/vc4/vc4_hdmi_regs.h | 3 +++
- 2 files changed, 11 insertions(+)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -79,6 +79,9 @@
- #define VC5_HDMI_VERTB_VSPO_SHIFT 16
- #define VC5_HDMI_VERTB_VSPO_MASK VC4_MASK(29, 16)
-
-+#define VC5_HDMI_MISC_CONTROL_PIXEL_REP_SHIFT 0
-+#define VC5_HDMI_MISC_CONTROL_PIXEL_REP_MASK VC4_MASK(3, 0)
-+
- #define VC5_HDMI_SCRAMBLER_CTL_ENABLE BIT(0)
-
- #define VC5_HDMI_DEEP_COLOR_CONFIG_1_INIT_PACK_PHASE_SHIFT 8
-@@ -963,6 +966,11 @@ static void vc5_hdmi_set_timings(struct
- reg |= gcp_en ? VC5_HDMI_GCP_CONFIG_GCP_ENABLE : 0;
- HDMI_WRITE(HDMI_GCP_CONFIG, reg);
-
-+ reg = HDMI_READ(HDMI_MISC_CONTROL);
-+ reg &= ~VC5_HDMI_MISC_CONTROL_PIXEL_REP_MASK;
-+ reg |= VC4_SET_FIELD(0, VC5_HDMI_MISC_CONTROL_PIXEL_REP);
-+ HDMI_WRITE(HDMI_MISC_CONTROL, reg);
-+
- HDMI_WRITE(HDMI_CLOCK_STOP, 0);
-
- spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
---- a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
-@@ -125,6 +125,7 @@ enum vc4_hdmi_field {
- HDMI_VERTB0,
- HDMI_VERTB1,
- HDMI_VID_CTL,
-+ HDMI_MISC_CONTROL,
- };
-
- struct vc4_hdmi_register {
-@@ -235,6 +236,7 @@ static const struct vc4_hdmi_register __
- VC4_HDMI_REG(HDMI_VERTB0, 0x0f0),
- VC4_HDMI_REG(HDMI_VERTA1, 0x0f4),
- VC4_HDMI_REG(HDMI_VERTB1, 0x0f8),
-+ VC4_HDMI_REG(HDMI_MISC_CONTROL, 0x100),
- VC4_HDMI_REG(HDMI_MAI_CHANNEL_MAP, 0x09c),
- VC4_HDMI_REG(HDMI_MAI_CONFIG, 0x0a0),
- VC4_HDMI_REG(HDMI_DEEP_COLOR_CONFIG_1, 0x170),
-@@ -315,6 +317,7 @@ static const struct vc4_hdmi_register __
- VC4_HDMI_REG(HDMI_VERTB0, 0x0f0),
- VC4_HDMI_REG(HDMI_VERTA1, 0x0f4),
- VC4_HDMI_REG(HDMI_VERTB1, 0x0f8),
-+ VC4_HDMI_REG(HDMI_MISC_CONTROL, 0x100),
- VC4_HDMI_REG(HDMI_MAI_CHANNEL_MAP, 0x09c),
- VC4_HDMI_REG(HDMI_MAI_CONFIG, 0x0a0),
- VC4_HDMI_REG(HDMI_DEEP_COLOR_CONFIG_1, 0x170),
+++ /dev/null
-From 51f5523151d8de2b1476482e575bb5989e55ba16 Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Tue, 6 Jul 2021 18:53:28 +0100
-Subject: [PATCH] drm/vc4: Release workaround buffer and DMA in error
- paths and unbind
-
-On Pi0-3 the driver allocates a buffer and requests a DMA channel
-because the ARM can't write to DSI1's registers directly.
-However unbind and the error paths in bind don't release the buffer or
-the DMA channel.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_dsi.c | 51 ++++++++++++++++++++++++++---------
- 1 file changed, 39 insertions(+), 12 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_dsi.c
-+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
-@@ -1612,7 +1612,7 @@ static int vc4_dsi_bind(struct device *d
- if (ret != -EPROBE_DEFER)
- DRM_ERROR("Failed to get DMA channel: %d\n",
- ret);
-- return ret;
-+ goto err_free_dma_mem;
- }
-
- /* Get the physical address of the device's registers. The
-@@ -1641,7 +1641,7 @@ static int vc4_dsi_bind(struct device *d
- if (ret) {
- if (ret != -EPROBE_DEFER)
- dev_err(dev, "Failed to get interrupt: %d\n", ret);
-- return ret;
-+ goto err_free_dma;
- }
-
- dsi->escape_clock = devm_clk_get(dev, "escape");
-@@ -1649,7 +1649,7 @@ static int vc4_dsi_bind(struct device *d
- ret = PTR_ERR(dsi->escape_clock);
- if (ret != -EPROBE_DEFER)
- dev_err(dev, "Failed to get escape clock: %d\n", ret);
-- return ret;
-+ goto err_free_dma;
- }
-
- dsi->pll_phy_clock = devm_clk_get(dev, "phy");
-@@ -1657,7 +1657,7 @@ static int vc4_dsi_bind(struct device *d
- ret = PTR_ERR(dsi->pll_phy_clock);
- if (ret != -EPROBE_DEFER)
- dev_err(dev, "Failed to get phy clock: %d\n", ret);
-- return ret;
-+ goto err_free_dma;
- }
-
- dsi->pixel_clock = devm_clk_get(dev, "pixel");
-@@ -1665,7 +1665,7 @@ static int vc4_dsi_bind(struct device *d
- ret = PTR_ERR(dsi->pixel_clock);
- if (ret != -EPROBE_DEFER)
- dev_err(dev, "Failed to get pixel clock: %d\n", ret);
-- return ret;
-+ goto err_free_dma;
- }
-
- ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
-@@ -1680,33 +1680,37 @@ static int vc4_dsi_bind(struct device *d
- if (ret == -ENODEV)
- return 0;
-
-- return ret;
-+ goto err_free_dma;
- }
-
- if (panel) {
- dsi->bridge = devm_drm_panel_bridge_add_typed(dev, panel,
- DRM_MODE_CONNECTOR_DSI);
-- if (IS_ERR(dsi->bridge))
-- return PTR_ERR(dsi->bridge);
-+ if (IS_ERR(dsi->bridge)) {
-+ ret = PTR_ERR(dsi->bridge);
-+ goto err_free_dma;
-+ }
- }
-
- /* The esc clock rate is supposed to always be 100Mhz. */
- ret = clk_set_rate(dsi->escape_clock, 100 * 1000000);
- if (ret) {
- dev_err(dev, "Failed to set esc clock: %d\n", ret);
-- return ret;
-+ goto err_free_dma;
- }
-
- ret = vc4_dsi_init_phy_clocks(dsi);
- if (ret)
-- return ret;
-+ goto err_free_dma;
-
- drm_simple_encoder_init(drm, dsi->encoder, DRM_MODE_ENCODER_DSI);
- drm_encoder_helper_add(dsi->encoder, &vc4_dsi_encoder_helper_funcs);
-
- ret = drm_bridge_attach(dsi->encoder, dsi->bridge, NULL, 0);
-- if (ret)
-- return ret;
-+ if (ret) {
-+ dev_err(dev, "bridge attach failed: %d\n", ret);
-+ goto err_free_dma;
-+ }
- /* Disable the atomic helper calls into the bridge. We
- * manually call the bridge pre_enable / enable / etc. calls
- * from our driver, since we need to sequence them within the
-@@ -1719,6 +1723,19 @@ static int vc4_dsi_bind(struct device *d
- pm_runtime_enable(dev);
-
- return 0;
-+
-+err_free_dma:
-+ if (dsi->reg_dma_chan) {
-+ dma_release_channel(dsi->reg_dma_chan);
-+ dsi->reg_dma_chan = NULL;
-+ }
-+err_free_dma_mem:
-+ if (dsi->reg_dma_mem) {
-+ dma_free_coherent(dev, 4, dsi->reg_dma_mem, dsi->reg_dma_paddr);
-+ dsi->reg_dma_mem = NULL;
-+ }
-+
-+ return ret;
- }
-
- static void vc4_dsi_unbind(struct device *dev, struct device *master,
-@@ -1735,6 +1752,16 @@ static void vc4_dsi_unbind(struct device
- */
- list_splice_init(&dsi->bridge_chain, &dsi->encoder->bridge_chain);
- drm_encoder_cleanup(dsi->encoder);
-+
-+ if (dsi->reg_dma_chan) {
-+ dma_release_channel(dsi->reg_dma_chan);
-+ dsi->reg_dma_chan = NULL;
-+ }
-+
-+ if (dsi->reg_dma_mem) {
-+ dma_free_coherent(dev, 4, dsi->reg_dma_mem, dsi->reg_dma_paddr);
-+ dsi->reg_dma_mem = NULL;
-+ }
- }
-
- static const struct component_ops vc4_dsi_ops = {
+++ /dev/null
-From 06c340cc854b1c8c275968c2830fbe8a5c3b0e4e Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Fri, 18 Jun 2021 21:52:28 +0100
-Subject: [PATCH] drm/vc4: Correct DSI divider calculations
-
-The divider calculations tried to find the divider
-just faster than the clock requested. However if
-it required a divider of 7 then the for loop
-aborted without handling the "error" case, and could
-end up with a clock lower than requested.
-
-Correct the loop so that we always have a clock greater
-than requested.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_dsi.c | 6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_dsi.c
-+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
-@@ -850,11 +850,9 @@ static bool vc4_dsi_encoder_mode_fixup(s
- /* Find what divider gets us a faster clock than the requested
- * pixel clock.
- */
-- for (divider = 1; divider < 8; divider++) {
-- if (parent_rate / divider < pll_clock) {
-- divider--;
-+ for (divider = 1; divider < 7; divider++) {
-+ if (parent_rate / (divider + 1) < pll_clock)
- break;
-- }
- }
-
- /* Now that we've picked a PLL divider, calculate back to its
--- a/drivers/net/phy/smsc.c
+++ b/drivers/net/phy/smsc.c
-@@ -228,12 +228,12 @@ static int lan87xx_read_status(struct ph
+@@ -230,12 +230,12 @@ static int lan87xx_read_status(struct ph
if (rc < 0)
return rc;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -2558,7 +2558,8 @@ static int vc4_hdmi_bind(struct device *
+@@ -2556,7 +2556,8 @@ static int vc4_hdmi_bind(struct device *
* vc4_hdmi_disable_scrambling() will thus run at boot, make
* sure it's disabled, and avoid any inconsistency.
*/
/* HDMI audio codec callbacks */
static void vc4_hdmi_audio_set_mai_clock(struct vc4_hdmi *vc4_hdmi,
unsigned int samplerate)
-@@ -2779,6 +2785,7 @@ static const struct vc4_hdmi_variant bcm
+@@ -2777,6 +2783,7 @@ static const struct vc4_hdmi_variant bcm
.phy_rng_disable = vc5_hdmi_phy_rng_disable,
.channel_map = vc5_hdmi_channel_map,
.supports_hdr = true,
};
static const struct vc4_hdmi_variant bcm2711_hdmi1_variant = {
-@@ -2807,6 +2814,7 @@ static const struct vc4_hdmi_variant bcm
+@@ -2805,6 +2812,7 @@ static const struct vc4_hdmi_variant bcm
.phy_rng_disable = vc5_hdmi_phy_rng_disable,
.channel_map = vc5_hdmi_channel_map,
.supports_hdr = true,
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -2195,7 +2195,6 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -2193,7 +2193,6 @@ static int vc4_hdmi_cec_init(struct vc4_
struct platform_device *pdev = vc4_hdmi->pdev;
struct device *dev = &pdev->dev;
unsigned long flags;
int ret;
if (!of_find_property(dev->of_node, "interrupts", NULL)) {
-@@ -2214,15 +2213,6 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -2212,15 +2211,6 @@ static int vc4_hdmi_cec_init(struct vc4_
cec_fill_conn_info_from_drm(&conn_info, &vc4_hdmi->connector);
cec_s_conn_info(vc4_hdmi->cec_adap, &conn_info);
if (vc4_hdmi->variant->external_irq_controller) {
ret = request_threaded_irq(platform_get_irq_byname(pdev, "cec-rx"),
vc4_cec_irq_handler_rx_bare,
-@@ -2285,6 +2275,29 @@ static void vc4_hdmi_cec_exit(struct vc4
+@@ -2283,6 +2273,29 @@ static void vc4_hdmi_cec_exit(struct vc4
cec_unregister_adapter(vc4_hdmi->cec_adap);
}
#else
static int vc4_hdmi_cec_init(struct vc4_hdmi *vc4_hdmi)
{
-@@ -2293,6 +2306,10 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -2291,6 +2304,10 @@ static int vc4_hdmi_cec_init(struct vc4_
static void vc4_hdmi_cec_exit(struct vc4_hdmi *vc4_hdmi) {};
#endif
static int vc4_hdmi_build_regset(struct vc4_hdmi *vc4_hdmi,
-@@ -2527,6 +2544,15 @@ static int vc4_hdmi_runtime_resume(struc
+@@ -2525,6 +2542,15 @@ static int vc4_hdmi_runtime_resume(struc
if (ret)
return ret;
return 0;
}
-@@ -2617,20 +2643,11 @@ static int vc4_hdmi_bind(struct device *
+@@ -2615,20 +2641,11 @@ static int vc4_hdmi_bind(struct device *
if (ret)
goto err_put_ddc;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -2281,7 +2281,7 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -2279,7 +2279,7 @@ static int vc4_hdmi_cec_init(struct vc4_
static void vc4_hdmi_cec_exit(struct vc4_hdmi *vc4_hdmi) {};
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -663,6 +663,48 @@ static const u32 colorspace_coeffs[2][DR
+@@ -664,6 +664,48 @@ static const u32 colorspace_coeffs[2][DR
}
};
/* Writes out a full display list for an active plane to the plane's
* private dlist state.
*/
-@@ -945,13 +987,8 @@ static int vc4_plane_mode_set(struct drm
+@@ -946,13 +988,8 @@ static int vc4_plane_mode_set(struct drm
/* Position Word 2: Source Image Size, Alpha */
vc4_state->pos2_offset = vc4_state->dlist_count;
vc4_dlist_write(vc4_state,
VC4_SET_FIELD(vc4_state->src_w[0],
SCALER_POS2_WIDTH) |
VC4_SET_FIELD(vc4_state->src_h[0],
-@@ -996,14 +1033,9 @@ static int vc4_plane_mode_set(struct drm
+@@ -997,14 +1034,9 @@ static int vc4_plane_mode_set(struct drm
vc4_dlist_write(vc4_state,
VC4_SET_FIELD(state->alpha >> 4,
SCALER5_CTL2_ALPHA) |
);
/* Position Word 1: Scaled Image Dimensions. */
-@@ -1493,6 +1525,10 @@ struct drm_plane *vc4_plane_init(struct
+@@ -1494,6 +1526,10 @@ struct drm_plane *vc4_plane_init(struct
drm_plane_helper_add(plane, &vc4_plane_helper_funcs);
drm_plane_create_alpha_property(plane);
+++ /dev/null
-From 916c79dc5a1df708d6984f5e964eaa3de7e130f2 Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Fri, 22 Oct 2021 16:48:50 +0100
-Subject: [PATCH] drm/vc4: dsi: Correct max divider to 255 (not 7)
-
-The integer divider from parent PLL to DSI clock is capable
-of going up to /255, not just /7 that the driver was trying.
-This allows for slower link frequencies on the DSI bus where
-the resolution permits.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_dsi.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_dsi.c
-+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
-@@ -850,7 +850,7 @@ static bool vc4_dsi_encoder_mode_fixup(s
- /* Find what divider gets us a faster clock than the requested
- * pixel clock.
- */
-- for (divider = 1; divider < 7; divider++) {
-+ for (divider = 1; divider < 255; divider++) {
- if (parent_rate / (divider + 1) < pll_clock)
- break;
- }
--- a/drivers/gpu/drm/bridge/panel.c
+++ b/drivers/gpu/drm/bridge/panel.c
-@@ -79,6 +79,10 @@ static int panel_bridge_attach(struct dr
+@@ -80,6 +80,10 @@ static int panel_bridge_attach(struct dr
return ret;
}
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
-@@ -560,6 +560,17 @@ config DRM_PANEL_SONY_ACX565AKM
+@@ -562,6 +562,17 @@ config DRM_PANEL_SONY_ACX565AKM
Say Y here if you want to enable support for the Sony ACX565AKM
800x600 3.5" panel (found on the Nokia N900).
--- a/drivers/net/phy/smsc.c
+++ b/drivers/net/phy/smsc.c
-@@ -218,6 +218,8 @@ static int lan87xx_read_status(struct ph
+@@ -220,6 +220,8 @@ static int lan87xx_read_status(struct ph
int err = genphy_read_status(phydev);
- if (!phydev->link && priv->energy_enable) {
+ if (!phydev->link && priv->energy_enable && phydev->irq == PHY_POLL) {
+ int energy_detected;
+
/* Disable EDPD to wake up PHY */
int rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS);
if (rc < 0)
-@@ -233,7 +235,7 @@ static int lan87xx_read_status(struct ph
+@@ -235,7 +237,7 @@ static int lan87xx_read_status(struct ph
*/
read_poll_timeout(phy_read, rc,
rc & MII_LAN83C185_ENERGYON || rc < 0,
MII_LAN83C185_CTRL_STATUS);
if (rc < 0)
return rc;
-@@ -243,10 +245,16 @@ static int lan87xx_read_status(struct ph
+@@ -245,10 +247,16 @@ static int lan87xx_read_status(struct ph
if (rc < 0)
return rc;
break;
}
-@@ -1667,7 +1667,7 @@ static int vc4_dsi_bind(struct device *d
+@@ -1687,9 +1687,9 @@ static int vc4_dsi_bind(struct device *d
+ return ret;
}
- ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
-- &panel, &dsi->bridge);
-+ &panel, &dsi->out_bridge);
- if (ret) {
- /* If the bridge or panel pointed by dev->of_node is not
- * enabled, just return 0 here so that we don't prevent the DRM
-@@ -1682,10 +1682,10 @@ static int vc4_dsi_bind(struct device *d
- }
+- dsi->bridge = devm_drm_of_get_bridge(dev, dev->of_node, 0, 0);
+- if (IS_ERR(dsi->bridge))
+- return PTR_ERR(dsi->bridge);
++ dsi->out_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 0, 0);
++ if (IS_ERR(dsi->out_bridge))
++ return PTR_ERR(dsi->out_bridge);
- if (panel) {
-- dsi->bridge = devm_drm_panel_bridge_add_typed(dev, panel,
-- DRM_MODE_CONNECTOR_DSI);
-- if (IS_ERR(dsi->bridge)) {
-- ret = PTR_ERR(dsi->bridge);
-+ dsi->out_bridge = devm_drm_panel_bridge_add_typed(dev, panel,
-+ DRM_MODE_CONNECTOR_DSI);
-+ if (IS_ERR(dsi->out_bridge)) {
-+ ret = PTR_ERR(dsi->out_bridge);
- goto err_free_dma;
- }
- }
-@@ -1704,7 +1704,7 @@ static int vc4_dsi_bind(struct device *d
+ /* The esc clock rate is supposed to always be 100Mhz. */
+ ret = clk_set_rate(dsi->escape_clock, 100 * 1000000);
+@@ -1705,7 +1705,7 @@ static int vc4_dsi_bind(struct device *d
drm_simple_encoder_init(drm, dsi->encoder, DRM_MODE_ENCODER_DSI);
drm_encoder_helper_add(dsi->encoder, &vc4_dsi_encoder_helper_funcs);
- ret = drm_bridge_attach(dsi->encoder, dsi->bridge, NULL, 0);
+ ret = drm_bridge_attach(dsi->encoder, dsi->out_bridge, NULL, 0);
- if (ret) {
- dev_err(dev, "bridge attach failed: %d\n", ret);
- goto err_free_dma;
-@@ -1741,7 +1741,7 @@ static void vc4_dsi_unbind(struct device
- {
- struct vc4_dsi *dsi = dev_get_drvdata(dev);
-
-- if (dsi->bridge)
-+ if (dsi->out_bridge)
- pm_runtime_disable(dev);
-
- /*
+ if (ret)
+ return ret;
+ /* Disable the atomic helper calls into the bridge. We
if (debug_dump_regs) {
struct drm_printer p = drm_info_printer(&dsi->pdev->dev);
dev_info(&dsi->pdev->dev, "DSI regs after:\n");
-@@ -1578,7 +1552,6 @@ static int vc4_dsi_bind(struct device *d
+@@ -1588,7 +1562,6 @@ static int vc4_dsi_bind(struct device *d
if (!vc4_dsi_encoder)
return -ENOMEM;
vc4_dsi_encoder->base.type = dsi->variant->port ?
VC4_ENCODER_TYPE_DSI1 : VC4_ENCODER_TYPE_DSI0;
vc4_dsi_encoder->dsi = dsi;
-@@ -1718,12 +1691,6 @@ static int vc4_dsi_bind(struct device *d
- dev_err(dev, "bridge attach failed: %d\n", ret);
- goto err_free_dma;
- }
+@@ -1717,12 +1690,6 @@ static int vc4_dsi_bind(struct device *d
+ ret = drm_bridge_attach(dsi->encoder, dsi->out_bridge, NULL, 0);
+ if (ret)
+ return ret;
- /* Disable the atomic helper calls into the bridge. We
- * manually call the bridge pre_enable / enable / etc. calls
- * from our driver, since we need to sequence them within the
vc4_debugfs_add_regset32(drm, dsi->variant->debugfs_name, &dsi->regset);
-@@ -1753,11 +1720,6 @@ static void vc4_dsi_unbind(struct device
- if (dsi->out_bridge)
- pm_runtime_disable(dev);
+@@ -1738,11 +1705,6 @@ static void vc4_dsi_unbind(struct device
+
+ pm_runtime_disable(dev);
- /*
- * Restore the bridge_chain so the bridge detach procedure can happen
- */
- list_splice_init(&dsi->bridge_chain, &dsi->encoder->bridge_chain);
drm_encoder_cleanup(dsi->encoder);
+ }
- if (dsi->reg_dma_chan) {
};
static const struct vc4_dsi_variant bcm2711_dsi1_variant = {
-@@ -1691,9 +1744,8 @@ static int vc4_dsi_bind(struct device *d
- goto err_free_dma;
+@@ -1692,9 +1745,8 @@ static int vc4_dsi_bind(struct device *d
+ return ret;
drm_simple_encoder_init(drm, dsi->encoder, DRM_MODE_ENCODER_DSI);
- drm_encoder_helper_add(dsi->encoder, &vc4_dsi_encoder_helper_funcs);
- ret = drm_bridge_attach(dsi->encoder, dsi->out_bridge, NULL, 0);
+ ret = drm_bridge_attach(dsi->encoder, &dsi->bridge, NULL, 0);
- if (ret) {
- dev_err(dev, "bridge attach failed: %d\n", ret);
- goto err_free_dma;
-@@ -1755,6 +1807,10 @@ static int vc4_dsi_dev_probe(struct plat
+ if (ret)
+ return ret;
+
+@@ -1730,6 +1782,10 @@ static int vc4_dsi_dev_probe(struct plat
return -ENOMEM;
dev_set_drvdata(dev, dsi);
--- a/drivers/gpu/drm/drm_bridge.c
+++ b/drivers/gpu/drm/drm_bridge.c
-@@ -463,20 +463,15 @@ EXPORT_SYMBOL(drm_bridge_chain_disable);
+@@ -462,20 +462,15 @@ EXPORT_SYMBOL(drm_bridge_chain_disable);
* encoder chain, starting from the first bridge to the last. These are called
* after completing the encoder's prepare op.
*
}
EXPORT_SYMBOL(drm_bridge_chain_post_disable);
-@@ -518,24 +513,14 @@ EXPORT_SYMBOL(drm_bridge_chain_mode_set)
+@@ -517,24 +512,14 @@ EXPORT_SYMBOL(drm_bridge_chain_mode_set)
* chain, starting from the last bridge to the first. These are called
* before calling the encoder's commit op.
*
}
EXPORT_SYMBOL(drm_bridge_chain_pre_enable);
-@@ -607,6 +592,25 @@ void drm_atomic_bridge_chain_disable(str
+@@ -606,6 +591,25 @@ void drm_atomic_bridge_chain_disable(str
}
EXPORT_SYMBOL(drm_atomic_bridge_chain_disable);
/**
* drm_atomic_bridge_chain_post_disable - cleans up after disabling all bridges
* in the encoder chain
-@@ -617,6 +621,9 @@ EXPORT_SYMBOL(drm_atomic_bridge_chain_di
+@@ -616,6 +620,9 @@ EXPORT_SYMBOL(drm_atomic_bridge_chain_di
* &drm_bridge_funcs.post_disable) op for all the bridges in the encoder chain,
* starting from the first bridge to the last. These are called after completing
* &drm_encoder_helper_funcs.atomic_disable
*
* Note: the bridge passed should be the one closest to the encoder
*/
-@@ -624,30 +631,75 @@ void drm_atomic_bridge_chain_post_disabl
+@@ -623,30 +630,75 @@ void drm_atomic_bridge_chain_post_disabl
struct drm_atomic_state *old_state)
{
struct drm_encoder *encoder;
/**
* drm_atomic_bridge_chain_pre_enable - prepares for enabling all bridges in
* the encoder chain
-@@ -659,33 +711,62 @@ EXPORT_SYMBOL(drm_atomic_bridge_chain_po
+@@ -658,33 +710,62 @@ EXPORT_SYMBOL(drm_atomic_bridge_chain_po
* starting from the last bridge to the first. These are called before calling
* &drm_encoder_helper_funcs.atomic_enable
*
--- a/drivers/gpu/drm/bridge/panel.c
+++ b/drivers/gpu/drm/bridge/panel.c
-@@ -225,6 +225,9 @@ struct drm_bridge *drm_panel_bridge_add_
+@@ -226,6 +226,9 @@ struct drm_bridge *drm_panel_bridge_add_
panel_bridge->bridge.ops = DRM_BRIDGE_OP_MODES;
panel_bridge->bridge.type = connector_type;
if (ret)
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -1572,9 +1572,14 @@ struct drm_plane *vc4_plane_init(struct
+@@ -1573,9 +1573,14 @@ struct drm_plane *vc4_plane_init(struct
DRM_COLOR_YCBCR_BT709,
DRM_COLOR_YCBCR_LIMITED_RANGE);
int vc4_plane_create_additional_planes(struct drm_device *drm)
{
struct drm_plane *cursor_plane;
-@@ -1590,7 +1595,7 @@ int vc4_plane_create_additional_planes(s
+@@ -1591,7 +1596,7 @@ int vc4_plane_create_additional_planes(s
* modest number of planes to expose, that should hopefully
* still cover any sane usecase.
*/
struct drm_plane *plane =
vc4_plane_init(drm, DRM_PLANE_TYPE_OVERLAY);
-@@ -1599,17 +1604,28 @@ int vc4_plane_create_additional_planes(s
+@@ -1600,17 +1605,28 @@ int vc4_plane_create_additional_planes(s
plane->possible_crtcs =
GENMASK(drm->mode_config.num_crtc - 1, 0);
return VC4_SCALING_PPF;
else
return VC4_SCALING_TPZ;
-@@ -388,14 +388,10 @@ static int vc4_plane_setup_clipping_and_
+@@ -388,15 +388,10 @@ static int vc4_plane_setup_clipping_and_
for (i = 0; i < num_planes; i++)
vc4_state->offsets[i] = bo->paddr + fb->offsets[i];
-- /* We don't support subpixel source positioning for scaling,
+- /*
+- * We don't support subpixel source positioning for scaling,
- * but fractional coordinates can be generated by clipping
- * so just round for now
- */
-- vc4_state->src_x = DIV_ROUND_CLOSEST(state->src.x1, 1<<16);
-- vc4_state->src_y = DIV_ROUND_CLOSEST(state->src.y1, 1<<16);
-- vc4_state->src_w[0] = DIV_ROUND_CLOSEST(state->src.x2, 1<<16) - vc4_state->src_x;
-- vc4_state->src_h[0] = DIV_ROUND_CLOSEST(state->src.y2, 1<<16) - vc4_state->src_y;
+- vc4_state->src_x = DIV_ROUND_CLOSEST(state->src.x1, 1 << 16);
+- vc4_state->src_y = DIV_ROUND_CLOSEST(state->src.y1, 1 << 16);
+- vc4_state->src_w[0] = DIV_ROUND_CLOSEST(state->src.x2, 1 << 16) - vc4_state->src_x;
+- vc4_state->src_h[0] = DIV_ROUND_CLOSEST(state->src.y2, 1 << 16) - vc4_state->src_y;
+ vc4_state->src_x = state->src.x1;
+ vc4_state->src_y = state->src.y1;
+ vc4_state->src_w[0] = state->src.x2 - vc4_state->src_x;
vc4_state->crtc_x = state->dst.x1;
vc4_state->crtc_y = state->dst.y1;
-@@ -448,7 +444,7 @@ static void vc4_write_tpz(struct vc4_pla
+@@ -449,7 +444,7 @@ static void vc4_write_tpz(struct vc4_pla
{
u32 scale, recip;
/* The specs note that while the reciprocal would be defined
* as (1<<32)/scale, ~0 is close enough.
-@@ -494,7 +490,7 @@ static u32 vc4_lbm_size(struct drm_plane
+@@ -495,7 +490,7 @@ static u32 vc4_lbm_size(struct drm_plane
if (vc4_state->x_scaling[0] == VC4_SCALING_TPZ)
pix_per_line = vc4_state->crtc_w;
else
if (!vc4_state->is_yuv) {
if (vc4_state->y_scaling[0] == VC4_SCALING_TPZ)
-@@ -585,7 +581,8 @@ static void vc4_plane_calc_load(struct d
+@@ -586,7 +581,8 @@ static void vc4_plane_calc_load(struct d
for (i = 0; i < fb->format->num_planes; i++) {
/* Even if the bandwidth/plane required for a single frame is
*
*
* when downscaling, we have to read more pixels per line in
* the time frame reserved for a single line, so the bandwidth
-@@ -594,11 +591,11 @@ static void vc4_plane_calc_load(struct d
+@@ -595,11 +591,11 @@ static void vc4_plane_calc_load(struct d
* load by this number. We're likely over-estimating the read
* demand, but that's better than under-estimating it.
*/
vc4_state->hvs_load += vc4_state->crtc_h * vc4_state->crtc_w;
}
-@@ -751,7 +748,8 @@ static int vc4_plane_mode_set(struct drm
+@@ -752,7 +748,8 @@ static int vc4_plane_mode_set(struct drm
bool mix_plane_alpha;
bool covers_screen;
u32 scl0, scl1, pitch0;
u32 hvs_format = format->hvs;
unsigned int rotation;
int ret, i;
-@@ -763,6 +761,9 @@ static int vc4_plane_mode_set(struct drm
+@@ -764,6 +761,9 @@ static int vc4_plane_mode_set(struct drm
if (ret)
return ret;
/* SCL1 is used for Cb/Cr scaling of planar formats. For RGB
* and 4:4:4, scl1 should be set to scl0 so both channels of
* the scaler do the same thing. For YUV, the Y plane needs
-@@ -783,9 +784,11 @@ static int vc4_plane_mode_set(struct drm
+@@ -784,9 +784,11 @@ static int vc4_plane_mode_set(struct drm
DRM_MODE_REFLECT_Y);
/* We must point to the last line when Y reflection is enabled. */
switch (base_format_mod) {
case DRM_FORMAT_MOD_LINEAR:
-@@ -800,7 +803,7 @@ static int vc4_plane_mode_set(struct drm
+@@ -801,7 +803,7 @@ static int vc4_plane_mode_set(struct drm
(i ? v_subsample : 1) *
fb->pitches[i];
(i ? h_subsample : 1) *
fb->format->cpp[i];
}
-@@ -823,7 +826,7 @@ static int vc4_plane_mode_set(struct drm
+@@ -824,7 +826,7 @@ static int vc4_plane_mode_set(struct drm
* pitch * tile_h == tile_size * tiles_per_row
*/
u32 tiles_w = fb->pitches[0] >> (tile_size_shift - tile_h_shift);
u32 tiles_r = tiles_w - tiles_l;
u32 tiles_t = src_y >> tile_h_shift;
/* Intra-tile offsets, which modify the base address (the
-@@ -833,7 +836,7 @@ static int vc4_plane_mode_set(struct drm
+@@ -834,7 +836,7 @@ static int vc4_plane_mode_set(struct drm
u32 tile_y = (src_y >> 4) & 1;
u32 subtile_y = (src_y >> 2) & 3;
u32 utile_y = src_y & 3;
u32 y_off = src_y & tile_h_mask;
/* When Y reflection is requested we must set the
-@@ -929,7 +932,7 @@ static int vc4_plane_mode_set(struct drm
+@@ -930,7 +932,7 @@ static int vc4_plane_mode_set(struct drm
* of the 12-pixels in that 128-bit word is the
* first pixel to be used
*/
u32 aligned = remaining_pixels / 12;
u32 last_bits = remaining_pixels % 12;
-@@ -951,12 +954,12 @@ static int vc4_plane_mode_set(struct drm
+@@ -952,12 +954,12 @@ static int vc4_plane_mode_set(struct drm
return -EINVAL;
}
pix_per_tile = tile_w / fb->format->cpp[0];
vc4_state->offsets[i] += param * tile_w * tile;
vc4_state->offsets[i] += src_y /
-@@ -1017,10 +1020,8 @@ static int vc4_plane_mode_set(struct drm
+@@ -1018,10 +1020,8 @@ static int vc4_plane_mode_set(struct drm
vc4_dlist_write(vc4_state,
(mix_plane_alpha ? SCALER_POS2_ALPHA_MIX : 0) |
vc4_hvs4_get_alpha_blend_mode(state) |
/* Position Word 3: Context. Written by the HVS. */
vc4_dlist_write(vc4_state, 0xc0c0c0c0);
-@@ -1078,10 +1079,8 @@ static int vc4_plane_mode_set(struct drm
+@@ -1079,10 +1079,8 @@ static int vc4_plane_mode_set(struct drm
/* Position Word 2: Source Image Size */
vc4_state->pos2_offset = vc4_state->dlist_count;
vc4_dlist_write(vc4_state,
drm_dbg_atomic(&dev_priv->drm,
--- a/drivers/gpu/drm/msm/msm_atomic.c
+++ b/drivers/gpu/drm/msm/msm_atomic.c
-@@ -246,6 +246,8 @@ void msm_atomic_commit_tail(struct drm_a
+@@ -231,6 +231,8 @@ void msm_atomic_commit_tail(struct drm_a
/* async updates are limited to single-crtc updates: */
WARN_ON(crtc_mask != drm_crtc_mask(async_crtc));
return MODE_CLOCK_HIGH;
if (info->max_tmds_clock && clock > (info->max_tmds_clock * 1000))
-@@ -3158,14 +3160,6 @@ static int vc4_hdmi_bind(struct device *
+@@ -3156,14 +3158,6 @@ static int vc4_hdmi_bind(struct device *
vc4_hdmi->disable_wifi_frequencies =
of_property_read_bool(dev->of_node, "wifi-2.4ghz-coexistence");
*/
--- a/drivers/gpu/drm/vc4/vc4_drv.c
+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -246,10 +246,13 @@ static int vc4_drm_bind(struct device *d
+@@ -255,10 +255,13 @@ static int vc4_drm_bind(struct device *d
struct vc4_dev *vc4;
struct device_node *node;
struct drm_crtc *crtc;
/* If VC4 V3D is missing, don't advertise render nodes. */
node = of_find_matching_node_and_match(NULL, vc4_v3d_dt_match, NULL);
if (!node || !of_device_is_available(node))
-@@ -269,6 +272,7 @@ static int vc4_drm_bind(struct device *d
+@@ -288,6 +291,7 @@ static int vc4_drm_bind(struct device *d
vc4 = devm_drm_dev_alloc(dev, &vc4_drm_driver, struct vc4_dev, base);
if (IS_ERR(vc4))
return PTR_ERR(vc4);
static int compare_dev(struct device *dev, void *data)
{
return dev == data;
-@@ -254,6 +288,7 @@ static bool firmware_kms(void)
+@@ -263,6 +297,7 @@ static bool firmware_kms(void)
static int vc4_drm_bind(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct rpi_firmware *firmware = NULL;
struct drm_device *drm;
struct vc4_dev *vc4;
-@@ -265,12 +300,10 @@ static int vc4_drm_bind(struct device *d
+@@ -274,12 +309,10 @@ static int vc4_drm_bind(struct device *d
dev->coherent_dma_mask = DMA_BIT_MASK(32);
is_vc5 = of_device_is_compatible(dev->of_node, "brcm,bcm2711-vc5");
node = of_find_matching_node_and_match(NULL, vc4_dma_range_matches,
NULL);
-@@ -282,7 +315,7 @@ static int vc4_drm_bind(struct device *d
+@@ -301,7 +334,7 @@ static int vc4_drm_bind(struct device *d
return ret;
}
if (IS_ERR(vc4))
return PTR_ERR(vc4);
vc4->is_vc5 = is_vc5;
-@@ -314,7 +347,7 @@ static int vc4_drm_bind(struct device *d
+@@ -333,7 +366,7 @@ static int vc4_drm_bind(struct device *d
return -EPROBE_DEFER;
}
--- a/drivers/gpu/drm/vc4/vc4_drv.c
+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -324,19 +324,23 @@ static int vc4_drm_bind(struct device *d
+@@ -343,19 +343,23 @@ static int vc4_drm_bind(struct device *d
platform_set_drvdata(pdev, drm);
INIT_LIST_HEAD(&vc4->debugfs_list);
--- a/drivers/mmc/core/block.c
+++ b/drivers/mmc/core/block.c
@@ -1870,7 +1870,11 @@ static void mmc_blk_mq_rw_recovery(struc
+ return;
}
- /* FIXME: Missing single sector read for large sector size */
-- if (!mmc_large_sector(card) && rq_data_dir(req) == READ &&
+- if (rq_data_dir(req) == READ && brq->data.blocks >
+ /*
+ * XXX: don't do single-sector reads, as it leaks a SG DMA
+ * mapping when reusing the still-pending req.
+ */
-+ if (0 && !mmc_large_sector(card) && rq_data_dir(req) == READ &&
- brq->data.blocks > 1) {
- /* Read one sector at a time */
++ if (0 && rq_data_dir(req) == READ && brq->data.blocks >
+ queue_physical_block_size(mq->queue) >> 9) {
+ /* Read one (native) sector at a time */
mmc_blk_read_single(mq, req);
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
-@@ -157,6 +157,10 @@ dtb-$(CONFIG_ARCH_BCM_NSP) += \
+@@ -158,6 +158,10 @@ dtb-$(CONFIG_ARCH_BCM_NSP) += \
bcm958525xmc.dtb \
bcm958622hr.dtb \
bcm958623hr.dtb \
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
-@@ -161,6 +161,8 @@ dtb-$(CONFIG_ARCH_BCM_NSP) += \
+@@ -162,6 +162,8 @@ dtb-$(CONFIG_ARCH_BCM_NSP) += \
bcm958625-meraki-mx64-a0.dtb \
bcm958625-meraki-mx64w.dtb \
bcm958625-meraki-mx64w-a0.dtb \
+++ /dev/null
-From 935327a73553001f8d81375c76985d05f604507f Mon Sep 17 00:00:00 2001
-From: Christian Lamparter <chunkeey@gmail.com>
-Date: Sat, 18 Jun 2022 00:00:29 +0200
-Subject: [PATCH] ARM: dts: BCM5301X: Add DT for Meraki MR26
-
-Meraki MR26 is an EOL wireless access point featuring a
-PoE ethernet port and two dual-band 3x3 MIMO 802.11n
-radios and 1x1 dual-band WIFI dedicated to scanning.
-
-Thank you Amir for the unit and PSU.
-
-Hardware info:
-SOC : Broadcom BCM53015A1KFEBG (dual-core Cortex-A9 CPU at 800 MHz)
-RAM : SK Hynix Inc. H5TQ1G63EFR, 1 GBit DDR3 SDRAM = 128 MiB
-NAND : Spansion S34ML01G100TF100, 1 GBit SLC NAND Flash = 128 MiB
-ETH : 1 GBit Ethernet Port - PoE (TPS23754 PoE Interface)
-WIFI0 : Broadcom BCM43431KMLG, BCM43431 802.11 abgn (3x3:3)
-WIFI1 : Broadcom BCM43431KMLG, BCM43431 802.11 abgn (3x3:3)
-WIFI2 : Broadcom BCM43428 "Air Marshal" 802.11 abgn (1x1:1)
-BUTTON: One reset key behind a small hole next to the Ethernet Port
-LEDS : One amber (fault), one white (indicator) LED, separate RGB-LED
-MISC : Atmel AT24C64 8KiB EEPROM i2c
- : Ti INA219 26V, 12-bit, i2c output current/voltage/power monitor
-
-SERIAL:
- WARNING: The serial port needs a TTL/RS-232 3V3 level converter!
- The Serial setting is 115200-8-N-1. The board has a populated
- right angle 1x4 0.1" pinheader.
- The pinout is: VCC (next to J3, has the pin 1 indicator), RX, TX, GND.
-
-Odd stuff:
-
-- uboot does not support lzma compression, but gzip'd uImage/DTB work.
-- uboot claims to support FIT, but fails to pass the DTB to the kernel.
- Appending the dtb after the kernel image works.
-- RGB-controller is supported through an external userspace program.
-- The ubi partition contains a "board-config" volume. It stores the
- MAC Address (0x66 in binary) and Serial No. (0x7c alpha-numerical).
-- SoC's temperature sensor always reports that it is on fire.
- This causes the system to immediately shutdown! Looking at reported
- "418 degree Celsius" suggests that this sensor is not working.
-
-WIFI:
-b43 is able to initialize all three WIFIs @ 802.11bg.
-| b43-phy0: Broadcom 43431 WLAN found (core revision 29)
-| bcma-pci-bridge 0000:01:00.0: bus1: Switched to core: 0x812
-| b43-phy0: Found PHY: Analog 9, Type 7 (HT), Revision 1
-| b43-phy0: Found Radio: Manuf 0x17F, ID 0x2059, Revision 0, Version 1
-| b43-phy0 warning: 5 GHz band is unsupported on this PHY
-| b43-phy1: Broadcom 43431 WLAN found (core revision 29)
-| bcma-pci-bridge 0001:01:00.0: bus2: Switched to core: 0x812
-| b43-phy1: Found PHY: Analog 9, Type 7 (HT), Revision 1
-| b43-phy1: Found Radio: Manuf 0x17F, ID 0x2059, Revision 0, Version 1
-| b43-phy1 warning: 5 GHz band is unsupported on this PHY
-| b43-phy2: Broadcom 43228 WLAN found (core revision 30)
-| bcma-pci-bridge 0002:01:00.0: bus3: Switched to core: 0x812
-| b43-phy2: Found PHY: Analog 9, Type 4 (N), Revision 16
-| b43-phy2: Found Radio: Manuf 0x17F, ID 0x2057, Revision 9, Version 1
-| Broadcom 43xx driver loaded [ Features: NL ]
-
-Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
----
---- /dev/null
-+++ b/arch/arm/boot/dts/bcm53015-meraki-mr26.dts
-@@ -0,0 +1,166 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+/*
-+ * Broadcom BCM470X / BCM5301X ARM platform code.
-+ * DTS for Meraki MR26 / Codename: Venom
-+ *
-+ * Copyright (C) 2022 Christian Lamparter <chunkeey@gmail.com>
-+ */
-+
-+/dts-v1/;
-+
-+#include "bcm4708.dtsi"
-+#include "bcm5301x-nand-cs0-bch8.dtsi"
-+#include <dt-bindings/leds/common.h>
-+
-+/ {
-+ compatible = "meraki,mr26", "brcm,bcm53015", "brcm,bcm4708";
-+ model = "Meraki MR26";
-+
-+ memory@0 {
-+ reg = <0x00000000 0x08000000>;
-+ device_type = "memory";
-+ };
-+
-+ leds {
-+ compatible = "gpio-leds";
-+
-+ led-0 {
-+ function = LED_FUNCTION_FAULT;
-+ color = <LED_COLOR_ID_AMBER>;
-+ gpios = <&chipcommon 13 GPIO_ACTIVE_HIGH>;
-+ panic-indicator;
-+ };
-+ led-1 {
-+ function = LED_FUNCTION_INDICATOR;
-+ color = <LED_COLOR_ID_WHITE>;
-+ gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>;
-+ };
-+ };
-+
-+ keys {
-+ compatible = "gpio-keys";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ key-restart {
-+ label = "Reset";
-+ linux,code = <KEY_RESTART>;
-+ gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
-+ };
-+ };
-+};
-+
-+&uart0 {
-+ clock-frequency = <50000000>;
-+ /delete-property/ clocks;
-+};
-+
-+&uart1 {
-+ status = "disabled";
-+};
-+
-+&gmac0 {
-+ status = "okay";
-+};
-+
-+&gmac1 {
-+ status = "disabled";
-+};
-+&gmac2 {
-+ status = "disabled";
-+};
-+&gmac3 {
-+ status = "disabled";
-+};
-+
-+&nandcs {
-+ nand-ecc-algo = "hw";
-+
-+ partitions {
-+ compatible = "fixed-partitions";
-+ #address-cells = <0x1>;
-+ #size-cells = <0x1>;
-+
-+ partition@0 {
-+ label = "u-boot";
-+ reg = <0x0 0x200000>;
-+ read-only;
-+ };
-+
-+ partition@200000 {
-+ label = "u-boot-env";
-+ reg = <0x200000 0x200000>;
-+ /* empty */
-+ };
-+
-+ partition@400000 {
-+ label = "u-boot-backup";
-+ reg = <0x400000 0x200000>;
-+ /* empty */
-+ };
-+
-+ partition@600000 {
-+ label = "u-boot-env-backup";
-+ reg = <0x600000 0x200000>;
-+ /* empty */
-+ };
-+
-+ partition@800000 {
-+ label = "ubi";
-+ reg = <0x800000 0x7780000>;
-+ };
-+ };
-+};
-+
-+&srab {
-+ status = "okay";
-+
-+ ports {
-+ port@0 {
-+ reg = <0>;
-+ label = "poe";
-+ };
-+
-+ port@5 {
-+ reg = <5>;
-+ label = "cpu";
-+ ethernet = <&gmac0>;
-+
-+ fixed-link {
-+ speed = <1000>;
-+ duplex-full;
-+ };
-+ };
-+ };
-+};
-+
-+&i2c0 {
-+ status = "okay";
-+
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinmux_i2c>;
-+
-+ clock-frequency = <100000>;
-+
-+ ina219@40 {
-+ compatible = "ti,ina219"; /* PoE power */
-+ reg = <0x40>;
-+ shunt-resistor = <60000>; /* = 60 mOhms */
-+ };
-+
-+ eeprom@56 {
-+ compatible = "atmel,24c64";
-+ reg = <0x56>;
-+ pagesize = <32>;
-+ read-only;
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+
-+ /* it's empty */
-+ };
-+};
-+
-+&thermal {
-+ status = "disabled";
-+ /* does not work, reads 418 degree Celsius */
-+};
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -128,6 +128,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
- bcm47094-luxul-xwr-3150-v1.dtb \
- bcm47094-netgear-r8500.dtb \
- bcm47094-phicomm-k3.dtb \
-+ bcm53015-meraki-mr26.dtb \
- bcm53016-meraki-mr32.dtb \
- bcm94708.dtb \
- bcm94709.dtb \
if (ret < 0) {
pr_err("%s: failed to add hogs for %pOF\n", __func__,
rd->dn);
-@@ -1035,9 +1045,11 @@ int of_gpiochip_add(struct gpio_chip *ch
+@@ -1037,9 +1047,11 @@ int of_gpiochip_add(struct gpio_chip *ch
of_node_get(chip->of_node);
.width = 2,
--- a/drivers/mtd/parsers/redboot.c
+++ b/drivers/mtd/parsers/redboot.c
-@@ -84,6 +84,7 @@ static int parse_redboot_partitions(stru
+@@ -85,6 +85,7 @@ static int parse_redboot_partitions(stru
int nulllen = 0;
int numslots;
unsigned long offset;
#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
static char nullstring[] = "unallocated";
#endif
-@@ -189,6 +190,16 @@ nogood:
+@@ -190,6 +191,16 @@ nogood:
goto out;
}
for (i = 0; i < numslots; i++) {
struct fis_list *new_fl, **prev;
-@@ -209,10 +220,10 @@ nogood:
+@@ -210,10 +221,10 @@ nogood:
goto out;
}
new_fl->img = &buf[i];
#include "gpiolib.h"
#include "gpiolib-of.h"
-@@ -1057,3 +1059,72 @@ void of_gpio_dev_init(struct gpio_chip *
+@@ -1059,3 +1061,72 @@ void of_gpio_dev_init(struct gpio_chip *
else
gc->of_node = gdev->dev.of_node;
}
+MODULE_LICENSE("GPL");
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
-@@ -4175,6 +4175,7 @@ int wake_up_state(struct task_struct *p,
+@@ -4184,6 +4184,7 @@ int wake_up_state(struct task_struct *p,
{
return try_to_wake_up(p, state, 0);
}
--- a/drivers/mtd/parsers/redboot.c
+++ b/drivers/mtd/parsers/redboot.c
-@@ -277,14 +277,21 @@ nogood:
+@@ -278,14 +278,21 @@ nogood:
#endif
names += strlen(names) + 1;
#endif /* __LINUX_USB_PCI_QUIRKS_H */
--- a/include/linux/usb/hcd.h
+++ b/include/linux/usb/hcd.h
-@@ -497,7 +497,14 @@ extern int usb_hcd_pci_probe(struct pci_
+@@ -498,7 +498,14 @@ extern int usb_hcd_pci_probe(struct pci_
extern void usb_hcd_pci_remove(struct pci_dev *dev);
extern void usb_hcd_pci_shutdown(struct pci_dev *dev);
help
--- a/init/main.c
+++ b/init/main.c
-@@ -615,6 +615,29 @@ static inline void setup_nr_cpu_ids(void
+@@ -616,6 +616,29 @@ static inline void setup_nr_cpu_ids(void
static inline void smp_prepare_cpus(unsigned int maxcpus) { }
#endif
/*
* We need to store the untouched command line for future reference.
* We also need to store the touched command line since the parameter
-@@ -955,6 +978,7 @@ asmlinkage __visible void __init __no_sa
+@@ -956,6 +979,7 @@ asmlinkage __visible void __init __no_sa
pr_notice("%s", linux_banner);
early_security_init();
setup_arch(&command_line);
obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
-@@ -190,6 +190,13 @@ config QCOM_SOCINFO
+@@ -191,6 +191,13 @@ config QCOM_SOCINFO
Say yes here to support the Qualcomm socinfo driver, providing
information about the SoC to user space.
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
-@@ -951,11 +951,78 @@ dtb-$(CONFIG_ARCH_QCOM) += \
+@@ -952,11 +952,78 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-ipq4018-ap120c-ac.dtb \
qcom-ipq4018-ap120c-ac-bit.dtb \
qcom-ipq4018-jalapeno.dtb \
}
--- a/init/main.c
+++ b/init/main.c
-@@ -113,6 +113,10 @@
+@@ -114,6 +114,10 @@
#include <kunit/test.h>
static int kernel_init(void *);
extern void init_IRQ(void);
-@@ -992,6 +996,18 @@ asmlinkage __visible void __init __no_sa
+@@ -993,6 +997,18 @@ asmlinkage __visible void __init __no_sa
pr_notice("Kernel command line: %s\n", saved_command_line);
/* parameters may set static keys */
jump_label_init();
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
-@@ -956,8 +956,30 @@ dtb-$(CONFIG_ARCH_QCOM) += \
+@@ -957,8 +957,30 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-ipq4019-ap.dk04.1-c3.dtb \
qcom-ipq4019-ap.dk07.1-c1.dtb \
qcom-ipq4019-ap.dk07.1-c2.dtb \
--- a/drivers/clk/qcom/clk-krait.c
+++ b/drivers/clk/qcom/clk-krait.c
-@@ -68,7 +68,25 @@ static u8 krait_mux_get_parent(struct cl
+@@ -73,7 +73,25 @@ static u8 krait_mux_get_parent(struct cl
return clk_mux_val_to_index(hw, mux->parent_map, 0, sel);
}
.set_parent = krait_mux_set_parent,
.get_parent = krait_mux_get_parent,
.determine_rate = __clk_mux_determine_rate_closest,
-@@ -79,8 +97,13 @@ EXPORT_SYMBOL_GPL(krait_mux_clk_ops);
+@@ -84,8 +102,13 @@ EXPORT_SYMBOL_GPL(krait_mux_clk_ops);
static long krait_div2_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
{
obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
-@@ -190,6 +190,13 @@ config QCOM_SOCINFO
+@@ -191,6 +191,13 @@ config QCOM_SOCINFO
Say yes here to support the Qualcomm socinfo driver, providing
information about the SoC to user space.
--- a/drivers/tty/serial/8250/8250.h
+++ b/drivers/tty/serial/8250/8250.h
-@@ -83,6 +83,7 @@ struct serial8250_config {
+@@ -85,6 +85,7 @@ struct serial8250_config {
#define UART_CAP_MINI BIT(17) /* Mini UART on BCM283X family lacks:
* STOP PARITY EPAR SPAR WLEN5 WLEN6
*/
},
[PORT_NPCM] = {
.name = "Nuvoton 16550",
-@@ -2766,6 +2766,11 @@ serial8250_do_set_termios(struct uart_po
+@@ -2745,6 +2745,11 @@ serial8250_do_set_termios(struct uart_po
unsigned long flags;
unsigned int baud, quot, frac = 0;
+++ /dev/null
-From dd1d420f40e75c3881a04001e6f2798492ee83c2 Mon Sep 17 00:00:00 2001
-From: Nick Hainke <vincent@systemli.org>
-Date: Thu, 30 Jun 2022 12:32:20 +0200
-Subject: [PATCH] arm64: dts: mt7622: fix BPI-R64 WPS button
-
-The bananapi R64 (BPI-R64) experiences wrong WPS button signals.
-In OpenWrt pushing the WPS button while powering on the device will set
-it to recovery mode. Currently, this also happens without any user
-interaction. In particular, the wrong signals appear while booting the
-device or restarting it, e.g. after doing a system upgrade. If the
-device is in recovery mode the user needs to manually power cycle or
-restart it.
-
-The official BPI-R64 sources set the WPS button to GPIO_ACTIVE_LOW in
-the device tree. This setting seems to suppress the unwanted WPS button
-press signals. So this commit changes the button from GPIO_ACTIVE_HIGH to
-GPIO_ACTIVE_LOW.
-
-The official BPI-R64 sources can be found on
-https://github.com/BPI-SINOVOIP/BPI-R64-openwrt
-
-Fixes: 0b6286dd96c0 ("arm64: dts: mt7622: add bananapi BPI-R64 board")
-
-Suggested-by: INAGAKI Hiroshi <musashino.open@gmail.com>
-Signed-off-by: Nick Hainke <vincent@systemli.org>
----
- arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
-@@ -54,7 +54,7 @@
- wps {
- label = "wps";
- linux,code = <KEY_WPS_BUTTON>;
-- gpios = <&pio 102 GPIO_ACTIVE_HIGH>;
-+ gpios = <&pio 102 GPIO_ACTIVE_LOW>;
- };
- };
-
}
--- a/init/main.c
+++ b/init/main.c
-@@ -113,6 +113,10 @@
+@@ -114,6 +114,10 @@
#include <kunit/test.h>
static int kernel_init(void *);
extern void init_IRQ(void);
-@@ -990,6 +994,18 @@ asmlinkage __visible void __init __no_sa
+@@ -991,6 +995,18 @@ asmlinkage __visible void __init __no_sa
page_alloc_init();
pr_notice("Kernel command line: %s\n", saved_command_line);
projects / openwrt / staging / ynezz.git / commitdiff