imx: imx_caam: Add code to initialize the CAAM job-rings to NS-world

This patch defines the most basic part of the CAAM and the only piece of
the CAAM silicon we are really interested in, in ATF, the CAAM control
structure.

The CAAM itself is a huge address space of some 32k, way out of scope for
the purpose we have in ATF.

This patch adds a simple CAAM init function that assigns ownership of the
CAAM job-rings to the non-secure MID with the ownership bit set to
non-secure.

This will allow later logic in the boot process such as OPTEE, u-boot and
Linux to assign job-rings as appropriate, restricting if necessary but
leaving open the main functionality of the CAAM to the Linux NS runtime.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

diff --git a/plat/imx/common/imx_caam.c b/plat/imx/common/imx_caam.c
new file mode 100644 (file)
index 0000000..335e1ed
--- /dev/null
+++ b/plat/imx/common/imx_caam.c
@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#include <stdint.h>
+#include <mmio.h>
+#include <imx_caam.h>
+
+void imx_caam_init(void)
+{
+       struct caam_ctrl *caam = (struct caam_ctrl *)CAAM_AIPS_BASE;
+       uint32_t reg;
+       int i;
+
+       for (i = 0; i < CAAM_NUM_JOB_RINGS; i++) {
+               reg = mmio_read_32((uintptr_t)&caam->jr[i].jrmidr_ms);
+               reg |= JROWN_NS | JROWN_MID;
+               mmio_write_32((uintptr_t)&caam->jr[i].jrmidr_ms, reg);
+       }
+}

diff --git a/plat/imx/common/include/imx_caam.h b/plat/imx/common/include/imx_caam.h
new file mode 100644 (file)
index 0000000..2e1f41a
--- /dev/null
+++ b/plat/imx/common/include/imx_caam.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __IMX_CAAM_H__
+#define __IMX_CAAM_H__
+
+#include <stdint.h>
+#include <arch.h>
+#include <imx_regs.h>
+
+struct caam_job_ring {
+       uint32_t jrmidr_ms;
+       uint32_t jrmidr_ls;
+};
+
+struct caam_rtic_mid {
+       uint32_t rticmidr_ms;
+       uint32_t rticmidr_ls;
+};
+
+struct caam_deco {
+       uint32_t                deco_mid_ms;
+       uint32_t                deco_mid_ls;
+};
+
+#define JOB_RING_OFFSET 0x10
+#define DEBUGCTL_OFFSET        0x58
+#define RES2_SIZE (DEBUGCTL_OFFSET - JOB_RING_OFFSET - \
+       (sizeof(struct caam_job_ring) * CAAM_NUM_JOB_RINGS))
+
+#define RTIC_MID_OFFSET 0x60
+#define DECORR_OFFSET  0x9C
+#define RES3_SIZE (DECORR_OFFSET - RTIC_MID_OFFSET - \
+       (sizeof(struct caam_rtic_mid) * CAAM_NUM_RTIC))
+
+#define DECO_MID_OFFSET        0xA0
+#define DAR_OFFSET     0x120
+#define RES4_SIZE (DAR_OFFSET - DECO_MID_OFFSET - \
+       (sizeof(struct caam_deco) * CAAM_NUM_DECO))
+
+struct caam_ctrl {
+       uint32_t                res0;
+       uint32_t                mcfgr;
+       uint32_t                res1;
+       uint32_t                scfgr;
+       struct caam_job_ring    jr[CAAM_NUM_JOB_RINGS];
+       uint8_t                 res2[RES2_SIZE];
+       uint32_t                debuctl;
+       uint32_t                jrstartr;
+       struct caam_rtic_mid    mid[CAAM_NUM_RTIC];
+       uint8_t                 res3[RES3_SIZE];
+       uint32_t                decorr;
+       struct caam_deco        deco[CAAM_NUM_DECO];
+       uint8_t                 res4[RES4_SIZE];
+       uint32_t                dar;
+       uint32_t                drr;
+} __packed;
+
+/* Job ring control bits */
+#define JROWN_NS               BIT(3)
+#define JROWN_MID              0x01
+
+/* Declare CAAM API */
+void imx_caam_init(void);
+
+#endif /* __IMX_CAAM_H__ */