ARM: tegra: enable data prefetch on L2

Enable the data prefetch on L2. The bit28 in aux ctrl register.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>

diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 6c04a18a88d6937a6b04008a9eaaca29fae34ea8..89d3ebc06eb352ff3e01b785ba9ff7b348d7657e 100644 (file)
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -121,7 +121,7 @@ static void __init tegra_init_cache(void)
 
        cache_type = readl(p + L2X0_CACHE_TYPE);
        aux_ctrl = (cache_type & 0x700) << (17-8);
-       aux_ctrl |= 0x6C000001;
+       aux_ctrl |= 0x7C000001;
 
        l2x0_of_init(aux_ctrl, 0x8200c3fe);
 #endif