tegra: Add a delay in clock_start_periph_pll()
authorSimon Glass <sjg@chromium.org>
Mon, 1 Apr 2019 20:38:38 +0000 (13:38 -0700)
committerTom Warren <twarren@nvidia.com>
Fri, 24 May 2019 17:13:44 +0000 (10:13 -0700)
This function enables a peripheral clock and then immediately sets its
divider. Add a delay to allow the clock to settle first. This matches the
delay in other places which do a similar thing.

Without this, the I2S device on Nyan does not init properly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/mach-tegra/clock.c

index 096330748f2ba98955eb28d94cd2351362f022f2..dc5f16b41b60fa03737829751316a7dc7858b101 100644 (file)
@@ -477,6 +477,7 @@ unsigned clock_start_periph_pll(enum periph_id periph_id,
 
        reset_set_enable(periph_id, 1);
        clock_enable(periph_id);
+       udelay(2);
 
        effective_rate = clock_adjust_periph_pll_div(periph_id, parent, rate,
                                                 NULL);