ASoC: rsnd: share reg_field and reduce memory
authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Mon, 3 Mar 2014 07:43:40 +0000 (23:43 -0800)
committerMark Brown <broonie@linaro.org>
Tue, 4 Mar 2014 04:13:49 +0000 (12:13 +0800)
Gen1/Gen2 code never be used in same time.
Thus, driver can share Gen1 only register and Gen2 only register.
It can reduce memory too.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
sound/soc/sh/rcar/rsnd.h

index e16acd2037a00fa05dbe751f4814455c8937685c..d5afdee6b6f2ea360358c313a893ec212aba6141 100644 (file)
  */
 enum rsnd_reg {
        /* SRU/SCU/SSIU */
-       RSND_REG_SRC_ROUTE_SEL,         /* for Gen1 */
-       RSND_REG_SRC_TMG_SEL0,          /* for Gen1 */
-       RSND_REG_SRC_TMG_SEL1,          /* for Gen1 */
-       RSND_REG_SRC_TMG_SEL2,          /* for Gen1 */
-       RSND_REG_SRC_ROUTE_CTRL,        /* for Gen1 */
-       RSND_REG_SRC_CTRL,              /* for Gen2 */
-       RSND_REG_SSI_CTRL,              /* for Gen2 */
-       RSND_REG_SSI_BUSIF_MODE,        /* for Gen2 */
-       RSND_REG_SSI_BUSIF_ADINR,       /* for Gen2 */
        RSND_REG_SSI_MODE0,
        RSND_REG_SSI_MODE1,
-       RSND_REG_INT_ENABLE,            /* for Gen2 */
        RSND_REG_SRC_BUSIF_MODE,
        RSND_REG_SRC_ROUTE_MODE0,
        RSND_REG_SRC_SWRSR,
@@ -52,9 +42,6 @@ enum rsnd_reg {
        RSND_REG_SRC_IFSCR,
        RSND_REG_SRC_IFSVR,
        RSND_REG_SRC_SRCCR,
-       RSND_REG_SRC_MNFSR,             /* for Gen1 */
-       RSND_REG_SRC_BSDSR,             /* for Gen2 */
-       RSND_REG_SRC_BSISR,             /* for Gen2 */
 
        /* ADG */
        RSND_REG_BRRA,
@@ -62,21 +49,6 @@ enum rsnd_reg {
        RSND_REG_SSICKR,
        RSND_REG_AUDIO_CLK_SEL0,
        RSND_REG_AUDIO_CLK_SEL1,
-       RSND_REG_AUDIO_CLK_SEL2,
-       RSND_REG_AUDIO_CLK_SEL3,        /* for Gen1 */
-       RSND_REG_AUDIO_CLK_SEL4,        /* for Gen1 */
-       RSND_REG_AUDIO_CLK_SEL5,        /* for Gen1 */
-       RSND_REG_DIV_EN,                /* for Gen2 */
-       RSND_REG_SRCIN_TIMSEL0,         /* for Gen2 */
-       RSND_REG_SRCIN_TIMSEL1,         /* for Gen2 */
-       RSND_REG_SRCIN_TIMSEL2,         /* for Gen2 */
-       RSND_REG_SRCIN_TIMSEL3,         /* for Gen2 */
-       RSND_REG_SRCIN_TIMSEL4,         /* for Gen2 */
-       RSND_REG_SRCOUT_TIMSEL0,        /* for Gen2 */
-       RSND_REG_SRCOUT_TIMSEL1,        /* for Gen2 */
-       RSND_REG_SRCOUT_TIMSEL2,        /* for Gen2 */
-       RSND_REG_SRCOUT_TIMSEL3,        /* for Gen2 */
-       RSND_REG_SRCOUT_TIMSEL4,        /* for Gen2 */
 
        /* SSI */
        RSND_REG_SSICR,
@@ -85,9 +57,62 @@ enum rsnd_reg {
        RSND_REG_SSIRDR,
        RSND_REG_SSIWSR,
 
+       /* SHARE see below */
+       RSND_REG_SHARE01,
+       RSND_REG_SHARE02,
+       RSND_REG_SHARE03,
+       RSND_REG_SHARE04,
+       RSND_REG_SHARE05,
+       RSND_REG_SHARE06,
+       RSND_REG_SHARE07,
+       RSND_REG_SHARE08,
+       RSND_REG_SHARE09,
+       RSND_REG_SHARE10,
+       RSND_REG_SHARE11,
+       RSND_REG_SHARE12,
+       RSND_REG_SHARE13,
+       RSND_REG_SHARE14,
+       RSND_REG_SHARE15,
+       RSND_REG_SHARE16,
+       RSND_REG_SHARE17,
+       RSND_REG_SHARE18,
+       RSND_REG_SHARE19,
+
        RSND_REG_MAX,
 };
 
+/* Gen1 only */
+#define RSND_REG_SRC_ROUTE_SEL         RSND_REG_SHARE01
+#define RSND_REG_SRC_TMG_SEL0          RSND_REG_SHARE02
+#define RSND_REG_SRC_TMG_SEL1          RSND_REG_SHARE03
+#define RSND_REG_SRC_TMG_SEL2          RSND_REG_SHARE04
+#define RSND_REG_SRC_ROUTE_CTRL                RSND_REG_SHARE05
+#define RSND_REG_SRC_MNFSR             RSND_REG_SHARE06
+#define RSND_REG_AUDIO_CLK_SEL3                RSND_REG_SHARE07
+#define RSND_REG_AUDIO_CLK_SEL4                RSND_REG_SHARE08
+#define RSND_REG_AUDIO_CLK_SEL5                RSND_REG_SHARE09
+
+/* Gen2 only */
+#define RSND_REG_SRC_CTRL              RSND_REG_SHARE01
+#define RSND_REG_SSI_CTRL              RSND_REG_SHARE02
+#define RSND_REG_SSI_BUSIF_MODE                RSND_REG_SHARE03
+#define RSND_REG_SSI_BUSIF_ADINR       RSND_REG_SHARE04
+#define RSND_REG_INT_ENABLE            RSND_REG_SHARE05
+#define RSND_REG_SRC_BSDSR             RSND_REG_SHARE06
+#define RSND_REG_SRC_BSISR             RSND_REG_SHARE07
+#define RSND_REG_DIV_EN                        RSND_REG_SHARE08
+#define RSND_REG_SRCIN_TIMSEL0         RSND_REG_SHARE09
+#define RSND_REG_SRCIN_TIMSEL1         RSND_REG_SHARE10
+#define RSND_REG_SRCIN_TIMSEL2         RSND_REG_SHARE11
+#define RSND_REG_SRCIN_TIMSEL3         RSND_REG_SHARE12
+#define RSND_REG_SRCIN_TIMSEL4         RSND_REG_SHARE13
+#define RSND_REG_SRCOUT_TIMSEL0                RSND_REG_SHARE14
+#define RSND_REG_SRCOUT_TIMSEL1                RSND_REG_SHARE15
+#define RSND_REG_SRCOUT_TIMSEL2                RSND_REG_SHARE16
+#define RSND_REG_SRCOUT_TIMSEL3                RSND_REG_SHARE17
+#define RSND_REG_SRCOUT_TIMSEL4                RSND_REG_SHARE18
+#define RSND_REG_AUDIO_CLK_SEL2                RSND_REG_SHARE19
+
 struct rsnd_priv;
 struct rsnd_mod;
 struct rsnd_dai;