window->offset = offset;
if (insert_resource(root, &window->resource)) {
- dev_err(&info->bridge->dev, "can't allocate %pRt\n",
+ dev_err(&info->bridge->dev,
+ "can't allocate host bridge window %pR\n",
&window->resource);
} else {
if (offset)
- dev_info(&info->bridge->dev, "host bridge window: %pRt "
+ dev_info(&info->bridge->dev, "host bridge window %pR "
"(PCI address [%#llx-%#llx])\n",
&window->resource,
window->resource.start - offset,
window->resource.end - offset);
else
dev_info(&info->bridge->dev,
- "host bridge window: %pRt\n",
+ "host bridge window %pR\n",
&window->resource);
}
(res->end - res->start < 16))
continue;
if (j >= PCI_BUS_NUM_RESOURCES) {
- dev_warn(&bus->dev, "ignoring %pRf (no space)\n", res);
+ dev_warn(&bus->dev,
+ "ignoring host bridge window %pR (no space)\n",
+ res);
continue;
}
bus->resource[j++] = res;
res->child = NULL;
if (insert_resource(root, res)) {
- dev_err(&info->bridge->dev, "can't allocate %pRt\n", res);
+ dev_err(&info->bridge->dev,
+ "can't allocate host bridge window %pR\n", res);
} else {
info->bus->resource[info->res_num] = res;
info->res_num++;
if (addr.translation_offset)
- dev_info(&info->bridge->dev, "host bridge window: %pRt "
+ dev_info(&info->bridge->dev, "host bridge window %pR "
"(PCI address [%#llx-%#llx])\n",
res, res->start - addr.translation_offset,
res->end - addr.translation_offset);
else
dev_info(&info->bridge->dev,
- "host bridge window: %pRt\n", res);
+ "host bridge window %pR\n", res);
}
return AE_OK;
}
continue;
if (!r->start ||
pci_claim_resource(dev, idx) < 0) {
- dev_info(&dev->dev, "BAR %d: can't allocate %pRt\n", idx, r);
+ dev_info(&dev->dev, "BAR %d: can't allocate %pR\n", idx, r);
/*
* Something is wrong with the region.
* Invalidate the resource to prevent
else
disabled = !(command & PCI_COMMAND_MEMORY);
if (pass == disabled) {
- dev_dbg(&dev->dev, "%pRf (d=%d, p=%d)\n", r,
- disabled, pass);
+ dev_dbg(&dev->dev,
+ "BAR %d: claiming %pr (d=%d, p=%d)\n",
+ idx, r, disabled, pass);
if (pci_claim_resource(dev, idx) < 0) {
- dev_info(&dev->dev, "BAR %d: can't allocate %pRt\n", idx, r);
+ dev_info(&dev->dev, "BAR %d: can't claim %pR\n", idx, r);
/* We'll assign a new address later */
r->end -= r->start;
r->start = 0;
/* Turn the ROM off, leave the resource region,
* but keep it unregistered. */
u32 reg;
- dev_dbg(&dev->dev, "disabling ROM %pRt\n", r);
+ dev_dbg(&dev->dev, "disabling ROM %pR\n", r);
r->flags &= ~IORESOURCE_ROM_ENABLE;
pci_read_config_dword(dev,
dev->rom_base_reg, ®);
return 0;
err_out:
- dev_warn(&pdev->dev, "BAR %d: can't reserve %pRt\n", bar,
+ dev_warn(&pdev->dev, "BAR %d: can't reserve %pR\n", bar,
&pdev->resource[bar]);
return -EBUSY;
}
if (!sz64)
goto fail;
- res->flags |= IORESOURCE_MEM_64;
-
if ((sizeof(resource_size_t) < 8) && (sz64 > 0x100000000ULL)) {
dev_err(&dev->dev, "can't handle 64-bit BAR\n");
goto fail;
- } else if ((sizeof(resource_size_t) < 8) && l) {
+ }
+
+ res->flags |= IORESOURCE_MEM_64;
+ if ((sizeof(resource_size_t) < 8) && l) {
/* Address above 32-bit boundary; disable the BAR */
pci_write_config_dword(dev, pos, 0);
pci_write_config_dword(dev, pos + 4, 0);
} else {
res->start = l64;
res->end = l64 + sz64;
- dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pRt\n",
+ dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n",
pos, res);
}
} else {
res->start = l;
res->end = l + sz;
- dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pRt\n", pos, res);
+ dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);
}
out:
res->start = base;
if (!res->end)
res->end = limit + 0xfff;
- dev_printk(KERN_DEBUG, &dev->dev, "bridge window: %pRt\n", res);
+ dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
}
res = child->resource[1];
res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
res->start = base;
res->end = limit + 0xfffff;
- dev_printk(KERN_DEBUG, &dev->dev, "bridge window: %pRt\n", res);
+ dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
}
res = child->resource[2];
res->flags |= IORESOURCE_MEM_64;
res->start = base;
res->end = limit + 0xfffff;
- dev_printk(KERN_DEBUG, &dev->dev, "bridge window: %pRt\n", res);
+ dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
}
}
pcibios_bus_to_resource(dev, res, &bus_region);
pci_claim_resource(dev, nr);
- dev_info(&dev->dev, "quirk: region %04x-%04x claimed by %s\n", region, region + size - 1, name);
+ dev_info(&dev->dev, "quirk: %pR claimed by %s\n", res, name);
}
}
void pci_setup_cardbus(struct pci_bus *bus)
{
struct pci_dev *bridge = bus->self;
+ struct resource *res;
struct pci_bus_region region;
dev_info(&bridge->dev, "CardBus bridge, secondary bus %04x:%02x\n",
pci_domain_nr(bus), bus->number);
- pcibios_resource_to_bus(bridge, ®ion, bus->resource[0]);
- if (bus->resource[0]->flags & IORESOURCE_IO) {
+ res = bus->resource[0];
+ pcibios_resource_to_bus(bridge, ®ion, res);
+ if (res->flags & IORESOURCE_IO) {
/*
* The IO resource is allocated a range twice as large as it
* would normally need. This allows us to set both IO regs.
*/
- dev_info(&bridge->dev, " IO window: %#08lx-%#08lx\n",
- (unsigned long)region.start,
- (unsigned long)region.end);
+ dev_info(&bridge->dev, " bridge window %pR\n", res);
pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,
region.start);
pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0,
region.end);
}
- pcibios_resource_to_bus(bridge, ®ion, bus->resource[1]);
- if (bus->resource[1]->flags & IORESOURCE_IO) {
- dev_info(&bridge->dev, " IO window: %#08lx-%#08lx\n",
- (unsigned long)region.start,
- (unsigned long)region.end);
+ res = bus->resource[1];
+ pcibios_resource_to_bus(bridge, ®ion, res);
+ if (res->flags & IORESOURCE_IO) {
+ dev_info(&bridge->dev, " bridge window %pR\n", res);
pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
region.start);
pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1,
region.end);
}
- pcibios_resource_to_bus(bridge, ®ion, bus->resource[2]);
- if (bus->resource[2]->flags & IORESOURCE_MEM) {
- dev_info(&bridge->dev, " PREFETCH window: %#08lx-%#08lx\n",
- (unsigned long)region.start,
- (unsigned long)region.end);
+ res = bus->resource[2];
+ pcibios_resource_to_bus(bridge, ®ion, res);
+ if (res->flags & IORESOURCE_MEM) {
+ dev_info(&bridge->dev, " bridge window %pR\n", res);
pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
region.start);
pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0,
region.end);
}
- pcibios_resource_to_bus(bridge, ®ion, bus->resource[3]);
- if (bus->resource[3]->flags & IORESOURCE_MEM) {
- dev_info(&bridge->dev, " MEM window: %#08lx-%#08lx\n",
- (unsigned long)region.start,
- (unsigned long)region.end);
+ res = bus->resource[3];
+ pcibios_resource_to_bus(bridge, ®ion, res);
+ if (res->flags & IORESOURCE_MEM) {
+ dev_info(&bridge->dev, " bridge window %pR\n", res);
pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
region.start);
pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1,
static void pci_setup_bridge(struct pci_bus *bus)
{
struct pci_dev *bridge = bus->self;
+ struct resource *res;
struct pci_bus_region region;
u32 l, bu, lu, io_upper16;
int pref_mem64;
pci_domain_nr(bus), bus->number);
/* Set up the top and bottom of the PCI I/O segment for this bus. */
- pcibios_resource_to_bus(bridge, ®ion, bus->resource[0]);
- if (bus->resource[0]->flags & IORESOURCE_IO) {
+ res = bus->resource[0];
+ pcibios_resource_to_bus(bridge, ®ion, res);
+ if (res->flags & IORESOURCE_IO) {
pci_read_config_dword(bridge, PCI_IO_BASE, &l);
l &= 0xffff0000;
l |= (region.start >> 8) & 0x00f0;
l |= region.end & 0xf000;
/* Set up upper 16 bits of I/O base/limit. */
io_upper16 = (region.end & 0xffff0000) | (region.start >> 16);
- dev_info(&bridge->dev, " IO window: %#04lx-%#04lx\n",
- (unsigned long)region.start,
- (unsigned long)region.end);
+ dev_info(&bridge->dev, " bridge window %pR\n", res);
}
else {
/* Clear upper 16 bits of I/O base/limit. */
io_upper16 = 0;
l = 0x00f0;
- dev_info(&bridge->dev, " IO window: disabled\n");
+ dev_info(&bridge->dev, " bridge window [io disabled]\n");
}
/* Temporarily disable the I/O range before updating PCI_IO_BASE. */
pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);
/* Set up the top and bottom of the PCI Memory segment
for this bus. */
- pcibios_resource_to_bus(bridge, ®ion, bus->resource[1]);
- if (bus->resource[1]->flags & IORESOURCE_MEM) {
+ res = bus->resource[1];
+ pcibios_resource_to_bus(bridge, ®ion, res);
+ if (res->flags & IORESOURCE_MEM) {
l = (region.start >> 16) & 0xfff0;
l |= region.end & 0xfff00000;
- dev_info(&bridge->dev, " MEM window: %#08lx-%#08lx\n",
- (unsigned long)region.start,
- (unsigned long)region.end);
+ dev_info(&bridge->dev, " bridge window %pR\n", res);
}
else {
l = 0x0000fff0;
- dev_info(&bridge->dev, " MEM window: disabled\n");
+ dev_info(&bridge->dev, " bridge window [mem disabled]\n");
}
pci_write_config_dword(bridge, PCI_MEMORY_BASE, l);
/* Set up PREF base/limit. */
pref_mem64 = 0;
bu = lu = 0;
- pcibios_resource_to_bus(bridge, ®ion, bus->resource[2]);
- if (bus->resource[2]->flags & IORESOURCE_PREFETCH) {
- int width = 8;
+ res = bus->resource[2];
+ pcibios_resource_to_bus(bridge, ®ion, res);
+ if (res->flags & IORESOURCE_PREFETCH) {
l = (region.start >> 16) & 0xfff0;
l |= region.end & 0xfff00000;
- if (bus->resource[2]->flags & IORESOURCE_MEM_64) {
+ if (res->flags & IORESOURCE_MEM_64) {
pref_mem64 = 1;
bu = upper_32_bits(region.start);
lu = upper_32_bits(region.end);
- width = 16;
}
- dev_info(&bridge->dev, " PREFETCH window: %#0*llx-%#0*llx\n",
- width, (unsigned long long)region.start,
- width, (unsigned long long)region.end);
+ dev_info(&bridge->dev, " bridge window %pR\n", res);
}
else {
l = 0x0000fff0;
- dev_info(&bridge->dev, " PREFETCH window: disabled\n");
+ dev_info(&bridge->dev, " bridge window [mem pref disabled]\n");
}
pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);
order = __ffs(align) - 20;
if (order > 11) {
dev_warn(&dev->dev, "BAR %d: bad alignment %llx: "
- "%pRt\n", i, (unsigned long long)align, r);
+ "%pR\n", i, (unsigned long long)align, r);
r->flags = 0;
continue;
}
if (!res || !res->end)
continue;
- dev_printk(KERN_DEBUG, &bus->dev, "resource %d %pRt\n", i, res);
+ dev_printk(KERN_DEBUG, &bus->dev, "resource %d %pR\n", i, res);
}
}
pcibios_resource_to_bus(dev, ®ion, res);
- dev_dbg(&dev->dev, "BAR %d: got %pRf (bus addr [%#llx-%#llx])\n",
- resno, res, (unsigned long long)region.start,
- (unsigned long long)region.end);
+ dev_dbg(&dev->dev, "BAR %d: got res %pR bus [%#llx-%#llx] "
+ "flags %#lx\n", resno, res,
+ (unsigned long long)region.start,
+ (unsigned long long)region.end,
+ (unsigned long)res->flags);
new = region.start | (res->flags & PCI_REGION_FLAG_MASK);
if (res->flags & IORESOURCE_IO)
}
}
res->flags &= ~IORESOURCE_UNSET;
- dev_dbg(&dev->dev, "BAR %d: moved to bus addr [%#llx-%#llx]\n",
- resno, (unsigned long long)region.start,
+ dev_dbg(&dev->dev, "BAR %d: moved to %pR (bus addr [%#llx-%#llx])\n",
+ resno, res, (unsigned long long)region.start,
(unsigned long long)region.end);
}
if (err) {
const char *dtype = resource < PCI_BRIDGE_RESOURCES ? "device" : "bridge";
- dev_err(&dev->dev, "BAR %d: %s %s %pRt\n",
+ dev_err(&dev->dev, "BAR %d: %s of %s %pR\n",
resource,
root ? "address space collision on" :
"no parent found for",
align = pci_resource_alignment(dev, res);
if (!align) {
- dev_info(&dev->dev, "BAR %d: can't allocate %pRf "
+ dev_info(&dev->dev, "BAR %d: can't allocate %pR "
"(bogus alignment)\n", resno, res);
return -EINVAL;
}
}
if (ret)
- dev_info(&dev->dev, "BAR %d: can't allocate %pRt\n",
+ dev_info(&dev->dev, "BAR %d: can't allocate %pR\n",
resno, res);
return ret;
r_align = pci_resource_alignment(dev, r);
if (!r_align) {
- dev_warn(&dev->dev, "BAR %d: bogus alignment %pRf\n",
+ dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n",
i, r);
continue;
}
* the PCI region, and that might prevent a PCI
* driver from requesting its resources.
*/
- dev_warn(&dev->dev, "resource %pRt overlaps %s "
- "BAR %d %pRt, disabling\n", res,
+ dev_warn(&dev->dev,
+ "disabling %pR because it overlaps "
+ "%s BAR %d %pR\n", res,
pci_name(pdev), i, &pdev->resource[i]);
res->flags |= IORESOURCE_DISABLED;
}
res->start = irq;
res->end = irq;
- pnp_dbg(&dev->dev, " add %pRf\n", res);
+ pnp_dbg(&dev->dev, " add %pr\n", res);
return pnp_res;
}
res->start = dma;
res->end = dma;
- pnp_dbg(&dev->dev, " add %pRf\n", res);
+ pnp_dbg(&dev->dev, " add %pr\n", res);
return pnp_res;
}
res->start = start;
res->end = end;
- pnp_dbg(&dev->dev, " add %pRf\n", res);
+ pnp_dbg(&dev->dev, " add %pr\n", res);
return pnp_res;
}
res->start = start;
res->end = end;
- pnp_dbg(&dev->dev, " add %pRf\n", res);
+ pnp_dbg(&dev->dev, " add %pr\n", res);
return pnp_res;
}
else {
pnp_dbg(&dev->dev, "%s: current resources:\n", desc);
list_for_each_entry(pnp_res, &dev->resources, list)
- pnp_dbg(&dev->dev, "%pRf\n", &pnp_res->res);
+ pnp_dbg(&dev->dev, "%pr\n", &pnp_res->res);
}
}
* example do reserve stuff they know about too, so we may well
* have double reservations.
*/
- dev_info(&dev->dev, "%pRt %s reserved\n", r,
+ dev_info(&dev->dev, "%pR %s reserved\n", r,
res ? "has been" : "could not be");
}
.precision = -1,
.flags = SPECIAL | SMALL,
};
- /*
- * room for three actual numbers (decimal or hex), plus
- * "[mem 0x-0x 64bit pref disabled flags 0x]\0"
- */
- char sym[3*3*sizeof(resource_size_t) + 41];
+
+ /* 32-bit res (sizeof==4): 10 chars in dec, 10 in hex ("0x" + 8)
+ * 64-bit res (sizeof==8): 20 chars in dec, 18 in hex ("0x" + 16) */
+#define RSRC_BUF_SIZE ((2 * sizeof(resource_size_t)) + 4)
+#define FLAG_BUF_SIZE (2 * sizeof(res->flags))
+#define DECODED_BUF_SIZE sizeof("[mem - 64bit pref disabled]")
+#define RAW_BUF_SIZE sizeof("[mem - flags 0x]")
+ char sym[max(2*RSRC_BUF_SIZE + DECODED_BUF_SIZE,
+ 2*RSRC_BUF_SIZE + FLAG_BUF_SIZE + RAW_BUF_SIZE)];
+
char *p = sym, *pend = sym + sizeof(sym);
int size = -1, addr = 0;
+ int decode = (fmt[0] == 'R') ? 1 : 0;
if (res->flags & IORESOURCE_IO) {
size = IO_RSRC_PRINTK_SIZE;
}
*p++ = '[';
- if (fmt[1] == 't' || fmt[1] == 'f') {
- if (res->flags & IORESOURCE_IO)
- p = string(p, pend, "io ", str_spec);
- else if (res->flags & IORESOURCE_MEM)
- p = string(p, pend, "mem ", str_spec);
- else if (res->flags & IORESOURCE_IRQ)
- p = string(p, pend, "irq ", str_spec);
- else if (res->flags & IORESOURCE_DMA)
- p = string(p, pend, "dma ", str_spec);
+ if (res->flags & IORESOURCE_IO)
+ p = string(p, pend, "io ", str_spec);
+ else if (res->flags & IORESOURCE_MEM)
+ p = string(p, pend, "mem ", str_spec);
+ else if (res->flags & IORESOURCE_IRQ)
+ p = string(p, pend, "irq ", str_spec);
+ else if (res->flags & IORESOURCE_DMA)
+ p = string(p, pend, "dma ", str_spec);
+ else {
+ p = string(p, pend, "??? ", str_spec);
+ decode = 0;
}
hex_spec.field_width = size;
p = number(p, pend, res->start, addr ? hex_spec : dec_spec);
*p++ = '-';
p = number(p, pend, res->end, addr ? hex_spec : dec_spec);
}
- if (fmt[1] == 't' || fmt[1] == 'f') {
+ if (decode) {
if (res->flags & IORESOURCE_MEM_64)
p = string(p, pend, " 64bit", str_spec);
if (res->flags & IORESOURCE_PREFETCH)
p = string(p, pend, " pref", str_spec);
if (res->flags & IORESOURCE_DISABLED)
p = string(p, pend, " disabled", str_spec);
- if (fmt[1] == 'f') {
- p = string(p, pend, " flags ", str_spec);
- p = number(p, pend, res->flags & ~IORESOURCE_TYPE_BITS,
- flag_spec);
- }
+ } else {
+ p = string(p, pend, " flags ", str_spec);
+ p = number(p, pend, res->flags, flag_spec);
}
*p++ = ']';
- *p = 0;
+ *p = '\0';
return string(buf, end, sym, spec);
}
* - 'f' For simple symbolic function names without offset
* - 'S' For symbolic direct pointers with offset
* - 's' For symbolic direct pointers without offset
- * - 'R' For a struct resource pointer, print:
- * R address range only ([0x0-0x1f])
- * Rt type and range ([mem 0x0-0x1f 64bit pref])
- * Rf type, range, and flags ([mem 0x0-0x1f 64bit pref flags 0x1])
+ * - 'R' For decoded struct resource, e.g., [mem 0x0-0x1f 64bit pref]
+ * - 'r' For raw struct resource, e.g., [mem 0x0-0x1f flags 0x201]
* - 'M' For a 6-byte MAC address, it prints the address in the
* usual colon-separated hex notation
* - 'm' For a 6-byte MAC address, it prints the hex address without colons
case 'S':
return symbol_string(buf, end, ptr, spec, *fmt);
case 'R':
+ case 'r':
return resource_string(buf, end, ptr, spec, fmt);
case 'M': /* Colon separated: 00:01:02:03:04:05 */
case 'm': /* Contiguous: 000102030405 */