[ARM] S3C64XX: Add standard S3C64XX 24BPP LCD GPIO setup
authorBen Dooks <ben-linux@fluff.org>
Wed, 19 Nov 2008 15:41:33 +0000 (15:41 +0000)
committerBen Dooks <ben-linux@fluff.org>
Mon, 15 Dec 2008 23:57:19 +0000 (23:57 +0000)
Add a standard helper to configure the LCD output pins for a 24BPP
display with VSYNC/HSYNC/VDEN.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
arch/arm/plat-s3c64xx/Kconfig
arch/arm/plat-s3c64xx/Makefile
arch/arm/plat-s3c64xx/setup-fb-24bpp.c [new file with mode: 0644]

index 9037eb470761530cec54260be6c9cc704b6e4138..203dd730d1ca0f96a2eb6793b159ac71ca2c289a 100644 (file)
@@ -53,4 +53,9 @@ config S3C64XX_SETUP_I2C1
        help
          Common setup code for i2c bus 1.
 
+config S3C64XX_SETUP_FB_24BPP
+       bool
+       help
+         Common setup code for S3C64XX with an 24bpp RGB display helper.
+
 endif
index 0a0b8c48a3e6f3ebb7ca088bb19e8395f7886aae..2e6d79bf8f33537061a9751eea9f482745958309 100644 (file)
@@ -28,3 +28,4 @@ obj-$(CONFIG_CPU_S3C6400_CLOCK)       += s3c6400-clock.o
 
 obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o
 obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o
+obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
diff --git a/arch/arm/plat-s3c64xx/setup-fb-24bpp.c b/arch/arm/plat-s3c64xx/setup-fb-24bpp.c
new file mode 100644 (file)
index 0000000..8e28e44
--- /dev/null
@@ -0,0 +1,37 @@
+/* linux/arch/arm/plat-s3c64xx/setup-fb-24bpp.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *     Ben Dooks <ben@simtec.co.uk>
+ *     http://armlinux.simtec.co.uk/
+ *
+ * Base S3C64XX setup information for 24bpp LCD framebuffer
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/fb.h>
+
+#include <mach/regs-fb.h>
+#include <mach/gpio.h>
+#include <plat/fb.h>
+#include <plat/gpio-cfg.h>
+
+extern void s3c64xx_fb_gpio_setup_24bpp(void)
+{
+       unsigned int gpio;
+
+       for (gpio = S3C64XX_GPI(0); gpio <= S3C64XX_GPI(15); gpio++) {
+               s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+               s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+       }
+
+       for (gpio = S3C64XX_GPJ(0); gpio <= S3C64XX_GPJ(11); gpio++) {
+               s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+               s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+       }
+}