drm/amd/display: only polling VSync Phase within VSync peroroid

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index b95b58d3648a5a45107319387bac771865dfa4c7..cea8dafd2edc37c564bd333b6d86270fec684ff8 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -1862,13 +1862,13 @@ bool dc_link_set_abm_disable(const struct dc_link *link)
 }
 
 
-bool dc_link_set_psr_enable(const struct dc_link *link, bool enable)
+bool dc_link_set_psr_enable(const struct dc_link *link, bool enable, bool wait)
 {
        struct dc  *core_dc = link->ctx->dc;
        struct dmcu *dmcu = core_dc->res_pool->dmcu;
 
        if (dmcu != NULL && link->psr_enabled)
-               dmcu->funcs->set_psr_enable(dmcu, enable);
+               dmcu->funcs->set_psr_enable(dmcu, enable, wait);
 
        return true;
 }

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 5f2b52e41427556a566e5869f4011799d4fc262d..527cc0400fd3adc5b8cde5110831d557b683b057 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -1653,8 +1653,8 @@ static bool handle_hpd_irq_psr_sink(const struct dc_link *link)
                                sizeof(psr_error_status.raw));
 
                        /* PSR error, disable and re-enable PSR */
-                       dc_link_set_psr_enable(link, false);
-                       dc_link_set_psr_enable(link, true);
+                       dc_link_set_psr_enable(link, false, true);
+                       dc_link_set_psr_enable(link, true, true);
 
                        return true;
                } else if (psr_sink_psr_status.bits.SINK_SELF_REFRESH_STATUS ==

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index e2159306a9c2a75c96e7e587b78ff5353fa45acc..2316a6060b2c1fc98a0745d7a017b1fda438a88a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -871,7 +871,7 @@ struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index);
 bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level,
                uint32_t frame_ramp, const struct dc_stream_state *stream);
 
-bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable);
+bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable, bool wait);
 
 bool dc_link_get_psr_state(const struct dc_link *dc_link, uint32_t *psr_state);
 

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c b/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
index efcdb2bf4d0dca6634c66e9160fc817ee7a13b3d..313f61bf06e1d1e0613a3a26acef23d24598478b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
@@ -103,7 +103,7 @@ static void dce_get_dmcu_psr_state(struct dmcu *dmcu, uint32_t *psr_state)
        REG_UPDATE(DMCU_RAM_ACCESS_CTRL, IRAM_HOST_ACCESS_EN, 0);
 }
 
-static void dce_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable)
+static void dce_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable, bool wait)
 {
        struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);
        unsigned int dmcu_max_retry_on_wait_reg_ready = 801;
@@ -127,17 +127,18 @@ static void dce_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable)
 
        /* notifyDMCUMsg */
        REG_UPDATE(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 1);
-
-       for (retryCount = 0; retryCount <= 100; retryCount++) {
-               dce_get_dmcu_psr_state(dmcu, &psr_state);
-               if (enable) {
-                       if (psr_state != 0)
-                               break;
-               } else {
-                       if (psr_state == 0)
-                               break;
+       if (wait == true) {
+               for (retryCount = 0; retryCount <= 100; retryCount++) {
+                       dce_get_dmcu_psr_state(dmcu, &psr_state);
+                               if (enable) {
+                                       if (psr_state != 0)
+                                               break;
+                               } else {
+                                       if (psr_state == 0)
+                                               break;
+                               }
+                               dm_delay_in_microseconds(dmcu->ctx, 10);
                }
-               dm_delay_in_microseconds(dmcu->ctx, 10);
        }
 }
 
@@ -338,7 +339,7 @@ static void dcn10_get_dmcu_psr_state(struct dmcu *dmcu, uint32_t *psr_state)
        REG_UPDATE(DMCU_RAM_ACCESS_CTRL, IRAM_HOST_ACCESS_EN, 0);
 }
 
-static void dcn10_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable)
+static void dcn10_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable, bool wait)
 {
        struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);
        unsigned int dmcu_max_retry_on_wait_reg_ready = 801;
@@ -367,6 +368,7 @@ static void dcn10_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable)
         *  Exit PSR may need to wait 1-2 frames to power up. Timeout after at
         *  least a few frames. Should never hit the max retry assert below.
         */
+       if (wait == true) {
        for (retryCount = 0; retryCount <= 1000; retryCount++) {
                dcn10_get_dmcu_psr_state(dmcu, &psr_state);
                if (enable) {
@@ -381,6 +383,7 @@ static void dcn10_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable)
 
        /* assert if max retry hit */
        ASSERT(retryCount <= 1000);
+       }
 }
 
 static void dcn10_dmcu_setup_psr(struct dmcu *dmcu,

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h
index e34b25939a98d72021e6c31649827a387dfc936d..0574c29cc4a873fd626d1fe909b70d6bad45380a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h
@@ -37,7 +37,7 @@ struct dmcu_funcs {
                        unsigned int start_offset,
                        const char *src,
                        unsigned int bytes);
-       void (*set_psr_enable)(struct dmcu *dmcu, bool enable);
+       void (*set_psr_enable)(struct dmcu *dmcu, bool enable, bool wait);
        void (*setup_psr)(struct dmcu *dmcu,
                        struct dc_link *link,
                        struct psr_context *psr_context);